CN113725200A - Packaging structure of full-bridge power module - Google Patents

Packaging structure of full-bridge power module Download PDF

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Publication number
CN113725200A
CN113725200A CN202110986037.6A CN202110986037A CN113725200A CN 113725200 A CN113725200 A CN 113725200A CN 202110986037 A CN202110986037 A CN 202110986037A CN 113725200 A CN113725200 A CN 113725200A
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China
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metal oxide
oxide semiconductor
field effect
semiconductor field
full
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CN202110986037.6A
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Chinese (zh)
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廖光朝
张小兵
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Shenzhen Yuntong Technology Co Ltd
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Shenzhen Yuntong Technology Co Ltd
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Priority to CN202110986037.6A priority Critical patent/CN113725200A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector

Abstract

The invention discloses a packaging structure of a full-bridge power module. The packaging structure of the full-bridge power module comprises a lead frame, wherein the lead frame comprises an upper bridge base island and a lower bridge base island; the first transistor component comprises m first metal oxide semiconductor field effect transistor crystal grains which are arranged at intervals; a second transistor assembly comprising m second metal oxide semiconductor field effect transistor dies; the drains of the m first metal oxide semiconductor field effect transistor crystal grains which are arranged at intervals are electrically connected in series; the drain electrode of the second metal oxide semiconductor field effect transistor crystal grain corresponds to the source electrode of the first metal oxide semiconductor field effect transistor crystal grain one by one and is electrically connected with the source electrode; and the drain electrode of the second metal oxide semiconductor field effect transistor crystal grain is used as a signal output end. The invention reduces the volume of the printed circuit board applying the full-bridge power module and improves the heat dissipation effect.

Description

Packaging structure of full-bridge power module
Technical Field
The embodiment of the invention relates to the technical field of semiconductors, in particular to a packaging structure of a full-bridge power module.
Background
The low-pressure pump and the direct current motor in the Field of new energy frequency conversion in the market at present both use a Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) single tube or a MOSFET half-bridge packaged device of 3 MOSFET single tubes (2 MOSFET crystal grains are sealed in a closed mode inside the MOSFET single tube), and are combined on a water pump and a motor control board to finally generate three-phase working voltage of the pump and the motor.
In the prior art, a plurality of MOSFET transistors are designed, combined and welded on a printed circuit board to form a full-bridge power control scheme; however, this solution results in a large printed circuit board, poor heat dissipation, no utilization of uniform heat dissipation, and complicated printed circuit board design routing circuitry.
Disclosure of Invention
The invention provides a packaging structure of a full-bridge power module, which aims to reduce the volume of a printed circuit board applying the full-bridge power module and improve the heat dissipation effect.
In a first aspect, an embodiment of the present invention provides a package structure of a full-bridge power module, where the package structure of the full-bridge power module includes:
the lead frame comprises an upper bridge base island and a lower bridge base island, the lower bridge base island comprises m lower bridge sub base islands, and the value of m comprises an integer greater than or equal to 2;
a first transistor element located on a surface of the upper bridge island, wherein the first transistor element comprises m first metal oxide semiconductor field effect transistor grains arranged at intervals;
the second transistor assembly comprises m second metal oxide semiconductor field effect transistor grains, the second metal oxide semiconductor field effect transistor grains are positioned on the surface of the lower bridge base island, and the second metal oxide semiconductor field effect transistor grains and the lower bridge base island are arranged in a one-to-one correspondence mode;
the drains of the m first metal oxide semiconductor field effect transistor crystal grains which are arranged at intervals are electrically connected in series;
the drain electrode of the second metal oxide semiconductor field effect transistor crystal grain corresponds to the source electrode of the first metal oxide semiconductor field effect transistor crystal grain one by one and is electrically connected with the source electrode of the first metal oxide semiconductor field effect transistor crystal grain;
and the drain electrode of the second metal oxide semiconductor field effect transistor crystal grain is used as a signal output end.
Optionally, the value of m is 3.
Optionally, the package structure of the full-bridge power module further includes m first gate connection electrodes arranged in an insulating manner;
the first grid electrode connecting electrodes correspond to the grids of the first metal oxide semiconductor field effect transistor crystal grains one to one and are electrically connected.
Optionally, the package structure of the full-bridge power module further includes m second gate connection electrodes arranged in an insulating manner;
the second grid electrode connecting electrodes correspond to the grids of the second metal oxide semiconductor field effect transistor crystal grains one to one and are electrically connected.
Optionally, m drains of the first metal oxide semiconductor field effect transistor crystal grains which are arranged at intervals are positioned on the surface of the upper bridge base island;
and the drain electrode of the second metal oxide semiconductor field effect transistor crystal grain is positioned on the surface of the lower bridge base island.
Optionally, the package structure of the full-bridge power module further includes m source connection electrodes, and the source connection electrodes correspond to the sources of the second mosfet die one to one and are electrically connected to each other.
Optionally, the package structure of the full-bridge power module further includes m conductive sheets, a first end of each conductive sheet is electrically connected to the source of the first mosfet die, and a second end of each conductive sheet is electrically connected to the sub-island of the lower bridge corresponding to the second mosfet die.
Optionally, the package structure of the full-bridge power module further includes m output electrodes;
and the output electrodes correspond to the lower bridge sub-islands one by one and are electrically connected.
Optionally, the output electrode is integrally formed with the lower bridge sub-island.
Optionally, the package structure of the full-bridge power module further includes an epoxy encapsulation layer, and the epoxy encapsulation layer is used for encapsulating the lead frame, the first transistor component and the second transistor component.
The lead frame of the packaging structure of the full-bridge power module is divided into an upper bridge base island and a lower bridge base island, m first metal oxide semiconductor field effect transistor crystal grains are arranged on the upper bridge base island at intervals, and the drain electrode of each first metal oxide semiconductor field effect transistor crystal grain can be used as a power supply signal input end; m second metal oxide semiconductor field effect transistor grains are arranged on the lower bridge base island at intervals, the drain electrode of each second metal oxide semiconductor field effect transistor grain is correspondingly and electrically connected with the source electrode of the corresponding first metal oxide semiconductor field effect transistor grain, so that the circuit of the upper bridge base island is connected with the circuit of the lower bridge base island, and the drain electrode of each second metal oxide semiconductor field effect transistor grain is used as a signal output end, so that the conversion of power supply signals is realized. The m first metal oxide semiconductor field effect transistor crystal grains and the m second metal oxide semiconductor field effect transistor crystal grains are integrated on the lead frame, the circuit of the full-bridge power module is integrated on the lead frame, when the full-bridge power module is applied, a plurality of MOSFET transistors do not need to be welded on a printed circuit board, the packaging structure of the full-bridge power module only needs to be welded on the printed circuit board, and the size of the printed circuit board applying the full-bridge power module is reduced. The full-bridge power module has a package structure such as QFN package, which is beneficial to improving the heat dissipation effect. The invention solves the problems of large volume, poor heat dissipation, no utilization of unified heat dissipation and complex circuit design of the printed circuit board caused by welding the full-bridge power module of a plurality of MOSFET transistors on the printed circuit board in the prior art, achieves the purposes of reducing the volume of the printed circuit board using the full-bridge power module and improving the heat dissipation effect.
Drawings
Fig. 1 is a schematic diagram of a package structure of a full-bridge power module according to an embodiment of the present invention;
fig. 2 is a schematic circuit diagram of a full-bridge power module corresponding to fig. 1 according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a package structure of another full-bridge power module according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a package structure of another full-bridge power module according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic diagram of a package structure of a full-bridge power module according to an embodiment of the present invention, fig. 2 is a schematic diagram of a circuit structure of the full-bridge power module corresponding to fig. 1 according to the embodiment of the present invention, and referring to fig. 1 and fig. 2, the package structure of the full-bridge power module includes: the lead frame 100, the lead frame 100 includes the upper bridge base island 110 and the lower bridge base island 120, the lower bridge base island 120 includes m lower bridge base islands 121, the value of m includes an integer greater than or equal to 2; a first transistor element 200, wherein the first transistor element 200 is located on the surface of the upper bridge island 110, and the first transistor element 200 includes m first metal oxide semiconductor field effect transistor dies 210 arranged at intervals; a second transistor assembly 300, wherein the second transistor assembly 300 includes m second mosfet dies 310, the second mosfet dies 310 are located on the surface of the lower bridge sub-island 121, and the second mosfet dies 310 and the lower bridge sub-island 121 are arranged in a one-to-one correspondence; the drains of the m spaced first mosfet dies 210 are electrically connected in series; the drains of the second mosfet dies 310 correspond to the sources of the first mosfet dies 210 one-to-one and are electrically connected; the drain of the second mosfet die 310 serves as a signal output terminal.
Specifically, the full-bridge power module generally includes an upper bridge circuit and a lower bridge circuit, where the upper bridge circuit includes m upper bridge arm circuits, the lower bridge circuit includes m lower bridge arm circuits, and a value of m includes an integer greater than or equal to 2.
Illustratively, in fig. 1 and 2, m has a value of 3.
Referring to fig. 2, the full bridge power module includes an upper bridge arm circuit and a lower bridge arm circuit. The upper bridge arm circuit comprises a first transistor Q1, a third transistor Q3 and a fifth transistor Q5, wherein the first transistor Q1, the third transistor Q3 and the fifth transistor Q5 are first metal oxide semiconductor field effect transistor grains 210 and form a first transistor component 200; the lower leg circuit includes a second transistor Q2, a fourth transistor Q4, and a sixth transistor Q6. The second transistor Q2, the fourth transistor Q4, and the sixth transistor Q6 form a second transistor element 300 as a second mosfet die 310. The gate G1 of the first transistor Q1, the gate G2 of the second transistor Q2, the gate G3 of the third transistor Q3, the gate G4 of the fourth transistor Q4, the gate G5 of the fifth transistor Q5 and the gate G6 of the sixth transistor Q6 are used for connecting control signals; the drain D1 of the first transistor Q1, the drain D3 of the third transistor Q3, and the drain D5 of the fifth transistor Q5 are electrically connected in series, and are connected to a power supply VCC as an ac signal input terminal, or may be a dc signal input terminal; the source S1 of the first transistor Q1, the source S3 of the third transistor Q3, and the source S5 of the fifth transistor Q5 correspond to and are electrically connected to the drain D2 of the second transistor Q2, the drain D4 of the fourth transistor Q4, and the drain D6 of the sixth transistor Q6 one to one, and the drain D2 of the second transistor Q2, the drain D4 of the fourth transistor Q4, and the drain D6 of the sixth transistor Q6 are signal output terminals, i.e., A, B and C, and the source S2 of the second transistor Q2, the source S4 of the fourth transistor Q4, and the source S6 of the sixth transistor Q6 are grounded. Fig. 2 shows only one circuit configuration of the full-bridge power module, and is not limited thereto.
Referring to fig. 1, a lead frame 100 of a package structure of a full-bridge power module includes an upper bridge base island 110 and a lower bridge base island 120, m first mosfet dies 210 are spaced apart from each other on the upper bridge base island 110, the upper bridge base island 110 is, for example, integrally disposed, and drains of the m first mosfet dies 210 spaced apart from each other are electrically connected in series, so that the drains of the first mosfet dies 210 are connected to an external power source, for example, a power source terminal, i.e., the drains of the first mosfet dies 210 may serve as a power source signal input terminal, an ac power source signal input terminal, or a dc power source signal input terminal. The drain of the first mosfet die 210 is located on the surface of the first mosfet die 210 adjacent to the upper bridge base island 110, for example, the surface of the first mosfet die 210 away from the upper bridge base island 110 is provided with a source and a gate, the drain of the first mosfet die 210 is in contact with the surface of the upper bridge base island 110, and when the upper bridge base island 110 can conduct electricity, the drains of m first mosfet dies 210 are electrically connected in series through the upper bridge base island 110; alternatively, the drains of the m first mosfet dies 210 are electrically connected in series through the conductive layer.
M second metal oxide semiconductor field effect transistor crystal grains 310 are arranged on the lower bridge base island 120 at intervals, the second metal oxide semiconductor field effect transistor crystal grains 310 and the lower bridge base islands 121 are arranged in a one-to-one correspondence mode, namely one second metal oxide semiconductor field effect transistor crystal grain 310 is arranged on each lower bridge base island 121. The drain of the second mosfet die 310 is located on the surface of the second mosfet die 310 adjacent to the upper bridge base island 110, for example, the surface of the second mosfet die 310 away from the upper bridge base island 110 is provided with a source and a gate, the drain of the second mosfet die 310 contacts with the surface of the corresponding lower bridge base island 121, and when the lower bridge base island 121 can be conductive, the source of the first mosfet die 210 is connected with the corresponding lower bridge base island 121, so that the drain of the second mosfet die 310 is electrically connected with the source of the first mosfet die 210.
The drain of the second mosfet die 310 is electrically connected to the source of the first mosfet die 210, such that the circuit of the upper bridge base island 110 is connected to the circuit of the lower bridge base island 120, and the drain of the second mosfet die 310 is used as a signal output terminal, such as a signal output terminal of a full bridge power module, such as a dc power signal output terminal, or may be an ac power signal output terminal, such as m first mosfet dies 210 and m second mosfet dies 310, which can convert the ac power signal of the drain of the first mosfet die 210 into a dc power signal output or convert the dc power signal into an ac power signal output, thereby achieving the conversion of the power supply signal.
Integrate m first metal oxide semiconductor field effect transistor crystalline grains 210 and m second metal oxide semiconductor field effect transistor crystalline grains 310 on a lead frame 100, realized the circuit integration with full-bridge power module on a lead frame 100, when using full-bridge power module, need not to weld a plurality of MOSFET transistors on printed circuit board again, only need with full-bridge power module's packaging structure weld on printed circuit board can, the volume of using full-bridge power module's printed circuit board has been reduced, and it is more convenient to make full-bridge power module's printed circuit board walk the line.
In addition, the packaging structure of the full-bridge power module is a Quad Flat No-lead Package (QFN), and the QFN Package has a direct heat dissipation channel for releasing heat in the Package, which is beneficial to improving the heat dissipation effect of the packaging structure of the full-bridge power module, thereby improving the heat dissipation effect of the printed circuit board using the full-bridge power module.
The value of m may be 2 or 3, and fig. 1 shows only the case where m is 3, but is not limited thereto.
According to the technical scheme of the embodiment, the lead frame 100 of the packaging structure of the full-bridge power module is divided into the upper bridge base island 110 and the lower bridge base island 120, m first metal oxide semiconductor field effect transistor grains 210 are arranged on the upper bridge base island 110 at intervals, and the drain of each first metal oxide semiconductor field effect transistor grain 210 can serve as a power signal input end; m second metal oxide semiconductor field effect transistor grains 310 are arranged on the lower bridge base island 120 at intervals, the drain electrodes of the second metal oxide semiconductor field effect transistor grains 310 are correspondingly and electrically connected with the source electrode of the first metal oxide semiconductor field effect transistor grain 210, so that the circuit of the upper bridge base island 110 is connected with the circuit of the lower bridge base island 120, and the drain electrodes of the second metal oxide semiconductor field effect transistor grains 310 are used as signal output ends, so that the conversion of power supply signals is realized. The m first metal oxide semiconductor field effect transistor crystal grains 210 and the m second metal oxide semiconductor field effect transistor crystal grains 310 are integrated on the lead frame 100, the circuit of the full-bridge power module is integrated on the lead frame 100, when the full-bridge power module is applied, a plurality of MOSFET transistors do not need to be welded on a printed circuit board, the packaging structure of the full-bridge power module only needs to be welded on the printed circuit board, and the size of the printed circuit board applying the full-bridge power module is reduced. The packaging structure of the full-bridge power module is QFN packaging, which is beneficial to improving the heat dissipation effect. The technical scheme of this embodiment has solved prior art and has welded the full-bridge power module of a plurality of MOSFET transistors on printed circuit board, leads to printed circuit board volume great, and the heat dissipation is poor, does not utilize the problem that unified heat dissipation, circuit design are complicated, has reached the volume that reduces the printed circuit board who uses full-bridge power module, improves the radiating effect.
Fig. 3 is a schematic diagram of a package structure of another full-bridge power module according to an embodiment of the present invention, and optionally, referring to fig. 3, m is 3.
Specifically, if m is 3, the upper bridge base island 110 includes 3 first mosfet dies 210, the lower bridge base island 120 includes 3 second mosfet dies 310, and the drain of the second mosfet dies 310 can output three power signals, i.e., can output three-phase electrical signals, which can meet the use requirement of the three-phase motor.
Optionally, referring to fig. 3, the package structure of the full-bridge power module further includes m first gate connection electrodes 410 arranged in an insulating manner; the first gate connecting electrodes 410 correspond to the gates 211 of the first mosfet die 210 one by one and are electrically connected.
Specifically, m first gate connection electrodes 410 are provided, and the first gate connection electrodes 410 are in one-to-one correspondence with and electrically connected to the gates 211 of the first mosfet die 210, so that the gates 211 of the first mosfet die 210 can be led out, and the gates 211 of the first mosfet die 210 can be electrically connected to other devices. And the m first gate connection electrodes 410 are disposed in an insulated manner, thereby preventing the m first gate connection electrodes 410 from being electrically connected and causing a circuit failure.
Optionally, referring to fig. 3, the package structure of the full-bridge power module further includes m second gate connection electrodes 420 arranged in an insulating manner; the second gate connecting electrodes 420 correspond to the gates 311 of the second mosfet die 310 one by one and are electrically connected.
Specifically, m second gate connection electrodes 420 are provided, and the second gate connection electrodes 420 correspond to the gates 311 of the second mosfet die 310 one by one and are electrically connected, so that the gates 311 of the second mosfet die 310 can be led out, and the gates 311 of the second mosfet die 310 can be electrically connected to other devices. And the m second gate connection electrodes 420 are arranged in an insulating manner, so that the m second gate connection electrodes 420 are prevented from being electrically connected, and a circuit fault is prevented from being caused.
Alternatively, referring to fig. 3, the drains of m first spaced mosfet dies 210 are located on the surface of the upper bridge island 110; the drain of the second mosfet die 310 is located on the surface of the sub-island 121.
Specifically, the drain of the first mosfet die 210 is in contact with the surface of the upper bridge base island 110, so that the drain of the first mosfet die 210 is connected to the upper bridge base island 110, and the drains of m first mosfet dies 210 can be electrically connected in series through the upper bridge base island 110; the drain of the second mosfet die 310 is in contact with the surface of the lower bridge island 121, so that the drain of the second mosfet die 310 is connected to the lower bridge island 121. For example, the drain of the first mosfet die 210 may be soldered to the surface of the upper bridge base island 110, and the drain of the second mosfet die 310 may be soldered to the surface of the lower bridge base island 121.
Optionally, referring to fig. 3, the package structure of the full-bridge power module further includes m source connection electrodes 430, and the source connection electrodes 430 correspond to and are electrically connected to the sources 312 of the second mosfet die 310 one by one.
Specifically, m source connection electrodes 430 are further disposed on the lead frame 100 of the package structure of the full-bridge power module, and the source connection electrodes 430 correspond to and are electrically connected to the sources 312 of the second mosfet die 310 one by one, so that the sources 312 of the second mosfet die 310 can be led out, which is convenient for the connection between the sources of the second mosfet die 310 and other devices, or the sources 312 of the second mosfet die 310 are grounded. In addition, the source connection electrode 430 has a large area, which can reduce resistance and heat generation.
Optionally, referring to fig. 3, the package structure of the full-bridge power module further includes m conductive sheets 440, a first end of each conductive sheet 440 is electrically connected to the source 212 of the first mosfet die 210, and a second end of each conductive sheet 440 is electrically connected to the lower bridge base island 121 corresponding to the second mosfet die 310.
Specifically, the source 212 of the first mosfet die 210 is electrically connected to the corresponding lower bridge base island 121 of the second mosfet die 310 through the conductive sheet 440, and the drain of the second mosfet die 310 is welded to the corresponding lower bridge base island 121, so that the drain of the second mosfet die 310 is connected to the source 212 of the first mosfet die 210 through the conductive sheet 440, where the conductive sheet 440 is, for example, a copper sheet or an aluminum tape, or other conductive sheets, and this is not limited herein. Moreover, the conductive sheet 440 has a heat conduction function, so that the heat dissipation effect of the package structure of the full-bridge power module can be enhanced.
Optionally, referring to fig. 3, the package structure of the full-bridge power module further includes m output electrodes 450, and the output electrodes 450 correspond to the sub-islands 121 of the lower bridge one to one and are electrically connected.
Specifically, the output electrode 450 is disposed corresponding to the lower bridge base island 121, and the output electrode 450 is electrically connected to the lower bridge base island 121, so that a signal output from the drain of the second mosfet die 310 can be output to other devices through the output electrode 450.
Alternatively, referring to fig. 3, the output electrode 450 is integrally formed with the lower bridge island 121.
Specifically, the output electrode 450 and the lower bridge base island 121 are integrally formed, so that the manufacturing process is simplified, the drain of the second mosfet die 310 is connected to the corresponding lower bridge base island 121, and the effect of reducing the number of connecting wires is achieved.
Fig. 4 is a schematic diagram of another package structure of a full-bridge power module according to an embodiment of the present invention, and optionally, referring to fig. 4, the package structure of the full-bridge power module further includes an epoxy encapsulation layer 460, where the epoxy encapsulation layer 460 is used to encapsulate the lead frame 100, the first transistor assembly 200, and the second transistor assembly 300.
Specifically, the epoxy encapsulating layer 460 is formed of epoxy, and the epoxy encapsulating layer 460 may protect the encapsulation structure of the full-bridge power module from being damaged during transportation. After the epoxy resin encapsulating layer 460 is formed by using epoxy resin, the excess epoxy resin encapsulating layer 460 can be removed in a cutting mode, so that the first gate connecting electrode 410 of the upper bridge island 110 and the second gate connecting electrode 420, the source connecting electrode 430 and the output electrode 450 of the lower bridge island 120 can be exposed, and the connection with other devices is facilitated, thereby facilitating the rapid heat dissipation and being beneficial to reducing the temperature of the packaging structure of the full-bridge power module.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. A packaging structure of a full-bridge power module is characterized by comprising:
the lead frame comprises an upper bridge base island and a lower bridge base island, the lower bridge base island comprises m lower bridge sub base islands, and the value of m comprises an integer greater than or equal to 2;
a first transistor element located on a surface of the upper bridge island, wherein the first transistor element comprises m first metal oxide semiconductor field effect transistor grains arranged at intervals;
the second transistor assembly comprises m second metal oxide semiconductor field effect transistor grains, the second metal oxide semiconductor field effect transistor grains are positioned on the surface of the lower bridge base island, and the second metal oxide semiconductor field effect transistor grains and the lower bridge base island are arranged in a one-to-one correspondence mode;
the drains of the m first metal oxide semiconductor field effect transistor crystal grains which are arranged at intervals are electrically connected in series;
the drain electrode of the second metal oxide semiconductor field effect transistor crystal grain corresponds to the source electrode of the first metal oxide semiconductor field effect transistor crystal grain one by one and is electrically connected with the source electrode of the first metal oxide semiconductor field effect transistor crystal grain;
and the drain electrode of the second metal oxide semiconductor field effect transistor crystal grain is used as a signal output end.
2. The package structure of the full-bridge power module according to claim 1, wherein m is 3.
3. The package structure of the full-bridge power module according to claim 1, further comprising m first gate connection electrodes arranged in an insulating manner;
the first grid electrode connecting electrodes correspond to the grids of the first metal oxide semiconductor field effect transistor crystal grains one to one and are electrically connected.
4. The package structure of the full-bridge power module according to claim 1, further comprising m second gate connection electrodes arranged in an insulating manner;
the second grid electrode connecting electrodes correspond to the grids of the second metal oxide semiconductor field effect transistor crystal grains one to one and are electrically connected.
5. The package structure of a full-bridge power module according to claim 1,
the drain electrodes of the m first metal oxide semiconductor field effect transistor crystal grains which are arranged at intervals are positioned on the surface of the upper bridge base island;
and the drain electrode of the second metal oxide semiconductor field effect transistor crystal grain is positioned on the surface of the lower bridge base island.
6. The package structure of the full-bridge power module according to claim 5, further comprising m source connection electrodes, wherein the source connection electrodes are in one-to-one correspondence with and electrically connected to the sources of the second metal oxide semiconductor field effect transistor dies.
7. The package structure of the full-bridge power module according to claim 1, further comprising m conductive sheets, wherein a first end of each conductive sheet is electrically connected to the source of the first mosfet die, and a second end of each conductive sheet is electrically connected to the sub-bridge island corresponding to the second mosfet die.
8. The package structure of the full-bridge power module according to claim 5, further comprising m output electrodes;
and the output electrodes correspond to the lower bridge sub-islands one by one and are electrically connected.
9. The package structure of the full-bridge power module according to claim 8, wherein the output electrode is integrally formed with the sub-island of the lower bridge.
10. The package structure of the full-bridge power module according to claim 1, further comprising an epoxy encapsulation layer for encapsulating the lead frame, the first transistor assembly and the second transistor assembly.
CN202110986037.6A 2021-08-26 2021-08-26 Packaging structure of full-bridge power module Withdrawn CN113725200A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110986037.6A CN113725200A (en) 2021-08-26 2021-08-26 Packaging structure of full-bridge power module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110986037.6A CN113725200A (en) 2021-08-26 2021-08-26 Packaging structure of full-bridge power module

Publications (1)

Publication Number Publication Date
CN113725200A true CN113725200A (en) 2021-11-30

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110986037.6A Withdrawn CN113725200A (en) 2021-08-26 2021-08-26 Packaging structure of full-bridge power module

Country Status (1)

Country Link
CN (1) CN113725200A (en)

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