CN111106098B - Power module with low parasitic inductance layout - Google Patents
Power module with low parasitic inductance layout Download PDFInfo
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- CN111106098B CN111106098B CN201911281369.3A CN201911281369A CN111106098B CN 111106098 B CN111106098 B CN 111106098B CN 201911281369 A CN201911281369 A CN 201911281369A CN 111106098 B CN111106098 B CN 111106098B
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- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Abstract
The invention discloses a power module with a low parasitic inductance layout, which comprises an upper half-bridge switch unit and a lower half-bridge switch unit, wherein the upper half-bridge switch unit and the lower half-bridge switch unit are arranged on an insulating substrate; the upper half-bridge switch unit is arranged in the middle of the insulating substrate, the collector or the drain of the upper half-bridge switch unit is electrically connected with the positive electrode copper layer on the insulating substrate, and the emitter or the source of the upper half-bridge switch unit is electrically connected with the output electrode copper layer.
Description
Technical Field
The invention belongs to the field of power electronic power modules, and particularly relates to a power module with a low-inductance circuit layout.
Background
The power electronic technology occupies a very important position in the current rapidly-developed industrial field, and the power electronic power module is taken as a representative of the power electronic technology and is widely applied to industries such as electric automobiles, photovoltaic power generation, wind power generation, industrial frequency conversion and the like. With the rise of the industry in China, the power electronic power module has wider market prospect.
In order to improve the working efficiency of a power electronic system, the power electronic power module is required to have higher switching frequency, but the parasitic inductance of the traditional packaging structure is larger, so that larger voltage overshoot is caused when the power electronic power device is switched on and switched off, the risk of overvoltage breakdown of the power device is increased, and the further improvement of the switching frequency of the power electronic power module is limited. Parasitic inductance has always been a major problem to be overcome in power electronics applications, especially in high frequency, high power applications. With the rapid development of the third generation semiconductor, especially the continuous maturation of silicon carbide (SiC) devices, a more urgent need is provided for a novel low parasitic inductance package structure.
Disclosure of Invention
The purpose of the invention is as follows: in order to solve the problems in the prior art, the invention provides a power module with a low-inductance circuit layout.
The technical scheme is as follows: a power module with low parasitic inductance layout comprises a positive electrode, a negative electrode, an output electrode and an insulating substrate, wherein the insulating substrate is arranged on a bottom plate, insulating layers are arranged among the positive electrode, the negative electrode, the output electrode and the bottom plate, the insulating substrate comprises a heat conduction insulating layer and a copper layer formed on the heat conduction insulating layer, and the copper layer comprises a positive electrode copper layer electrically connected with the positive electrode, a negative electrode copper layer electrically connected with the negative electrode and an output electrode copper layer electrically connected with the output electrode; the positive electrode and the negative electrode are respectively connected with the insulating substrate; the circuit board also comprises an upper half-bridge switch unit and a lower half-bridge switch unit which are arranged on the insulating substrate;
the upper half-bridge switch unit is arranged in the middle of the insulating substrate, a collector or a drain of the upper half-bridge switch unit is electrically connected with a positive electrode copper layer on the insulating substrate, and an emitter or a source of the upper half-bridge switch unit is electrically connected with an output electrode copper layer;
the lower half-bridge switch units are symmetrically distributed on two sides of the upper half-bridge switch unit, the collector or the drain of each lower half-bridge switch unit is electrically connected with the copper layer of the output electrode, and the emitter or the source of each lower half-bridge switch unit is electrically connected with the copper layer of the negative electrode.
Furthermore, the emitter or the drain of the upper half-bridge switch unit is electrically connected with the output electrode copper layer by adopting a copper foil, and the width of the corresponding copper foil is widened along with the increase of the distance between the copper foil and the positive electrode in the vertical direction; and the emitting electrode or the drain electrode of the lower half-bridge switch unit is electrically connected with the negative electrode copper layer by adopting a copper foil, and the width of the corresponding copper foil is widened along with the increase of the distance between the copper foil and the negative electrode in the vertical direction.
Furthermore, the positive electrode copper layer is distributed in the middle of the insulating substrate, and a gate control copper layer of the upper half-bridge switch unit electrically connected with the gate of the upper half-bridge switch unit is arranged in the middle of the positive electrode copper layer;
the output electrode copper layers are symmetrically distributed on the left side and the right side of the positive electrode copper layer, and the negative electrode copper layers are symmetrically distributed on the outer sides of the output electrode copper layers;
and grid electrode control copper layers of the lower half-bridge switch unit electrically connected with the grid electrode of the lower half-bridge switch unit are arranged on two sides of the negative electrode copper layer.
Furthermore, the upper half-bridge switch unit comprises a plurality of upper half-bridge switch chips, and the upper half-bridge switch chips are arranged in pairs and distributed in a plurality of rows in the middle of the insulating substrate; half-bridge switch unit includes a plurality of half-bridge switch chips down, half-bridge switch chip is multiseriate symmetric distribution in the left and right sides at last half-bridge switch unit down.
Furthermore, the positive electrode and the negative electrode are stacked up and down, and an insulating layer is also arranged between the positive electrode and the negative electrode.
Furthermore, a collector or a drain of the upper half-bridge switch unit is electrically connected with the positive electrode copper layer through a welding layer formed by soldering or silver sintering, and an emitter or a source of the upper half-bridge switch unit is electrically connected with the output electrode copper layer through a bonding wire; and the collector or the drain of the lower half-bridge switch unit is electrically connected with the output electrode copper layer through a welding layer formed by soldering or silver sintering, and the emitter or the source of the lower half-bridge switch unit is electrically connected with the negative electrode copper layer through a bonding wire.
Furthermore, the upper half-bridge switch unit is electrically connected with the lower half-bridge switch unit through a bonding wire, the lower half-bridge switch unit is electrically connected with the negative electrode through the bonding wire, and the bonding wire, the positive electrode, the negative electrode and the output electrode are distributed in a T shape.
Furthermore, the upper half-bridge switch chip and the lower half-bridge switch chip are both power MOSFET chips, or the upper half-bridge switch chip and the lower half-bridge switch chip are both IGBT chips.
Furthermore, diode chips are reversely connected in parallel with the upper half-bridge switch chip and the lower half-bridge switch chip.
Further, the thermistor is arranged on one side of the upper half-bridge switching unit or the lower half-bridge switching unit.
Has the advantages that: the power module with low parasitic inductance has the following beneficial effects:
1. the circuit on the insulating substrate is in a bilateral symmetry structure, so that the loop inductance can be greatly reduced;
2. the layout mode of the invention can accommodate more switch chips, which is beneficial to improving the power level of the module;
3. the bus bar lamination design of the power module can greatly reduce the inductance of the main loop;
4. the chips in the power module are electrically connected by adopting copper foils, so that the overcurrent capacity can be increased; the width of the copper foil is correspondingly widened along with the increase of the distance between the copper foil and the positive electrode or the negative electrode, so that the current sharing of the parallel chips is favorably realized;
5. the switch chips of the power module are uniformly and highly symmetrically arranged, so that the junction temperature distribution inside the module can be reduced;
6. the main electrode of the power module is welded by ultrasonic metal, so that the overcurrent capacity is fully improved, and the reliability of the module is improved;
7. the main electrodes of the power module are connected through a power supply, and the external circuit still keeps laminated connection, so that the inductance is reduced.
Drawings
Fig. 1 is a diagram of an overall appearance structure of a power module of the embodiment;
FIG. 2 is a front view of a power module of an embodiment;
FIG. 3 is a schematic diagram of the interior of a power module of an embodiment;
FIG. 4 is an exploded schematic view of a power module of an embodiment;
FIG. 5 is a block diagram of a MOSFET power module topology of an embodiment;
FIG. 6 is a topology structure diagram of the IGBT power module of the embodiment;
FIG. 7 is a front view of the interior of a prior art power module;
FIG. 8 is a comparison of a power module current loop of an embodiment and a prior art power module current loop;
FIG. 9 is a power module installation schematic of an embodiment;
fig. 10 is a schematic diagram of the overall structure of the half-bridge power module of the embodiment;
FIG. 11 is a schematic diagram of an embodiment half-bridge MOSFET power module topology;
FIG. 12 is a topology block diagram of a half-bridge IGBT power module of an embodiment;
FIG. 13 is a schematic diagram of an embodiment of an electrical connection using copper foil;
fig. 14 is a schematic diagram of an exploded structure of an embodiment using copper foil to achieve electrical connection.
Detailed Description
The technical solution of the present invention will be further explained with reference to the accompanying drawings and examples.
The embodiment provides a novel power module with low parasitic inductance and high reliability, and the purpose of reducing the parasitic inductance of a packaging structure is achieved by arranging the laminated busbars and combining the reasonable layout of circuits inside the module; meanwhile, the power terminal adopts an ultrasonic welding mode, so that the service life of the power electronic power module is prolonged.
As shown in fig. 1 to 5, the present embodiment takes a three-phase bridge structure as an example, and includes a positive electrode 1, a negative electrode 2, an output electrode 3, an outer frame, a cover plate, a heat dissipation bottom plate a, an upper half-bridge driving terminal, a lower half-bridge driving terminal, and a sampling terminal, where the positive electrode 1, the negative electrode 2, and the output electrode 3 exposed out of the plastic package outer frame are connected to a busbar of a system, the upper half-bridge driving terminal, the lower half-bridge driving terminal, and the sampling terminal are all connected to a driving PCB, and the heat dissipation bottom plate is fixed on the surface of a heat dissipation device directly or through a heat conductive silicone grease. In order to reduce the inductance of the main loop, the positive electrode 1 and the negative electrode 2 of the present embodiment are arranged in a stacked structure as shown in fig. 2, and an insulating layer is provided between the positive electrode 1 and the negative electrode 2.
Fig. 3 is an internal structure of the power module of the present embodiment, further including an insulating substrate 4, a bonding wire 5, and a thermistor 9; the insulating substrate 4 comprises a heat-conducting insulating layer and copper layers formed on the heat-conducting insulating layer, wherein the copper layers comprise a positive electrode copper layer 6 electrically connected with the positive electrode 1, a negative electrode copper layer 7 electrically connected with the negative electrode 2 and an output electrode copper layer 8 electrically connected with the output electrode 3; the positive electrode 1 and the negative electrode 2 are respectively connected with the insulating substrate 4 through ultrasonic metal; an upper half-bridge switch unit 10 and a lower half-bridge switch unit 11 are arranged on the insulating substrate 4; the upper half-bridge switch unit 10, the lower half-bridge switch unit 11, the thermistor, the upper half-bridge drive terminal, the lower half-bridge drive terminal and the sampling terminal are electrically connected with corresponding copper layers through welding layers formed by soldering or silver sintering; the surfaces of the upper half-bridge switch cell 10 and the lower half-bridge switch cell 11 are interconnected by bonding wires 5 to respective copper layers on the upper surface of the insulating substrate 4. The thermistor 9 is arranged beside the switch chip and used for monitoring the junction temperature of the switch chip in real time.
An upper half-bridge driving terminal, a lower half-bridge driving terminal and a sampling terminal of the present embodiment are directly welded on an insulating substrate 4, wherein the upper half-bridge driving terminal and the lower half-bridge driving terminal are respectively used for controlling the on and off of an upper half-bridge switching unit and a lower half-bridge switching unit; the sampling terminal comprises a current sampling terminal and a temperature sampling terminal, the current sampling terminal is electrically connected with the drain electrode or the collector electrode of the switch chip, and the temperature sampling terminal is connected with the thermistor 9.
The upper half-bridge switch unit 10 of the present embodiment includes a plurality of upper half-bridge switch chips, which are arranged in pairs and distributed in a plurality of rows at the middle position of the insulating substrate 4; the lower half-bridge switch unit 11 includes a plurality of lower half-bridge switch chips, and the lower half-bridge switch chips are multiseriate symmetric distribution in the left and right sides of the upper half-bridge switch unit 10, and the upper half-bridge switch chip and the lower half-bridge switch chip are all connected in parallel in the opposite direction with diode chips. The upper half-bridge switch chip and the lower half-bridge switch chip can both adopt power MOSFET chips, or the upper half-bridge switch chip and the lower half-bridge switch chip can both adopt IGBT chips.
In the power module, the circuit layout of the insulating substrate 4 is a bilateral symmetry loop, and the layout of the chip in the power module is shown in fig. 3; as can be seen from fig. 3, the arrangement of the chips is a symmetrical structure: the upper half-bridge switch unit is arranged in the middle of the insulating substrate, and the lower half-bridge switch units are symmetrically distributed on two sides of the upper half-bridge switch unit; the positive electrode copper layer is distributed in the middle of the insulating substrate, the output electrode copper layers are symmetrically distributed on the left side and the right side of the positive electrode copper layer, and the negative electrode copper layers are symmetrically distributed on the outer sides of the output electrode copper layers; specifically; the middle position is a positive electrode copper layer 6, an upper half-bridge switch chip is arranged, the bottom surface of the upper half-bridge switch chip is electrically connected with the positive electrode copper layer 6 in a brazing or silver sintering mode, the surface of the upper half-bridge switch chip is connected with output electrode copper layers 8 on two sides through a bonding wire 5, an upper half-bridge switch chip grid electrode control copper layer 61 is arranged in the middle of the positive electrode copper layer 6, and a positive electrode 1 is directly connected with the positive electrode copper layer 6; output electrode copper layers 8 are distributed on the left side and the right side of the positive electrode copper layer 6, a lower half-bridge switch chip is arranged on the output electrode copper layers 8, the bottom surface of the lower half-bridge switch chip is electrically connected with the output electrode copper layers 8 through soldering or silver sintering, the upper surface of the lower half-bridge switch chip is electrically connected with negative electrode copper layers 7 on the two sides through a bonding wire 5, and the output electrode copper layers 8 are connected with an output electrode 3; and negative electrode copper layers 7 are distributed on two sides of the output electrode 3, and the negative electrode copper layers 7 are connected with the negative electrodes 2.
When the upper half-bridge switch chip and the lower half-bridge switch chip of the embodiment both adopt MOSFET chips, the drain electrode of the upper half-bridge switch unit is electrically connected with the positive electrode copper layer on the insulating substrate through a solder layer formed by soldering or silver sintering, and the source electrode thereof is electrically connected with the output electrode copper layer through a bonding wire; the drain electrode of the lower half-bridge switch unit is electrically connected with the output electrode copper layer through a welding layer formed by soldering or silver sintering, and the source electrode of the lower half-bridge switch unit is electrically connected with the negative electrode copper layer through a bonding wire; a grid electrode control copper layer of the upper half-bridge switch unit electrically connected with the grid electrode of the upper half-bridge switch unit is arranged in the middle of the positive electrode copper layer; the grid electrode of the upper half-bridge switch unit is electrically connected with the grid electrode control copper layer of the upper half-bridge switch unit; and grid electrode control copper layers of the lower half-bridge switch unit electrically connected with the grid electrode of the lower half-bridge switch unit are arranged on two sides of the negative electrode copper layer, and the grid electrode of the lower half-bridge switch unit is electrically connected with the grid electrode control copper layers of the lower half-bridge switch unit. In this embodiment, the drain of the switch chip is located on the bottom surface thereof, and the source is located on the surface thereof.
When the upper half-bridge switch chip and the lower half-bridge switch chip of the embodiment both adopt IGBT chips, a collector of the upper half-bridge switch unit is electrically connected with a positive electrode copper layer through a solder layer formed by soldering or silver sintering, and an emitter thereof is electrically connected with an output electrode copper layer through a bonding wire; the collector of the lower half-bridge switch unit is electrically connected with the output electrode copper layer through a welding layer formed by soldering or silver sintering, and the emitter of the lower half-bridge switch unit is electrically connected with the negative electrode copper layer through a bonding wire. A grid electrode control copper layer of the upper half-bridge switch unit electrically connected with the grid electrode of the upper half-bridge switch unit is arranged in the middle of the positive electrode copper layer; the grid electrode of the upper half-bridge switch unit is electrically connected with the grid electrode control copper layer of the upper half-bridge switch unit; and grid electrode control copper layers of the lower half-bridge switch unit electrically connected with the grid electrode of the lower half-bridge switch unit are arranged on two sides of the negative electrode copper layer, and the grid electrode of the lower half-bridge switch unit is electrically connected with the grid electrode control copper layers of the lower half-bridge switch unit. In this embodiment, the collector of the switch chip is located on the bottom surface thereof, and the emitter is located on the surface thereof.
In this embodiment, a part of the bonding wires is replaced by a copper foil 12, that is, the copper foil 12 is used for electrically connecting the emitter or the drain of the upper half-bridge switch unit and the copper layer of the output electrode, and the width of the copper foil is widened along with the increase of the distance from the copper foil to the positive electrode in the vertical direction; the emitter or the drain of the lower half-bridge switching unit is electrically connected with the copper layer of the negative electrode by adopting a copper foil, and the width of the copper foil is widened along with the increase of the distance from the copper foil to the negative electrode in the vertical direction, as shown in fig. 13 and 14. From this can reduce the resistance in long distance current loop, the effective flow equalizing of circuit has been realized, in the use, the electric current that passes through from positive, the nearer chip of negative electrode is great, this chip often becomes invalid earlier, in order to promote the reliability of module, set up the nonconformity with the width of copper foil, adopt narrower copper foil from positive, the nearer chip of negative electrode, make the resistance of this chip route great like this, the electric current that correspondingly passes through also can reduce, thereby the effect of flow equalizing of parallelly connected chip has been realized.
In this embodiment, the upper half-bridge switch chip and the lower half-bridge switch chip are arranged in pairs, the upper half-bridge switch chip is electrically connected to the lower half-bridge switch chip by a bonding wire, the lower half-bridge switch chip is connected to the negative electrode by a bonding wire, and the bonding wires used here are distributed in a "T" shape with the positive electrode, the negative electrode, and the output electrode.
Fig. 4 shows the relationship of the layers inside the power module, wherein the solder layer can be formed by soldering solder or sintering silver paste.
Referring to fig. 5, fig. 5 is a topology structure of a MOSFET power module, and both the upper half-bridge switch chip and the lower half-bridge switch chip of the embodiment may adopt power MOSFET transistors.
Referring to fig. 6, fig. 6 is a topology structure of an IGBT power module, and both the half-bridge switch chip and the lower-upper half-bridge switch chip of the present embodiment may be IGBT chips.
Fig. 7 shows a conventional power module in which an upper half-bridge switch chip and a lower half-bridge switch chip are disposed in an up-and-down manner and interconnected by bonding wires; and this embodiment sets up upper bridge switch chip and lower bridge switch chip to arrange about, is multiseriate distribution moreover, and first half bridge switch unit is placed in the middle, and lower half bridge switch unit divide into both sides, compares with traditional power module, and its commutation loop is shorter, and the stromatolite route is longer to parasitic inductance has been reduced by a wide margin, refers to fig. 8.
Fig. 9 is a schematic connection diagram of the power module and the heat dissipation device of the present embodiment, and it can be seen from fig. 9 that: the heat dissipation bottom plate A of the power module is in contact with the heat dissipation device B through heat conduction silicone grease or other heat conduction materials, and the busbar is directly connected and fixed with the two sides of the main electrode of the power module through screw lamination.
The layout of the present embodiment is also suitable for half-bridge modules, and the appearance structure is shown in fig. 10, and the topology structure is shown in fig. 11 and 12, where the switch chip in fig. 11 is a MOSFET chip, and the switch chip in fig. 12 is an IGBT chip.
Claims (10)
1. A power module with low parasitic inductance layout comprises a positive electrode, a negative electrode, an output electrode and an insulating substrate, wherein the insulating substrate is arranged on a bottom plate, insulating layers are arranged among the positive electrode, the negative electrode, the output electrode and the bottom plate, the insulating substrate comprises a heat conduction insulating layer and a copper layer formed on the heat conduction insulating layer, and the copper layer comprises a positive electrode copper layer electrically connected with the positive electrode, a negative electrode copper layer electrically connected with the negative electrode and an output electrode copper layer electrically connected with the output electrode; the positive electrode and the negative electrode are respectively connected with the insulating substrate; the method is characterized in that: the circuit board also comprises an upper half-bridge switch unit and a lower half-bridge switch unit which are arranged on the insulating substrate;
the upper half-bridge switch unit is arranged in the middle of the insulating substrate, a collector or a drain of the upper half-bridge switch unit is electrically connected with a positive electrode copper layer on the insulating substrate, and an emitter or a source of the upper half-bridge switch unit is electrically connected with an output electrode copper layer;
the lower half-bridge switch units are symmetrically distributed on two sides of the upper half-bridge switch unit, the collector or the drain of each lower half-bridge switch unit is electrically connected with the copper layer of the output electrode, and the emitter or the source of each lower half-bridge switch unit is electrically connected with the copper layer of the negative electrode.
2. The power module of claim 1 in a low parasitic inductance topology, wherein: the emitting electrode or the drain electrode of the upper half-bridge switch unit is electrically connected with the output electrode copper layer by adopting a copper foil, and the width of the corresponding copper foil is widened along with the increase of the distance between the copper foil and the positive electrode in the vertical direction; and the emitting electrode or the drain electrode of the lower half-bridge switch unit is electrically connected with the negative electrode copper layer by adopting a copper foil, and the width of the corresponding copper foil is widened along with the increase of the distance between the copper foil and the negative electrode in the vertical direction.
3. The power module of claim 1 in a low parasitic inductance topology, wherein: the positive electrode copper layer is distributed in the middle of the insulating substrate, and a gate control copper layer of the upper half-bridge switch unit is arranged in the middle of the positive electrode copper layer; the grid electrode of the upper half-bridge switch unit is electrically connected with the grid electrode control copper layer of the upper half-bridge switch unit;
the output electrode copper layers are symmetrically distributed on the left side and the right side of the positive electrode copper layer, and the negative electrode copper layers are symmetrically distributed on the outer sides of the output electrode copper layers;
and grid control copper layers of the lower half-bridge switch unit are arranged on two sides of the negative electrode copper layer, and the grid of the lower half-bridge switch unit is electrically connected with the grid control copper layers of the lower half-bridge switch unit.
4. The power module of claim 1 in a low parasitic inductance topology, wherein: the upper half-bridge switch unit comprises a plurality of upper half-bridge switch chips, and the upper half-bridge switch chips are arranged in pairs and distributed in multiple rows in the middle of the insulating substrate; half-bridge switch unit includes a plurality of half-bridge switch chips down, half-bridge switch chip is multiseriate symmetric distribution in the left and right sides at last half-bridge switch unit down.
5. The power module of claim 1 in a low parasitic inductance topology, wherein: the positive electrode and the negative electrode are vertically stacked, and an insulating layer is also arranged between the positive electrode and the negative electrode.
6. The power module of claim 1 in a low parasitic inductance topology, wherein: the collector or the drain of the upper half-bridge switch unit is electrically connected with the positive electrode copper layer through a welding layer formed by soldering or silver sintering, and the emitter or the source of the upper half-bridge switch unit is electrically connected with the output electrode copper layer through a bonding wire; and the collector or the drain of the lower half-bridge switch unit is electrically connected with the output electrode copper layer through a welding layer formed by soldering or silver sintering, and the emitter or the source of the lower half-bridge switch unit is electrically connected with the negative electrode copper layer through a bonding wire.
7. The power module of claim 6, wherein: the upper half-bridge switch unit is electrically connected with the lower half-bridge switch unit through a bonding wire, the lower half-bridge switch unit is electrically connected with the negative electrode through the bonding wire, and the bonding wire, the positive electrode, the negative electrode and the output electrode are distributed in a T shape.
8. The power module of claim 4 in which the layout of the parasitic inductances is such that: the upper half-bridge switch chip and the lower half-bridge switch chip are both power MOSFET chips, or the upper half-bridge switch chip and the lower half-bridge switch chip are both IGBT chips.
9. The power module of claim 8 in which the parasitic inductance is reduced by: and the upper half-bridge switch chip and the lower half-bridge switch chip are also reversely connected with diode chips in parallel.
10. The power module of claim 1 in a low parasitic inductance topology, wherein: the thermistor is distributed on one side of the upper half-bridge switch unit or the lower half-bridge switch unit.
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| CN112467957A (en) * | 2020-10-10 | 2021-03-09 | 山东斯力微电子有限公司 | Intelligent high-power IGBT module |
| CN112687644B (en) * | 2020-12-16 | 2024-04-19 | 株洲中车时代半导体有限公司 | Integrated radiator IGBT power device with low-inductance composite busbar structure |
| WO2022193255A1 (en) * | 2021-03-18 | 2022-09-22 | Huawei Technologies Co., Ltd. | High-symmetrical semiconductor arrangement |
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