CN113725185A - 一种可实现芯片垂直堆叠的Sn基钎料及其键合方法 - Google Patents

一种可实现芯片垂直堆叠的Sn基钎料及其键合方法 Download PDF

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CN113725185A
CN113725185A CN202111015355.4A CN202111015355A CN113725185A CN 113725185 A CN113725185 A CN 113725185A CN 202111015355 A CN202111015355 A CN 202111015355A CN 113725185 A CN113725185 A CN 113725185A
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张亮
李志豪
郭永环
何鹏
李木兰
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Xiamen Jissyu Solder Co ltd
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Abstract

本发明公开了一种可实现芯片垂直堆叠的Sn基钎料及其键合方法,其成分包括氧化铝纳米纤维、纳米钯颗粒、Bi和Sn。本发明利用氧化铝纳米纤维、纳米钯颗粒、Bi和Sn四者耦合作用强化焊点,添加氧化铝纳米纤维会将富Bi和IMC晶粒紧紧缠绕在一起,而纳米钯颗粒会聚集在富Bi和IMC晶粒晶界处,具有钉扎氧化铝纳米纤维和晶界的作用,氧化铝纳米纤维和纳米钯颗粒耦合强化焊点,因此焊点在服役期间仍然保持较高的强度和使用寿命,且具有良好的润湿性和较高的焊点力学性能,能够满足高密度封装以及三维封装电子器件芯片垂直堆叠的高可靠性需求,可用于波峰焊、回流焊以及其他钎焊方法。

Description

一种可实现芯片垂直堆叠的Sn基钎料及其键合方法
技术领域
本发明涉及一种Sn基钎料及其键合方法,具体是一种可实现芯片垂直堆叠的Sn基钎料及其键合方法,属于芯片级封装技术领域。
背景技术
随着摩尔定律的发展,电子器件的微型化和多功能化成为集成电路产业发展的引擎。芯片在三维空间的垂直堆叠互连成功推动电子产品向微型化、集成化和多功能化方向发展。堆叠技术主要应用于各种硬件,包括3D堆叠存储器、图形处理单元(GPU)、现场可编程门阵列(FPGA)和CMOS图像传感器(CIS),根据研究机构YOLE的调研报告预测,到2023年,芯片堆叠技术市场的总价值将超过55亿美元,年增长率为27%。因此,芯片在三维空间的堆叠技术以及相关的可靠性问题将成为业界关注的重要研究课题。
为了实现芯片在三维空间的垂直堆叠,业界研究学者提出采用高熔点金属间化合物实现芯片的垂直堆叠,主要是以Sn(熔点231℃)作为互连材料,在一定的压力和温度(高于Sn熔点)条件下,与金属层(UBM)或铜柱(Cu Pillar)之间发生液-固互扩散反应,形成高熔点金属间化合物(IMC),例如,Cu6Sn5熔点为415℃,Cu3Sn为676℃,满足三维封装芯片堆叠“低温键合、高温服役”的要求。但是由于焊点多为脆性金属间化合物焊点,三维封装器件在服役期间由于服役环境的变化、焊点容易成为应力集中区,进而导致脆性的金属间化合物易产生裂纹、导致焊点的失效。因此利用高性能的Sn基钎料实现芯片垂直堆叠的高性能需求是满足芯片垂直堆叠可靠性的前提。
现有技术中出现主要采取添加合金元素或者纳米颗粒以提高钎料和焊点性能的系列Sn基无铅钎料,选择的元素通常有:Bi、Ni、Co、Sb等。如美国专利US10434608B2公开的Sn基无铅钎料包括(1.2~4.5%)Ag、(0.25~0.75%)Cu、(1.0~5.8%)Bi、(0.01~0.15%)Ni,其余为Sn,通过优化合金元素的含量,钎料的润湿性、焊点剪切性能和热疲劳阻抗得到一定的增强,该专利主要针对常规SMT(Surface Mounted Technology表面贴装技术)焊点,焊点由金属间化合物层和钎料基体组成,常规SMT焊点由于焊接时间较短,因此钎料基体占据了大部分的焊点,但对于高密度封装以及三维封装的微小焊点而言,金属间化合物则占据了大部分的焊点,这就导致性能将会完全不同,因此该专利钎料并不适用于高密度封装以及三维封装电子器件。再如中国专利ZL201810286715.6公开的Sn基无铅钎料包括(3.0%~3.1%)Ag、(0.7~1.0%)Cu、(3.0~5.0%)Sb、(3.1~4.5%)Bi、(0.01~0.03%)Ni、(0.008~0.15%)Co,其余为Sn,该专利通过添加一定量的Ag、Cu、Sb、Bi、Ni和Co,实现可以在温差较大、负荷振动苛刻环境下抑制焊点裂纹的扩展,该专利主要为Sn-Ag-Cu钎料添加微量的Sb和Bi以及痕量的Ni和Co,但是针对三维封装全金属间化合物焊点而言,需要长时间将钎料完全转化为金属间化合物,对于该专利成分Sb、Ni和Co也会完全转化为金属间化合物,因此该专利钎料也不适用于高密度封装以及三维封装电子器件。
发明内容
针对上述问题,本发明提供一种可实现芯片垂直堆叠的Sn基钎料,能够实现显著提高芯片垂直堆叠互连的强度,且具有良好的润湿性和较高的焊点力学性能,能够满足高密度封装以及三维封装电子器件芯片垂直堆叠的高可靠性需求,可用于波峰焊、回流焊以及其他钎焊方法。
为实现上述目的,本可实现芯片垂直堆叠的Sn基钎料的成分包括氧化铝纳米纤维、纳米钯颗粒、Bi和Sn,各成分的质量百分比为:氧化铝纳米纤维含量为1.0~5.0%,纳米钯颗粒含量为3.0~15.0%,Bi含量为50~60%,其余为Sn。
作为本发明的进一步改进方案,氧化铝纳米纤维和纳米钯颗粒的添加量比例为1:3。
作为本发明的一种实施方式,本可实现芯片垂直堆叠的Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为3.0%,纳米钯颗粒含量为3.0%,Bi含量为58%,其余为Sn。
作为本发明的一种实施方式,本可实现芯片垂直堆叠的Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.0%,纳米钯颗粒含量为3.0%,Bi含量为56%,其余为Sn。
作为本发明的一种实施方式,本可实现芯片垂直堆叠的Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.0%,纳米钯颗粒含量为3.0%,Bi含量为58%,其余为Sn。
一种可实现芯片垂直堆叠的Sn基钎料的键合方法,将Sn粉、Bi粉、纳米钯颗粒和氧化铝纳米纤维与松香树脂、触变剂、稳定剂、活性辅助剂、活性剂和溶剂混合制备焊膏,通过喷印技术在芯片金属层表面制备凸点,采用瞬时液相键合实现芯片垂直堆叠互连。
与现有技术相比,本可实现芯片垂直堆叠的Sn基钎料利用氧化铝纳米纤维、纳米钯颗粒、Bi和Sn四者耦合作用强化焊点,Bi含量为50~60%,主要是为降低钎料的熔化温度,控制在150℃左右,在低温键合实现芯片垂直堆叠后,焊点完全由金属间化合物(IMC)和富Bi相组成,在长时间服役过程中富Bi相和IMC晶粒晶界会成为整个焊点的薄弱区域,添加氧化铝纳米纤维会形成类似网状的结构分布在焊点内部组织中,氧化铝纳米纤维会将富Bi和IMC晶粒紧紧缠绕在一起,而纳米钯颗粒会聚集在富Bi和IMC晶粒晶界处,具有钉扎氧化铝纳米纤维和晶界的作用,氧化铝纳米纤维和纳米钯颗粒耦合强化焊点,因此焊点在服役期间仍然保持较高的强度和使用寿命,且具有良好的润湿性和较高的焊点力学性能,能够满足高密度封装以及三维封装电子器件芯片垂直堆叠的高可靠性需求,可用于波峰焊、回流焊以及其他钎焊方法。
附图说明
图1是本发明的改性机理示意图;
图2是本发明在其他成分不变的情况下、不同氧化铝纳米纤维含量的9组实验例的剪切性能示图;
图3是本发明Sn-58Bi-1.0氧化铝纳米纤维-3.0纳米钯颗粒与不含氧化铝纳米纤维和纳米钯颗粒的无铅钎料(Sn-58Bi)在焊点服役期间的剪切性能示图。
具体实施方式
本可实现芯片垂直堆叠的Sn基钎料采用微量的氧化铝纳米纤维、纳米钯颗粒、Bi和Sn四者耦合,能够实现显著提高芯片垂直堆叠互连的强度。
本发明的机理:为了实现芯片垂直堆叠高可靠性互连,利用氧化铝纳米纤维、纳米钯颗粒、Bi和Sn四者耦合作用强化焊点,简单的改性机理示意图如图1所示,Bi含量为50~60%,主要是为降低钎料的熔化温度,控制在150℃左右,在低温键合实现芯片垂直堆叠后,焊点完全由金属间化合物(IMC)和富Bi相组成,在长时间服役过程中富Bi相和IMC晶粒晶界会成为整个焊点的薄弱区域,添加氧化铝纳米纤维会形成类似网状的结构分布在焊点内部组织中,氧化铝纳米纤维会将富Bi和IMC晶粒紧紧缠绕在一起,而纳米钯颗粒会聚集在富Bi和IMC晶粒晶界处,具有钉扎氧化铝纳米纤维和晶界的作用,氧化铝纳米纤维和纳米钯颗粒耦合强化焊点,因此焊点在服役期间仍然保持较高的强度和使用寿命。考虑到氧化铝纳米纤维和纳米钯颗粒的耦合作用,最大限度发挥强化作用,其中氧化铝纳米纤维和纳米钯颗粒的添加量比例控制为1:3。
下面结合实施例对本发明进行具体说明。下述16个实施例所使用的材料为Sn粉、Bi粉、纳米钯颗粒、氧化铝纳米纤维,键合方法为:将Sn粉、Bi粉、纳米钯颗粒和氧化铝纳米纤维与松香树脂、触变剂、稳定剂、活性辅助剂、活性剂和溶剂混合制备焊膏,通过喷印技术在芯片金属层表面制备凸点,采用瞬时液相键合实现芯片垂直堆叠互连。
实施例1:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.0%,纳米钯颗粒含量为3.0%,Bi含量为56%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在138.4℃左右,液相线温度在140.3℃左右。
实施例2:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.1%,纳米钯颗粒含量为3.3%,Bi含量为56%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在138.5℃左右,液相线温度在140.6℃左右。
实施例3:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.2%,纳米钯颗粒含量为3.6%,Bi含量为56%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在138.7℃左右,液相线温度在140.9℃左右。
实施例4:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.3%,纳米钯颗粒含量为3.9%,Bi含量为56%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在139.0℃左右,液相线温度在141.1℃左右。
实施例5:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.4%,纳米钯颗粒含量为4.2%,Bi含量为56%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在139.5℃左右,液相线温度在141.5℃左右。
实施例6:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.5%,纳米钯颗粒含量为4.5%,Bi含量为56%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在140℃左右,液相线温度在142.1℃左右。
实施例7:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.6%,纳米钯颗粒含量为4.8%,Bi含量为56%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在141℃左右,液相线温度在143.2℃左右。
实施例8:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.7%,纳米钯颗粒含量为5.1%,Bi含量为56%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在142.5℃左右,液相线温度在145.1℃左右。
实施例9:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.7%,纳米钯颗粒含量为5.1%,Bi含量为56%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在143.6℃左右,液相线温度在147.0℃左右。
实施例10:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.8%,纳米钯颗粒含量为5.4%,Bi含量为56%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在147.1℃左右,液相线温度在150℃左右。
实施例11:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.0%,纳米钯颗粒含量为3.0%,Bi含量为50%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在144.2℃左右,液相线温度在154.0℃左右。
实施例12:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.1%,纳米钯颗粒含量为3.3%,Bi含量为50%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在144.3℃左右,液相线温度在155.0℃左右。
实施例13:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.3%,纳米钯颗粒含量为3.9%,Bi含量为50%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在144.7℃左右,液相线温度在156.1℃左右。
实施例14:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为1.4%,纳米钯颗粒含量为4.2%,Bi含量为50%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在145.9℃左右,液相线温度在158.0℃左右。
实施例15:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为3.0%,纳米钯颗粒含量为9.0%,Bi含量为59%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在188.7℃左右,液相线温度在205.5℃左右。
实施例16:
本发明Sn基钎料的成分及质量百分比为:氧化铝纳米纤维含量为5.0%,纳米钯颗粒含量为15%,Bi含量为60%,余量为Sn。
钎料温度性能检测:考虑试验误差的前提下,固相线温度在190.5℃左右,液相线温度在215.5℃左右。
上述16个实施例中,实施例1的固相线温度和液相线温度均相对于其他实施例为低,可以获得较低熔化温度、实现降低焊接温度。
另外,在其他成分不变的情况下,不同氧化铝纳米纤维含量焊点的剪切强度有所不同,选用如下表1所示的9组典型含氧化铝纳米纤维、纳米钯颗粒、Bi和Sn的本发明无铅钎料实验例,9组实验例的焊点剪切性能如图2所示,由图2可见,第6组实验例的焊点剪切性能达到最大值。
表1典型含氧化铝纳米纤维、纳米钯颗粒、Bi和Sn的9组实验例合金成分
Figure BDA0003239773150000071
为验证本发明无铅钎料在服役期间具有优良的焊点剪切性能和较高的疲劳寿命,选取Sn-58Bi-1.0氧化铝纳米纤维-3.0纳米钯颗粒对比不含氧化铝纳米纤维和纳米钯颗粒的无铅钎料(Sn-58Bi)进行热循环实验,模拟焊点服役期间的工况,二者在焊点服役期间的剪切性能如图3所示,由图3可见,本发明Sn-58Bi-1.0氧化铝纳米纤维-3.0纳米钯颗粒的焊点剪切性能也明显大于不含氧化铝纳米纤维和纳米钯颗粒的无铅钎料(Sn-58Bi)的焊点剪切性能,即,本发明的氧化铝纳米纤维、纳米钯颗粒、Bi和Sn四者耦合可以显著提高焊点剪切强度。

Claims (6)

1.一种可实现芯片垂直堆叠的Sn基钎料,其特征在于,其成分包括氧化铝纳米纤维、纳米钯颗粒、Bi和Sn,各成分的质量百分比为:氧化铝纳米纤维含量为1.0~5.0%,纳米钯颗粒含量为3.0~15.0%,Bi含量为50~60%,其余为Sn。
2.根据权利要求1所述的可实现芯片垂直堆叠的Sn基钎料,其特征在于,氧化铝纳米纤维和纳米钯颗粒的添加量比例为1:3。
3.根据权利要求1所述的可实现芯片垂直堆叠的Sn基钎料,其特征在于,其成分及质量百分比为:氧化铝纳米纤维含量为3.0%,纳米钯颗粒含量为9.0%,Bi含量为50%,其余为Sn。
4.根据权利要求1所述的可实现芯片垂直堆叠的Sn基钎料,其特征在于,其成分及质量百分比为:氧化铝纳米纤维含量为1.0%,纳米钯颗粒含量为3.0%,Bi含量为56%,其余为Sn。
5.根据权利要求1所述的可实现芯片垂直堆叠的Sn基钎料,其特征在于,其成分及质量百分比为:氧化铝纳米纤维含量为1.0%,纳米钯颗粒含量为3.0%,Bi含量为58%,其余为Sn。
6.一种如权利要求1所述的可实现芯片垂直堆叠的Sn基钎料的键合方法,其特征在于,将Sn粉、Bi粉、纳米钯颗粒和氧化铝纳米纤维与松香树脂、触变剂、稳定剂、活性辅助剂、活性剂和溶剂混合制备焊膏,通过喷印技术在芯片金属层表面制备凸点,采用瞬时液相键合实现芯片垂直堆叠互连。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114273814A (zh) * 2022-01-13 2022-04-05 郑州机械研究所有限公司 一种钎料及其制备方法
CN117483890A (zh) * 2023-12-06 2024-02-02 兰州工业学院 一种高性能近单晶Sn基微纳焊点及其制备方法

Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4861410A (en) * 1985-02-25 1989-08-29 University Of Florida Method of joining metal oxide containing ceramic bodies
JPH06134569A (ja) * 1992-10-26 1994-05-17 Toshiba Corp 粒子分散銅のろう付方法
JP2001244622A (ja) * 2000-03-01 2001-09-07 Hitachi Ltd 電子回路装置
JP2003311469A (ja) * 2002-04-26 2003-11-05 Senju Metal Ind Co Ltd ソルダペースト、電子部品およびステップ・ソルダリング方法
US20050067688A1 (en) * 2003-09-26 2005-03-31 Tessera, Inc. Structure and method of making capped chips including vertical interconnects having stud bumps engaged to surfaces of said caps
US20090130435A1 (en) * 1999-07-23 2009-05-21 Aghajanian Michael K Intermetallic-containing composite bodies, and methods for making same
JP2010120034A (ja) * 2008-11-18 2010-06-03 Nhk Spring Co Ltd ろう付方法及びその方法による接合部材
CN102513720A (zh) * 2011-12-23 2012-06-27 哈尔滨工业大学深圳研究生院 一种高性能锡基钎料合金及其制备方法
JP2013163207A (ja) * 2012-02-10 2013-08-22 Nihon Superior Co Ltd Sn−Bi系はんだ合金
JP2014213337A (ja) * 2013-04-24 2014-11-17 三井金属鉱業株式会社 半田合金
CN105047645A (zh) * 2015-06-26 2015-11-11 江苏师范大学 一种用于三维封装芯片堆叠的Sn基互连材料
WO2016099580A2 (en) * 2014-12-23 2016-06-23 Lupino James John Three dimensional integrated circuits employing thin film transistors
JP2018047500A (ja) * 2016-09-23 2018-03-29 住友金属鉱山株式会社 Bi基はんだ合金及びその製造方法、並びに、そのはんだ合金を用いた電子部品及び電子部品実装基板
CN109175769A (zh) * 2018-09-30 2019-01-11 苏州优诺电子材料科技有限公司 连续纤维增强Sn-Bi-Zn系无铅焊料及其制备方法
KR20190034008A (ko) * 2017-09-22 2019-04-01 서울시립대학교 산학협력단 무연 솔더 합금 조성물 및 이의 제조방법
JP6528257B1 (ja) * 2018-07-23 2019-06-12 大学共同利用機関法人自然科学研究機構 アルミナ分散強化銅のろう付接合方法
CN112756843A (zh) * 2021-01-11 2021-05-07 杭州华光焊接新材料股份有限公司 一种锡铋钎料及其制备方法

Patent Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4861410A (en) * 1985-02-25 1989-08-29 University Of Florida Method of joining metal oxide containing ceramic bodies
JPH06134569A (ja) * 1992-10-26 1994-05-17 Toshiba Corp 粒子分散銅のろう付方法
US20090130435A1 (en) * 1999-07-23 2009-05-21 Aghajanian Michael K Intermetallic-containing composite bodies, and methods for making same
JP2001244622A (ja) * 2000-03-01 2001-09-07 Hitachi Ltd 電子回路装置
JP2003311469A (ja) * 2002-04-26 2003-11-05 Senju Metal Ind Co Ltd ソルダペースト、電子部品およびステップ・ソルダリング方法
US20050067688A1 (en) * 2003-09-26 2005-03-31 Tessera, Inc. Structure and method of making capped chips including vertical interconnects having stud bumps engaged to surfaces of said caps
JP2010120034A (ja) * 2008-11-18 2010-06-03 Nhk Spring Co Ltd ろう付方法及びその方法による接合部材
CN102513720A (zh) * 2011-12-23 2012-06-27 哈尔滨工业大学深圳研究生院 一种高性能锡基钎料合金及其制备方法
JP2013163207A (ja) * 2012-02-10 2013-08-22 Nihon Superior Co Ltd Sn−Bi系はんだ合金
JP2014213337A (ja) * 2013-04-24 2014-11-17 三井金属鉱業株式会社 半田合金
WO2016099580A2 (en) * 2014-12-23 2016-06-23 Lupino James John Three dimensional integrated circuits employing thin film transistors
CN105047645A (zh) * 2015-06-26 2015-11-11 江苏师范大学 一种用于三维封装芯片堆叠的Sn基互连材料
JP2018047500A (ja) * 2016-09-23 2018-03-29 住友金属鉱山株式会社 Bi基はんだ合金及びその製造方法、並びに、そのはんだ合金を用いた電子部品及び電子部品実装基板
KR20190034008A (ko) * 2017-09-22 2019-04-01 서울시립대학교 산학협력단 무연 솔더 합금 조성물 및 이의 제조방법
JP6528257B1 (ja) * 2018-07-23 2019-06-12 大学共同利用機関法人自然科学研究機構 アルミナ分散強化銅のろう付接合方法
CN109175769A (zh) * 2018-09-30 2019-01-11 苏州优诺电子材料科技有限公司 连续纤维增强Sn-Bi-Zn系无铅焊料及其制备方法
CN112756843A (zh) * 2021-01-11 2021-05-07 杭州华光焊接新材料股份有限公司 一种锡铋钎料及其制备方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114273814A (zh) * 2022-01-13 2022-04-05 郑州机械研究所有限公司 一种钎料及其制备方法
CN117483890A (zh) * 2023-12-06 2024-02-02 兰州工业学院 一种高性能近单晶Sn基微纳焊点及其制备方法
CN117483890B (zh) * 2023-12-06 2024-04-16 兰州工业学院 一种近单晶Sn基微纳焊点及其制备方法

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