CN113711343A - 用于吸附用于沉积工艺的掩模的基板支撑件 - Google Patents
用于吸附用于沉积工艺的掩模的基板支撑件 Download PDFInfo
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
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Abstract
本公开内容的实施方式包括用于在沉积腔室中将掩模静电耦接到基板支撑件的方法和设备。在一个实施方式中,公开了一种基板支撑件,所述基板支撑件包括:基板接收表面;凹陷部分,所述凹陷部分围绕所述基板接收表面的周边设置;静电吸盘,所述静电吸盘设置在所述基板接收表面下方;和多个可压缩按钮,所述多个可压缩按钮设置在形成于与所述静电吸盘形成电路的所述凹陷部分中的相应开口内。
Description
背景
领域
本公开内容的实施方式涉及用于固定在沉积工艺(诸如在电子装置的制造中使用的等离子体增强化学气相沉积(PECVD)工艺或原子层沉积(ALD)工艺)中所利用的掩模的方法和设备。特别地,本公开内容的实施方式涉及在用PECVD和/或ALD工艺进行的有机发光二极管(OLED)显示装置的制造中的封装工艺中所利用的金属阴影掩模的固定。
相关技术的说明
有机发光二极管(OLED)用于制造用于显示信息的电视机屏幕、计算机监视器、移动电话、其他手持式装置等。典型的OLED可包括安置在两个电极之间的有机材料层,这些有机材料层全部以形成具有可单独地通电的像素的矩阵显示面板的方式沉积在基板上。OLED一般置于两个玻璃面板之间,并且这些玻璃面板的边缘被密封以将OLED封装在这些玻璃面板中。
在这样的显示装置的制造中遇到许多挑战。在一些制造步骤中,将OLED材料封装在一个或多个层中以防止水分损坏OLED材料。在这些工艺期间,利用一个或多个掩模来屏蔽基板的不包括OLED材料的部分。为了控制沉积,相对于基板小心地定位掩模。这些工艺中所利用的掩模典型地是具有相对低的热膨胀系数的金属或金属合金。然而,在处理期间,掩模典型地相对于基板未对准和/或错位。未对准或错位一般意指掩模不接近基板。当掩模如此未对准和/或错位时,在基板上出现阴影效应并且/或者在掩模下方形成错误涂层。前述问题中的一者或两者会产生问题,其中一个问题是最终显示产品的部分的“不均效应(muraeffect)”或“模糊(clouding)”。
因此,需要用于改进在OLED显示装置形成期间掩模的定位的方法和设备。
概述
本公开内容的实施方式包括用于在沉积腔室中将掩模静电耦接到基板支撑件的方法和设备。在一个实施方式中,公开了一种基板支撑件,所述基板支撑件包括:基板接收表面;凹陷部分,所述凹陷部分围绕所述基板接收表面的周边设置;静电吸盘,所述静电吸盘设置在所述基板接收表面下方;和多个可压缩按钮,所述多个可压缩按钮设置在形成于与所述静电吸盘形成电路的所述凹陷部分中的相应开口内。
在另一个实施方式中,公开了一种基板支撑件,所述基板支撑件包括:主体,所述主体包含导电材料;基板接收表面,所述基板接收表面包括粘附到所述主体的介电层,其中所述主体包括围绕所述基板接收表面的周边设置的凹陷部分;静电吸盘,所述静电吸盘设置在所述基板接收表面下方;和多个可压缩按钮,所述多个可压缩按钮设置在形成于与所述静电吸盘形成电路的所述凹陷部分中的相应开口内。
在另一个实施方式中,公开了一种基板支撑件,所述基板支撑件包括:主体,所述主体包含导电材料;基板接收表面,所述基板接收表面包括粘附到所述主体的介电层,其中所述主体包括围绕所述基板接收表面的周边设置的凹陷部分,并且所述基板接收表面包括沟槽图案;静电吸盘,所述静电吸盘设置在所述基板接收表面下方的介电层中;和多个可压缩按钮,所述多个可压缩按钮设置在形成于与所述静电吸盘形成电路的所述凹陷部分中的相应开口内。
附图简要说明
为了可详细地理解上述特征的方式,可参考实施方式来得到对以上简要地概述的本公开内容的实施方式的更特别的描述,其中一些实施方式在附图中图示。然而,应注意,附图仅图示典型的实施方式,并且因此不应视为对本公开内容的范围的限制,因为本公开内容可允许其他等效实施方式。
图1是根据一个实施方式的等离子体增强化学气相沉积(PECVD)腔室的示意性横截面图。
图2是在图1的PECVD腔室的腔室主体中使用的内部腔室部件的分解等距视图。
图3是如本文所公开的基板支撑件的一部分的一个实施方式的截面侧视图。
图4A-图4C是具有不同的电配置的基板支撑件和静电吸盘的部分的示意性截面图。
图5A是根据另一个实施方式的基板支撑件的一部分的截面侧视图。
图5B是图5A的基板支撑件的放大图。
图6是基板支撑件的主体和掩模框架的一部分的截面图,示出了可压缩按钮的一个实施方式。
为了便于理解,已经尽可能地使用相同的参考数字来标示各图共有的相同元件。设想的是,一个实施方式中公开的要素可有益地用于其他实施方式上,而无需具体地叙述。
具体说明
本公开内容的实施方式包括用于使在沉积腔室中使用的阴影掩模电接地的方法和设备。掩模可用于等离子体增强化学气相沉积(PECVD)工艺腔室中,所述工艺腔室可操作以相对于基板对准掩模、将掩模定位在基板上、并且将封装层沉积在形成于基板上的OLED材料上。本文描述的实施方式可与其他类型的工艺腔室一起使用并且不限于与PECVD工艺腔室一起使用。本文描述的实施方式可与其他类型的沉积工艺一起使用,并且不限于用于封装形成于基板上的OLED。本文描述的实施方式可与各种类型、形状和大小的掩模和基板一起使用。此外,可受益于本文公开的掩模的合适腔室可从作为加利福尼亚州圣克拉拉市应用材料公司(Applied Materials,Inc.,Santa Clara,CA)的子公司的加利福尼亚州圣克拉拉市的美国AKT公司(AKT America,Inc.,Santa Clara,CA)获得。
图1是根据一个实施方式的PECVD腔室100的示意性横截面图。PECVD腔室100包括腔室主体102,腔室主体102具有穿过一个或多个壁的开口104,以允许一个或多个基板106和掩模108插入腔室主体102中。基板106在处理期间与扩散器113相对地设置在基板支撑件110上。基板支撑件110包括基板接收表面112,基板接收表面112具有形成在基板接收表面112中的多个沟槽115。多个沟槽115用于向定位在多个沟槽115上的基板106提供背侧气体。来自多个沟槽115的背侧气体实现定位在基板支撑件110上的基板106的温度均匀性。背侧气体由气源129提供。气体通过设置在支撑基板支撑件110的杆130中的导管而提供到沟槽115。
扩散器113具有穿过扩散器113而形成的一个或多个开口114,以允许处理气体或处理材料进入介于扩散器113与基板106之间的处理空间116。处理材料可以是含硅气体、含铝气体、聚合物材料以及载气和/或反应气体,这些气体在形成于基板106上的OLED装置上形成封装层。
基板106可用于形成OLED显示器,其中OLED通过在PECVD腔室100中的顺序沉积工艺而形成在基板106的表面上。基板106可以是玻璃基板、聚合物基板或用于形成电子装置的其他合适材料。基板106可以是刚性或柔性的。基板106可用于形成单个显示器或多个显示器。每个显示器包括多个OLED,这些OLED被耦接到围绕每个显示器的周边而形成的电接触层。在制造期间,每个显示器的OLED部分被封装在一个或多个层中,以保护OLED不受环境影响。所述层可包含氮化硅、氧化铝和/或聚合物材料中的一种或上述项的组合。封装材料可通过PECVD工艺在PECVD腔室100中沉积。掩模108用于在封装材料的沉积期间屏蔽OLED的电接触层。掩模108包括掩模框架118和多个开放区域或槽121。每个槽121的大小可根据每个显示器的OLED部分的大小来设定。封装材料穿过槽121沉积在每个显示器的OLED部分上。在每个槽121外侧且在每个槽121之间的是条带120,条带120在封装工艺期间屏蔽电接触层。
基板支撑件110还包括加热器117,加热器117加热定位在基板支撑件110上的基板106。基板支撑件110还包括电极119。电极119用于将基板106和/或掩模108吸附到基板支撑件110。电极119被配置为静电吸盘,静电吸盘用于相对于基板106固定掩模108。电极119耦接到电源127。
一个或多个可压缩耦接器(coupler)125可用于相对于基板支撑件110对准掩模108。包括掩模框架118和条带120的掩模108由导电材料(诸如金属合金材料)制成。在一个实施方式中,掩模108包含具有低热膨胀系数的材料。金属合金的示例包括合金(Ni-Co)和合金(Ni-Fe)。基板支撑件110可由导电材料(诸如铝)制成。在一个实现方式中,可压缩耦接器125可由起到将掩模108电耦接到基板支撑件110的作用的导电材料制成。因此,在PECVD处理期间积聚在基板106和/或掩模108上的电子可穿过掩模108、可压缩耦接器125和基板支撑件110被传递到接地电位或在掩模108、可压缩耦接器125和基板支撑件110上被传递到接地电位。
为了进行处理,掩模108初始地通过开口104插入到PECVD腔室100中,并且设置在多个运动对准元件122上。基板支撑件110设置在耦接到致动器123的杆130上。在PECVD腔室100中的基板支撑件110的提升可由致动器123控制。当基板支撑件110下降到与开口104相邻的水平时,基板106可穿过开口104插入并且设置在延伸穿过基板支撑件110的多个升降杆124上。然后,基板支撑件110升高以与基板106相遇,使得基板106被支撑在基板支撑件110上。基板106可在处于基板支撑件110上时对准。
一旦基板106在基板支撑件110上对准,一个或多个可视化系统126就确定掩模108是否适当地对准在基板106上方。如果掩模108未被适当地对准,则一个或多个致动器128移动一个或多个运动对准元件122,以调整掩模108相对于基板支撑件110的位置。然后,一个或多个可视化系统126可重新检查掩模108的对准以验证对准。
一旦掩模108适当地对准在基板106上方,掩模108就被下降到基板106上,并且基板支撑件110升高,直到阴影框架132接触掩模108。在搁置在掩模108上之前,阴影框架132在腔室主体102中设置在从腔室主体102的一个或多个内壁延伸的突架134上。基板支撑件110继续升高,直到基板106、掩模108和阴影框架132与扩散器113相对地设置在处理位置中。
一旦掩模108被适当地对准,电极119就被通电以相对于基板106有效地固定掩模108。然后,将处理材料从一个或多个气源136输送通过形成于背板138中的开口,同时将电偏置提供到扩散器113以在扩散器113与基板106之间的处理空间116中形成等离子体。或者,远程等离子体源140可激发处理气体,那时,从一个或多个气源136输送处理气体,以将等离子体提供到处理空间116。处理期间的温度可为约80摄氏度(℃)至约100℃或更高。
期望在掩模108与基板106之间有良好接触,以便控制封装层的沉积和/或防止在槽121的边缘处的“阴影”效应。例如,条带120应直接地落在基板106上,以在沉积期间遏制封装材料。使用如本文公开的电极119的基板支撑件110促进在掩模108与基板106之间的接触以防止掩模108与基板106之间的不充分接触。
当在掩模108与基板106之间存在不充分接触时,封装材料可覆盖基板106的应该被掩模108屏蔽的部分。然而,电极119最小化或消除在掩模108与基板106之间的任何不充分接触。在掩模108与基板106之间的增强的接触使阴影和/或不均(mura)效应最小化,这增加产量。在掩模108与基板106之间的增强的接触还实现在基板106上的围绕OLED显示器的窄边框(bezel)或零边框。
图2是在图1的PECVD腔室100的腔室主体102中使用的内部腔室部件的分解等距视图。虽然在图2中基板106从基板支撑件110分解出,但是在处理期间基板106搁置在基板支撑件110的基板接收表面112上。基板支撑件110典型地由铝材料制成。基板接收表面112包括静电吸盘200(具有嵌入在静电吸盘200中的电极119(图1中示出))。静电吸盘200包括用于背侧气体施加的多个沟槽115。
凹陷表面202设置在基板支撑件110的基板接收表面112的平面下方。凹陷表面202包括多个可压缩耦接器125。在一个实施方式中,可压缩耦接器125中的每一个可以是可压缩按钮(button)205。基板106至少部分地被掩模108覆盖,并且阴影框架132至少部分地覆盖掩模108。阴影框架132典型地由铝材料制成。掩模108和阴影框架132可包括大于约0.5米(m)长度×0.5m宽度的尺寸。开口210示出在基板支撑件110中,以用于使一个或多个运动对准元件122(图1中示出)进入以延伸穿过开口210并且接触掩模108和/或相对于基板106移动掩模108,以确保基板106与掩模108之间的适当对准。
掩模框架118还包括在掩模框架118的下表面上的第一侧面215和与第一侧面215相对的第二侧面220。第二侧面220可包括多个凹入部225,凹入部225与阴影框架132的下表面上的突出部(未示出)配合。凹入部225和突出部(未示出)促进阴影框架132与掩模108的转换位置和对准。第一侧面215通过第一外侧壁230而与第二侧壁220连结。阴影框架118还包括从第二侧面220的平面突出的凸起区域235。条带120耦接到凸起区域235的上表面。条带120可以是紧固到掩模框架118的大体上平面的矩形构件。共同地,条带120形成掩模片240,掩模片240具有穿过掩模片240而形成的槽121。条带120在与第一侧面215和第二侧面220中的一者或两者的平面大体上平行的平面中从凸起区域235向内地突出。
图3是如本文所公开的基板支撑件110的一部分的一个实施方式的截面侧视图。掩模片240被示出为耦接到掩模框架118,并且定位在基板106上方。阴影框架132在图3中示出在基板支撑件110的凹陷表面202上方,并且掩模框架118的一部分定位在基板106的边缘上方。基板106、掩模108和阴影框架132的位置描绘用于封装工艺的处理位置。
基板支撑件110包括由导电材料(诸如钛或铝)制成的主体300。静电吸盘305设置在主体300的上表面上。静电吸盘305基本上由一个(或多个)介电层和嵌入在静电吸盘305中的电极119组成。多个沟槽115被压印(emboss)或以其他方式形成在静电吸盘305的介电材料的上表面中。
基板支撑件110还包括定位在形成于凹陷表面202中的凹坑(pocket)310中的可压缩按钮205中的一者。凹坑310的大小被设定以接收掩模108的掩模框架118。在一个实现方式中,如果可压缩按钮205具有介电性质,则可压缩按钮205包含陶瓷材料。在其他实现方式中,如果期望导电性质,则可压缩按钮205是具有金属涂层或导电涂层的陶瓷。可压缩按钮205由弹簧(未示出)偏置以在凹陷表面202与掩模框架118的表面之间提供间隙320。间隙320防止在掩模框架118与基板支撑件110的接近表面之间的电连续性。
附加地,图3中示出的组件包括多个可压缩搁置按钮315。可压缩搁置按钮315中的一者定位在基板支撑件110的在可压缩按钮205和/或凹坑310外侧的凹陷表面202上。可压缩搁置按钮315中的另一者定位在掩模108与阴影框架132之间。所有可压缩搁置按钮315都包含介电材料,诸如陶瓷材料。尽管在图3的视图中仅示出两个可压缩搁置按钮315,但是包括了多个可压缩搁置按钮315。
图4A-图4C是如本文所描述的基板支撑件110的部分的示意性截面图。除了用于使用静电吸盘305吸附掩模108的不同电路之外,图4A-图4C中示出的基板支撑件110与基板支撑件110相似。
在图4A中,可压缩按钮205是导电的,使得负电压可被施加到掩模108而正电压被施加到电极119。
在图4B中,可压缩按钮205是导电的,使得正电压被施加到电极119并且掩模108接地。
在图4C中,可压缩按钮205是介电的,使得掩模108在正电压被施加到电极119时电浮置(electrically floating)。
对如图4A-图4C中所示的基板支撑件110的测试产生了不同的结果。尽管在所有的图4A-图4C中,电极119都带正电,但是掩模108的电位不同,这造成对任何不均效应的去除。然而,考虑了其他标准,如下详述。
当掩模108如图4A中所示带负电时,吸附力比其他配置强(在存在或不存在等离子体的情况下),但是解吸附比其他配置慢。
当掩模108如图4B中所示接地时,吸附力比其他配置轻微(在存在或不存在等离子体的情况下),但是解吸附相比其他配置来说是最快的。
当掩模108如图4C中所示电浮置时,在不存在等离子体时观察到最小吸附力。在图4C的配置中,在存在等离子体时吸附力比在图4B的配置中观察到的强。另外,在对图4C的配置的测试中,解吸附比图4A中示出的配置快,但是比图4B中示出的配置慢。
图5A是根据另一个实施方式的基板支撑件110的部分的截面侧视图。图5B是图5A的基板支撑件110的放大图。
在图5A中,示出基板支撑件110的基板接收表面112的边缘500。多个沟槽115的部分示出在基板支撑件110的基板接收表面112上。边缘500围绕基板支撑件110的基板接收表面112的整个周边是相似的。相似地,由多个沟槽115形成的带沟槽的表面505跨基板支撑件110的处于边缘500内侧的基板接收表面112是大体上恒定的。
边缘500包括圆角(rounded corner)510。圆角510对接在凹陷表面202与基板支撑件110的基板接收表面112之间。介电层515设置在基板支撑件110的主体300的上表面520上方。介电层515包括与基板支撑件110的基板接收表面112相邻的静电吸盘305。介电层515还在边缘附近500延伸并且覆盖边缘500。介电层515还覆盖基板支撑件110的侧壁525。侧壁525的平面与上表面520的平面大概地正交。介电层515一般使主体300与掩模108(图5A中未示出)电绝缘。
在图5B中,静电吸盘305示出在基板支撑件110的主体300的上表面520上。界面层530示出在主体300的上表面520与静电吸盘305的介电层515之间。界面层530可包括一层或多层介电并且/或者绝热的膜。界面层530也可以是具有粗糙化的表面的阳极化层,以促进在基板支撑件110的主体300的上表面520与介电层515之间的粘附。
介电层515包含陶瓷材料,诸如氧化铝(Al2O3)。介电层515由第一部分535A和第二部分535B组成。第一部分535A定位在电极119上方,并且第二部分535B定位在电极119下方。第二部分535B还被夹在界面层530与电极119之间。
第一部分535A和第二部分535B具有第一厚度540和第二厚度545。在一些实施方式中,第一厚度540大体上等于第二厚度545。在一些实施方式中,第一厚度540为约0.2毫米(mm)至约0.4mm,诸如约0.3mm。电极119的厚度为约0.04mm至约0.06mm,诸如约0.05mm。界面层530的厚度555为约0.08mm至约0.013mm,诸如约0.1mm。静电吸盘305和界面层530的厚度560可为约0.7mm至约0.8mm。
带沟槽的表面505包括多个沟槽115以及与沟槽115相邻地形成的多个突起物575。多个沟槽115的最外沟槽570的深度565为约0.04mm至约0.06mm。突起物575的高度580为约0.02mm至约0.04mm。
图6是基板支撑件110的主体300和掩模框架118的一部分的截面图,示出可压缩按钮205的一个实施方式。可压缩按钮205包括接触销600,接触销600可移动地设置在形成于基板支撑件110的凹陷表面202中的盲孔605中。弹性构件610(诸如压缩弹簧)至少部分地设置在盲孔605中。弹性构件610用于将接触销600朝向掩模框架118偏置。弹性构件610允许接触销600基于掩模框架118的移动来朝向盲孔605的底表面615移动,同时维持与掩模框架118的接触。接触销600和/或弹性构件610的材料可基于在接触销600与掩模108之间的电连续性或电绝缘性的需要来制成。
尽管前述内容针对的是本公开内容的实施方式,但是在不脱离本公开内容的基本范围的情况下,可设想本公开内容的其他和进一步的实施方式,并且本公开内容的范围由所附的权利要求书来确定。
Claims (15)
1.一种基板支撑件,所述基板支撑件包括:
基板接收表面;
凹陷部分,所述凹陷部分围绕所述基板接收表面的周边设置;
静电吸盘,所述静电吸盘设置在所述基板接收表面下方;和
多个可压缩按钮,所述多个可压缩按钮设置在相应开口内,所述相应开口形成于与所述静电吸盘形成电路的所述凹陷部分中。
2.如权利要求1所述的基板支撑件,其中所述静电吸盘包括粘附到所述基板支撑件的主体的上表面的介电层。
3.如权利要求2所述的基板支撑件,其中所述介电层包含陶瓷材料。
4.如权利要求2所述的基板支撑件,其中电极嵌入在所述介电层中。
5.如权利要求2所述的基板支撑件,其中所述介电层被压印以在所述基板接收表面上形成沟槽图案。
6.如权利要求1所述的基板支撑件,其中所述基板接收表面包括沟槽图案。
7.如权利要求1所述的基板支撑件,其中所述基板接收表面包括介电层。
8.如权利要求7所述的基板支撑件,其中所述介电层延伸到所述基板接收表面之外。
9.如权利要求7所述的基板支撑件,其中所述基板支撑件的主体包括侧壁,并且所述介电层覆盖所述侧壁的一部分。
10.一种基板支撑件,所述基板支撑件包括:
主体,所述主体包含导电材料;
基板接收表面,所述基板接收表面包括粘附到所述主体的介电层,其中所述主体包括围绕所述基板接收表面的周边设置的凹陷部分;
静电吸盘,所述静电吸盘设置在所述基板接收表面下方;和
多个可压缩按钮,所述多个可压缩按钮设置在相应开口内,所述相应开口形成于与所述静电吸盘形成电路的所述凹陷部分中。
11.如权利要求10所述的基板支撑件,其中所述可压缩按钮中的每个可压缩按钮由导电材料制成。
12.如权利要求10所述的基板支撑件,其中所述可压缩按钮中的每个可压缩按钮由介电材料制成。
13.如权利要求10所述的基板支撑件,其中所述介电层包括陶瓷材料。
14.如权利要求13所述的基板支撑件,其中电极嵌入在所述介电层中。
15.如权利要求13所述的基板支撑件,其中所述介电层被压印以在所述基板接收表面上形成沟槽图案。
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US201962801605P | 2019-02-05 | 2019-02-05 | |
US62/801,605 | 2019-02-05 | ||
PCT/US2020/014061 WO2020163060A1 (en) | 2019-02-05 | 2020-01-17 | Substrate support for chucking of mask for deposition processes |
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JP (1) | JP7259060B2 (zh) |
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US20220122876A1 (en) | 2022-04-21 |
JP7259060B2 (ja) | 2023-04-17 |
KR20210111364A (ko) | 2021-09-10 |
KR102646838B1 (ko) | 2024-03-11 |
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