CN113707742A - High-speed photoelectric detector and preparation method thereof - Google Patents
High-speed photoelectric detector and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title abstract description 14
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims abstract description 35
- 238000010521 absorption reaction Methods 0.000 claims abstract description 23
- 238000005253 cladding Methods 0.000 claims abstract description 15
- 235000001674 Agaricus brunnescens Nutrition 0.000 claims abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 15
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 7
- 230000000873 masking effect Effects 0.000 claims description 7
- 229910052681 coesite Inorganic materials 0.000 claims description 6
- 229910052906 cristobalite Inorganic materials 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052682 stishovite Inorganic materials 0.000 claims description 6
- 229910052905 tridymite Inorganic materials 0.000 claims description 6
- 238000011161 development Methods 0.000 claims description 5
- 238000001020 plasma etching Methods 0.000 claims description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 238000007740 vapor deposition Methods 0.000 claims description 3
- 238000009616 inductively coupled plasma Methods 0.000 claims description 2
- 230000003287 optical effect Effects 0.000 abstract description 16
- 230000005540 biological transmission Effects 0.000 abstract description 12
- 238000013461 design Methods 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 description 4
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- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
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- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
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- 238000012876 topography Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
- H01L31/105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier being of the PIN type
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- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
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- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
- H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
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Abstract
The invention relates to a high-speed photoelectric detector and a preparation method thereof, wherein the high-speed photoelectric detector comprises an N-type InP ohmic contact layer, an InGaAs absorption layer, an InP cladding layer and a P-type InGaAs ohmic contact layer which are sequentially prepared and formed on a substrate from bottom to top, and the sectional area of the InGaAs absorption layer is smaller than that of the InP cladding layer. In the structure of the invention, the sectional area of the InGaAs absorption layer is smaller than that of the InP cladding layer, and the mushroom platform design of the InGaAs intrinsic region is utilized, namely the sectional area is reduced to reduce the junction capacitance of the PIN diode, so that higher bandwidth is obtained, and the requirements of 5G high-speed optical transmission and 25G/100G/200G/400G optical transmission network field application can be met.
Description
Technical Field
The invention relates to the technical field of optical communication, in particular to a high-speed photoelectric detector and a preparation method thereof.
Background
With the gradual deepening of human information construction and the aggravation of the trend of economic globalization, the number of information acquisition and exchange for all the aspects of human social life is continuously increased, and the requirements on long-distance transmission and bandwidth mobile access of mass data are increasingly highlighted, so that with the rapid development of new services such as 5G communication, cloud computing, high-definition video, virtual reality and the like, a 25G/100G/200G/400G optical transmission technology gradually becomes a market hotspot. However, in the field of bottom-layer optical devices and optical chips, the production of domestic high-end devices is severely restricted, so that the localization rate of the current optical transceiver chip of over 25G is low. The existing photoelectric detector with the PIN structure has the defects of low responsivity, low bandwidth and saturation and the like, and is not suitable for being applied to the field of high-speed optical communication. Therefore, there is a need for a photodetector applicable to the fields of 5G high-speed optical transmission and 25G/100G/200G/400G optical transmission networks.
Disclosure of Invention
The invention aims to provide a high-speed photoelectric detector and a preparation method thereof, which can improve the bandwidth and the responsivity and further meet the requirements of 5G high-speed optical transmission and the application in the field of 25G/100G/200G/400G optical transmission networks.
In order to achieve the above object, the embodiments of the present invention provide the following technical solutions:
in one aspect, an embodiment of the present invention provides a high-speed photodetector, including an N-type InP ohmic contact layer, an InGaAs absorption layer, an InP cladding layer, and a P-type InGaAs ohmic contact layer sequentially formed on a substrate from bottom to top, where a cross-sectional area of the InGaAs absorption layer is smaller than a cross-sectional area of the InP cladding layer.
On the other hand, the embodiment of the invention also provides a preparation method of the high-speed photoelectric detector, which comprises the following steps: with SiO2Mask of H2SO4+H2O2The InGaAs is etched by an isotropic etching wet method, and the size of the InGaAs absorption layer after etching is smaller than that of the InP cladding layer, so that the mushroom table shape is formed.
Compared with the prior art, the invention has the beneficial effects that: in the structure of the invention, the sectional area of the InGaAs absorption layer is smaller than that of the InP cladding layer, and the mushroom platform design of the InGaAs intrinsic region is utilized, namely the sectional area is reduced to reduce the junction capacitance of the PIN diode, so that higher bandwidth is obtained, and the requirements of 5G high-speed optical transmission and 25G/100G/200G/400G optical transmission network field application can be met.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments are briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention, and therefore should not be considered as limiting the scope, and for those skilled in the art, without inventive efforts, other related drawings can be obtained from the drawings, and all of them belong to the protection scope of the present invention.
Fig. 1 is a schematic structural diagram of a high-speed photodetector according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, the photodetector provided in this embodiment includes a substrate, and an N-type InP ohmic contact layer 5, an InGaAs absorption layer 4, an InP cladding layer 3, and a P-type InGaAs ohmic contact layer 2 sequentially formed on the substrate from bottom to top. The sectional area of the InGaAs absorption layer 4 is smaller than that of the InP clad layer 3, and as shown in fig. 1, the InGaAs absorption layer 4 has a mushroom-mesa structure with a narrow top and a wide bottom.
In the structure of the invention, the sectional area of the InGaAs absorption layer 4 is reduced, so that the contact area between the InGaAs absorption layer 4 and the InP cladding layer 3 is smaller, namely, the contact area is reducedThe junction capacitance area is small. The smaller the junction capacitance area, the smaller the junction capacitance, and the bandwidth B = (2 π R)TCT)-1The resistance RT of the detector circuit is unchanged, the junction capacitance of the PIN diode is reduced, and the sum C of the junction capacitance and the input capacitance of the amplifierTAnd is reduced so that a higher bandwidth B can be obtained. Therefore, the high-speed photoelectric detector provided by the invention can meet the requirements of 5G high-speed optical transmission and the application in the field of 25G/100G/200G/400G optical transmission networks.
As shown in fig. 1, an N electrode 6 is formed on the N-type InP ohmic contact layer 5, and a P electrode 1 is formed on the P-type InGaAs ohmic contact layer 2. The N-electrode 6 and the P-electrode 1 are both metal electrodes.
For the complete manufacturing process of the high-speed photodetector shown in fig. 1, which includes the growth process of the epitaxial wafer from bottom to top and the preparation processes of the structures of the layers from top to bottom, the invention does not make any innovation on the growth process of the epitaxial wafer, so that the growth process of the epitaxial wafer is not described here, but the preparation processes of the structures of the lower layers are mainly described.
The topography of each layer is produced primarily by dry etching or wet etching from top to bottom. The following will explain each layer structure.
As shown in the figure, the layer 1 includes a P electrode with a thickness of 400-500 nm. The preparation method comprises the following steps: a photoresist mask process is adopted to manufacture a P electrode pattern on the P type InGaAs ohmic contact layer; carrying out magnetron sputtering on Pd/Ir/Pt/Au, stripping the photoresist to obtain the P electrode pattern, and then obtaining the prepared P electrode.
As shown in the figure, the layer 2 includes a highly doped P-type InGaAs ohmic contact layer with a thickness of 100-200 nm. The shape preparation method comprises the following steps: deposition of SiO using plasma enhanced vapor deposition system2After masking, exposure and development are completed by using photoresist, the pattern is transferred to SiO by adopting reactive ion etching2(ii) a Removing photoresist and then using SiO2And masking, and transferring the pattern to InGaAs by reactive ion etching.
As shown In the figure 4 th layer, contains p-type In(1-x)GaxAsyP(1-y)Graded lightly doped energy band graded layer, i.e. multiple layers of p-type In with different doping concentrations grown by MOCVD technique(1-x)GaxAsyP(1-y)A graded layer with a thickness of 200-300 nm. The wavelength response of the InGaAsP layers from top to bottom is 1360nm and 1550nm which are respectively expressed by Q1.36 and Q1.55.
As shown In the figure 4 th layer, contains In(1-x)GaxThe thickness of the As intrinsic absorption layer is 1500-. The InGaAs material is used as a photon absorption region, and the energy band gradual change and doping on a P interface and an N interface are adopted, so that the space charge shielding effect is reduced, and the high-speed and high-saturation detection performance is realized.
As shown In the figure 4 th layer, containing n-type In(1-x)GaxAsyP(1-y)Graded lightly doped energy band graded layer, i.e. multiple layers of n-type In with different doping concentrations grown by MOCVD technique(1-x)GaxAsyP(1-y)A graded layer with a thickness of 200-300 nm. The wavelength response of the InGaAsP layers from top to bottom is 1550nm and 1360nm which are respectively expressed by Q1.55 and Q1.36.
As shown in layer 4, the morphology preparation method: with SiO2Mask of H2SO4+H2O2The size of the InGaAs absorption layer after etching is smaller than that of the InP cladding layer of the 3 rd layer, and mushroom table shapes are formed.
As shown in the figure, the 5 th layer comprises a highly doped n-type InP ohmic contact layer with a thickness of 500-1000 nm. The shape preparation method comprises the following steps: and masking by adopting photoresist, and after the development is finished, carrying out wet chemical corrosion until the N-type ohmic contact layer is exposed and cut off.
As shown in layer 6, contains an N electrode. The preparation method comprises the following steps: manufacturing an N electrode pattern on the 5 th N-type InP ohmic contact layer by adopting a photoresist mask process; and carrying out magnetron sputtering on AuGe/Pt/Au, and stripping the photoresist to obtain the N electrode pattern so as to obtain the prepared N electrode.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention.
Claims (10)
1. A high-speed photoelectric detector comprises an N-type InP ohmic contact layer, an InGaAs absorption layer, an InP cladding layer and a P-type InGaAs ohmic contact layer which are sequentially prepared and formed on a substrate from bottom to top, and is characterized in that the sectional area of the InGaAs absorption layer is smaller than that of the InP cladding layer.
2. The high-speed photodetector of claim 1, wherein a P-electrode is formed on the P-type InGaAs ohmic contact layer, and the thickness of the P-electrode is 400-500 nm.
3. The high-speed photodetector of claim 1, wherein the thickness of the P-type InGaAs ohmic contact layer is 100-200 nm.
4. A high-speed photodetector as claimed in claim 1, wherein the InP cladding layer has a thickness of 300-500 nm.
5. A high-speed photodetector as claimed in claim 1, wherein the thickness of the N-type InP ohmic contact layer is 500-1000 nm.
6. The method for fabricating a high-speed photodetector of claim 1, comprising a method for fabricating an InGaAs absorption layer: with SiO2Mask of H2SO4+H2O2The InGaAs is etched by an isotropic etching wet method, and the size of the InGaAs absorption layer after etching is smaller than that of the InP cladding layer, so that the mushroom table shape is formed.
7. The method of claim 6, wherein the InGaAs absorption layer comprises p-type In(1-x)GaxAsyP(1-y)The thickness of the graded light doping energy band graded layer is 200-300nm, and the wavelength response of the InGaAsP of the layers from top to bottom is 1360nm and 1550nm in sequence.
8. The method of claim 6, wherein the InGaAs absorption layer contains In(1-x)GaxThe thickness of the As intrinsic absorption layer is 1500-.
9. The method of claim 6, wherein the InGaAs absorption layer comprises n-type In(1-x)GaxAsyP(1-y)The thickness of the graded light doping energy band graded layer is 200-300nm, and the wavelength response of the InGaAsP of the layers from top to bottom is 1550nm and 1360nm in sequence.
10. The method of claim 6, further comprising the steps of: deposition of SiO by plasma enhanced vapor deposition system2After masking, exposure and development are completed by using photoresist, the pattern is transferred to SiO by adopting reactive ion etching2(ii) a Removing photoresist and then using SiO2And (5) masking, and transferring the pattern to InP by adopting inductively coupled plasma etching.
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2021
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