JP2002050786A - Light-receiving element and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light-receiving element of superior mass productivity. SOLUTION: A light-receiving element 100 comprises a semi-insulating semiconductor substrate 101, a semiconductor conductive layer 102 formed in a region on a part of the substrate 101, a light-absorbing layer 103 formed on the semiconductor conductive layer 102, and a wide-band gap layer 104 and a diffusion region 105 formed on the light absorbing layer 103. Etching characteristics of the semiconductor conductive layer 102 and the semiconductor substrate 101 are different from each other.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a light receiving element. In particular, a mesa-shaped light absorbing layer is formed in a partial region on a semi-insulating semiconductor substrate, and an electrode pad is formed on another region of the semiconductor substrate. It relates to a light receiving element.

[0002]

2. Description of the Related Art As a light receiving element for optical fiber communication having a sensitivity in a long wavelength band of 1.3 μm to 1.55 μm, In
Pin photodiodes made of GaAs / InP materials are widely used. The response speed of this pin photodiode is often limited by the CR time constant that is the product of the capacitance of the photodiode and the load resistance. Therefore, in order to increase the response speed of the pin photodiode, it is necessary to reduce the capacitance of the photodiode.

In order to reduce the capacitance of a photodiode, it is important to reduce the capacitance of an electrode pad in addition to reducing the junction capacitance. In particular, in recent high-speed type light receiving elements (photodiodes),
Since the size of the light receiving section is small, the size of the electrode pad (about 80 μm in diameter) extended from the annular electrode and disposed in the vicinity thereof is larger than that of the annular electrode (about 35 μm in diameter) provided on the light receiving section. Therefore, the effect of the capacitance of the electrode pad on the response speed is great. As a structure for reducing the pad capacitance, there is a structure in which a thick insulating film made of polyimide is formed between the pad and the semiconductor layer, but as a method for completely eliminating the pad capacitance, a semi-insulating semiconductor substrate is used. There is a structure in which a mesa-shaped light absorbing layer is formed in a part of the region, and an electrode pad is formed in another region where the light absorbing layer is not formed.

An example of such a structure is disclosed in, for example,
-82829. FIG. 9 schematically shows the structure of the light receiving element disclosed in this publication.

The light receiving element 500 shown in FIG. 9 includes a light receiving portion mesa 505 formed on a semi-insulating InP substrate 501,
And a pad electrode mesa 506. Light receiving part mesa 5
05 is on a partial region of the semi-insulating InP substrate 501,
It has a structure in which an n ⁺ -InP layer 502, an n ^-- InGaAs layer 503 and an n-InP layer 504 are sequentially stacked. On the other hand, the pad electrode mesa 506
N ⁺ -In on another region different from the region where
P layer 502, n ⁻ -InGaAs layer 503 and n−I
It has a structure in which nP layers 504 are sequentially stacked. A pad electrode 511 is provided on the upper surface of the pad electrode mesa 506.

In the light-receiving portion mesa 505, a diffusion region (P ⁺ region) 507 formed by diffusing a P-type impurity so as to reach the light absorption layer 503 is formed in a part of the n-InP layer 504. Then, a SiN insulating film 510 is deposited so as to cover the entire semiconductor substrate 501. On the SiN insulating film 510, a P-side electrode 508 that is electrically connected to a part of the diffusion region 507 is formed. An n-side electrode 509 is formed on the SiN insulating film 510 so as to be electrically connected to a part of the n-InP layer 504 where the diffusion region 507 is not formed. Light receiving unit mesa 50
5 is connected to the pad 511 on the pad mesa 506 via the wiring 512 formed on the insulating film 510.
It is connected to the.

[0007]

In the light receiving element 500 shown in FIG. 9, in order to electrically separate the light receiving portion mesa 505 and the pad mesa 506, n ⁺ located between the light receiving portion mesa 505 and the pad mesa 506 is used. -The InP layer (semiconductor conductive layer) 502 is completely removed. However, since the semiconductor conductive layer 502 is made of InP similarly to the semiconductor substrate 501, it is difficult to control the etching. Therefore, in the conventional light receiving element 500, the semiconductor conductive layer 502 located between the light receiving portion mesa 505 and the pad mesa 506 is formed.
In order to surely remove the surface, the etching is performed to a depth deep below the semiconductor conductive layer 502, and the surface of the semiconductor substrate 501 is also etched away. As a result, the light receiving unit mesa 5
Although the electrical separation of the pad mesa 505 and the pad mesa 506 can be achieved, the height of the light receiving unit mesa 505 and the pad mesa 506 from the semiconductor substrate 501 is further higher than the designed height.

When the height of the mesa is increased, the light receiving portion mesa 50
It is difficult to form the wiring 512 that bridges the pad 5 and the pad mesa 506. The reason is that if the mesa is high,
Light receiving part mesa 505, pad mesa 506, and semiconductor substrate 50
This is because the wiring 512 formed on the vicinity of the stepped portion with respect to 1 is easily peeled off. That is, from the viewpoint of formation of the wiring 512, it is desirable that the height of the mesa is lower. However, in the conventional light receiving element 500, since the light receiving portion mesa 505 and the pad mesa 506 are completely electrically separated from each other, a problem occurs that the height of the mesa becomes higher than the minimum required height. I was

In addition, the light receiving element 500 shown in FIG. 9 has a problem of wiring capacitance. In the light receiving element 500, the pad 511 and the wiring 512 on the semiconductor substrate 501 are
No parasitic capacitance is generated. However, the light receiving unit mesa 505
The wiring 512 located above generates wiring capacitance. In the case of a high-speed light receiving element in which the area of the diffusion region 507 is small, the wiring capacitance has a value that cannot be ignored compared to the junction capacitance. In particular, when the insulating film 510 located between the wiring 512 and the n-InP layer (window layer) 504 is a single layer of SiN, the wiring capacitance increases. The reason why the wiring capacitance is increased is that cracks are likely to occur when SiN is deposited thickly, and there is a limit to the deposited thickness of SiN.
This is because only an iN film can be formed, and SiN has a higher dielectric constant than other insulating films (for example, SiO ₂ ).

The present invention has been made in view of the above points, and a main object of the present invention is to provide a light receiving element having excellent mass productivity. Another object of the present invention is to provide a high-performance light receiving element having a filtering function. Still another object of the present invention is to provide a high-speed light-receiving element with reduced wiring capacitance.

[0011]

A light-receiving element according to the present invention comprises a semi-insulating semiconductor substrate, a conductive semiconductor conductive layer formed in a partial region on the semiconductor substrate, and a conductive semiconductor layer. A light absorbing layer having a function of absorbing incident light, formed on the light absorbing layer,
A wide band gap layer having a larger band gap than the light absorption layer, and a diffusion region formed by diffusing impurities into a part of the wide band gap layer to reach the light absorption layer, wherein the semiconductor conductive layer And a semiconductor layer having etching characteristics different from those of the semiconductor substrate.

In a preferred embodiment, the semiconductor substrate is made of InP, the semiconductor conductive layer is made of InGaAsP, the light absorbing layer is made of InGaAs, and the semiconductor substrate is made of InGaAs. The band gap layer is composed of InP.

In a preferred embodiment, the absorption edge wavelength of the InGaAsP constituting the semiconductor conductive layer is:
It is in a range larger than 0.93 μm and smaller than 1.55 μm.

In a preferred embodiment, the semiconductor conductive layer is an n-type semiconductor layer, the impurity is a p-type impurity, and the light absorption layer functions as an i-layer of a pin photodiode. An n-side electrode electrically contacting the semiconductor conductive layer, and a p-side electrode electrically contacting the diffusion region.

In a preferred embodiment, a semiconductor structure including the semiconductor conductive layer, the light absorbing layer, and the wide band gap layer is formed in the partial region on the semiconductor substrate. In a region except for the partial region on the semiconductor substrate, a further semiconductor conductive layer separated from the semiconductor conductive layer in the semiconductor structure is formed, and on the further semiconductor conductive layer, A pad for electrically connecting to an external device is formed, and the pad is electrically connected to the diffusion region formed in a part of a wide band gap layer in the semiconductor structure.

In a preferred embodiment, an annular electrode having an opening in the center is formed on the diffusion region, and the electrode is an insulating electrode formed so as to cover the surface of the semiconductor structure. It is connected to the pad via a wiring located on the film.

In a preferred embodiment, the layers constituting the semiconductor structure are stacked so that a step is formed on a side surface of the semiconductor structure.

Another light receiving element of the present invention is formed in a semi-insulating semiconductor substrate and a partial region on the semiconductor substrate.
A semiconductor conductive layer having conductivity, a light absorption layer having a function of absorbing incident light, and a carrier formed between the semiconductor conductive layer and the light absorption layer, and carriers generated in the semiconductor conductive layer A carrier barrier layer for preventing diffusion into the light absorbing layer, a wide band gap layer formed on the light absorbing layer and having a larger band gap than the light absorbing layer, A diffusion region formed by diffusing impurities in a part of the wide band gap layer; the semiconductor conductive layer is made of InGaAsP, and transmits light of a specific wavelength among the incident light; Has functions.

In one preferred embodiment, the absorption edge wavelength of InGaAsP constituting the semiconductor conductive layer is 1.
It is in a range larger than 3 μm and smaller than 1.55 μm.

In a preferred embodiment, the absorption edge wavelength is in a range from greater than 1.35 μm to less than 1.5 μm.

In one preferred embodiment, the absorption edge wavelength of InGaAsP constituting the semiconductor conductive layer is 0.1.
It is in the range larger than 93 μm and smaller than 1.3 μm.

In a preferred embodiment, the absorption edge wavelength is in a range from greater than 0.93 μm to less than 1.25 μm.

In a preferred embodiment, the semiconductor substrate is made of InP, the semiconductor conductive layer is made of InGaAsP, the carrier barrier layer is made of InP, and the semiconductor substrate is made of InP. The absorption layer is made of InGaAs, and the wide band gap layer is made of InP.

In a preferred embodiment, the light receiving element is a back-illuminated light receiving element that is incident from the back side of the semiconductor substrate.

In a preferred embodiment, a semiconductor structure including the semiconductor conductive layer, the light absorption layer, the carrier obstacle layer, and the wide band gap layer is provided in the partial region on the semiconductor substrate. A further semiconductor conductive layer separated from the semiconductor conductive layer in the semiconductor structure is formed in a region other than the partial region on the semiconductor substrate. A pad for electrically connecting to an external device is formed on the semiconductor conductive layer, and the pad electrically connects to the diffusion region formed in a part of a wide band gap layer in the semiconductor structure. It is connected to the.

Still another light-receiving element according to the present invention is a semi-insulating semiconductor substrate, a semiconductor conductive layer formed on a part of the semiconductor substrate and having conductivity, and formed on the semiconductor conductive layer. A light absorbing layer having a function of absorbing incident light, a wide band gap layer formed on the light absorbing layer and having a larger band gap than the light absorbing layer, and reaching the light absorbing layer. A diffusion region formed by diffusing impurities into a part of the wide band gap layer;
An electrode formed on the diffusion region, and a semiconductor structure including the semiconductor conductive layer, the light absorption layer, and the wide band gap layer is formed in the partial region on the semiconductor substrate. And a further semiconductor conductive layer separated from the semiconductor conductive layer in the semiconductor structure is formed in a region on the semiconductor substrate other than the partial region, and the further semiconductor conductive layer A pad for electrically connecting to an external device is formed on the upper surface, an insulating film is formed on a surface of the semiconductor structure, and the electrode and the pad are formed on the insulating film. And a wiring for electrically connecting the insulating film and the insulating film,
It has a laminated structure including a SiN layer and a SiO ₂ layer formed on the SiN layer.

In one preferred embodiment, the SiN
The thickness of the layer is not less than 20 nm and not more than 100 nm, and the thickness of the SiO ₂ layer is not less than 400 nm.

In a preferred embodiment, a carrier barrier is further provided between the semiconductor conductive layer and the light absorbing layer for preventing carriers generated in the semiconductor conductive layer from diffusing into the light absorbing layer. A layer is formed.

According to the method of manufacturing a light receiving element of the present invention, a semiconductor conductive layer having etching characteristics different from that of the semiconductor substrate, a light absorbing layer having a function of absorbing incident light, are provided on a semi-insulating semiconductor substrate. A step of sequentially crystal-growing a wide band gap layer having a band gap larger than that of the light absorption layer, and diffusing impurities into a part of the wide band gap layer so as to reach the light absorption layer, thereby forming a diffusion region. Forming, etching the wide band gap layer and the light absorbing layer into a predetermined shape, and etching the semiconductor conductive layer so as to cover the wide band gap layer and the light absorbing layer in the predetermined shape. Providing a mask and using an etchant for selectively etching the semiconductor conductive layer with respect to the semiconductor substrate; Comprising a step of selectively etching the portion of the semiconductor conductive layer.

[0030] In a preferred embodiment, the step of etching the wide band gap layer and the light absorbing layer into a predetermined shape includes, after the step of forming the diffusion region, the wide band gap layer and the light absorption layer so as to cover the diffusion region. Providing a first etching mask on the bandgap layer; selectively etching a part of the wide bandgap layer with respect to the light absorbing layer; and covering the widebandgap layer with the light absorbing layer. A step of providing a second etching mask on the light absorbing layer; and a step of selectively etching a part of the light absorbing layer with respect to the semiconductor conductive layer.

In a preferred embodiment, the semiconductor substrate is made of InP, and the semiconductor conductive layer is made of InG.
The light absorption layer is made of InGaAs, the wide band gap layer is made of InP, and the etching solution is an etching solution containing hydrochloric acid.

In a preferred embodiment, the semiconductor substrate is made of InP, and the semiconductor conductive layer is made of InG.
aAsP, the light absorbing layer is made of InGaAs, the wide band gap layer is made of InP, a step of etching a part of the wide band gap layer, and a part of the light absorbing layer. The step of etching, as an etching solution for etching,
This is performed using an etching solution containing sulfuric acid.

Another method for manufacturing a light receiving element according to the present invention is as follows.
On a semi-insulating semiconductor substrate, a semiconductor conductive layer having conductivity, a carrier barrier layer for preventing carriers generated in the semiconductor conductive layer from diffusing into an upper layer, and a function of absorbing incident light. Having a light absorbing layer and a wide band gap layer having a larger band gap than the light absorbing layer sequentially crystal-grow, and diffusing impurities into a part of the wide band gap layer to reach the light absorbing layer. Forming a diffusion region, providing a first etching mask on the wide band gap layer so as to cover the diffusion region, and forming the light absorption layer using a first etching solution. Selectively etching a part of the wide band gap layer with respect to the light absorbing layer, and a second step on the light absorbing layer so as to cover the wide band gap layer. Providing a etching mask, using a second etchant to selectively etch a portion of the light absorbing layer with respect to the carrier barrier layer, and using a third etchant Etching a part of the carrier barrier layer selectively with respect to a conductive layer; and forming a third on the semiconductor conductive layer so as to cover the wide band gap layer, the light absorption layer, and the carrier barrier layer. A step of providing an etching mask; and a step of selectively etching a part of the semiconductor conductive layer with respect to the semiconductor substrate using a fourth etching solution.

In a preferred embodiment, the semiconductor substrate is made of InP, and the semiconductor conductive layer is made of InG.
aAsP, the carrier barrier layer is composed of InP, the light absorbing layer is composed of InGaAs, the wide band gap layer is composed of InP, and the first and third etching solutions are hydrochloric acid. And the second and fourth etching solutions are etching solutions containing sulfuric acid.

According to still another method of manufacturing a light receiving element according to the present invention, a semiconductor conductive layer having a different etching characteristic from that of the semiconductor substrate is provided on a semi-insulating semiconductor substrate, and a light absorbing layer having a function of absorbing incident light. A step of sequentially growing a layer and a wide band gap layer having a larger band gap than the light absorbing layer, and diffusing impurities into a part of the wide band gap layer so as to reach the light absorbing layer. Forming a diffusion region; etching the wide band gap layer and the light absorbing layer into a predetermined shape; and selectively etching a part of the semiconductor conductive layer to form the wide region of the predetermined shape. A semiconductor structure including a band gap layer and a light absorbing layer, and the semiconductor conductive layer, and the semiconductor conductive layer in the semiconductor structure Forming a further semiconductor conductive layer spaced, the surface of the semiconductor structure, the semiconductor substrate exposed portion and said further semiconductor conductive layer, Si
By N layer and sequentially laminating an SiO ₂ layer, forming an insulating film including the SiN layer and the SiO ₂ layer, wherein located on the diffusion region of the wide band gap layer in the semiconductor structure Forming an opening on the diffusion region by removing an insulating film; forming an electrode on the diffusion region in the opening; and forming the insulating layer on an exposed portion of the semiconductor substrate. Forming a pad for electrically connecting an external device on a film or the insulating film formed on the further semiconductor conductive layer; and forming the electrode and the pad on the insulating film. And forming a wiring that electrically connects the two.

In a preferred embodiment, the step of forming the electrode, the step of forming the pad, and the step of forming the wiring are performed in the same step.

In a preferred embodiment, the steps performed in the same step include a step of depositing a spacer film made of SiN on the insulating film, and a step of using a photoresist to form the electrode, the pad, and the wiring. Forming a metal thin film by forming a blanking pattern, etching the spacer film using the photoresist as a mask, and depositing a metal material on the exposed insulating film and the photoresist. And forming the electrode, the pad, and the wiring by stripping and removing the photoresist.

In the light receiving element according to the present invention, since the semiconductor conductive layer and the semiconductor substrate have different etching characteristics, an etchant capable of selectively etching the semiconductor conductive layer with respect to the semiconductor substrate (for example, an etchant containing hydrochloric acid) Can be used to selectively etch the semiconductor conductive layer. Therefore, the etching can be stopped when the surface of the semiconductor substrate is exposed, so that the etching can be controlled, and it is not necessary to perform the process of etching to the upper portion of the semiconductor substrate. Therefore, since the height of the mesa does not become unnecessarily high, the formation of wiring is facilitated, and as a result, a light receiving element excellent in mass productivity can be realized. Further, when a step is formed on the side surface of the semiconductor structure (mesa) including the semiconductor conductive layer, the light absorption layer, and the wide band gap layer, the shape of the wiring is smaller than when the step is not formed on the side surface of the semiconductor structure. Can be satisfactorily formed, so that the wiring can be formed more favorably.

In another light receiving element according to the present invention, since a carrier barrier layer is formed between the semiconductor conductive layer and the light absorbing layer, it can function as a back illuminated light receiving element. In addition, since the semiconductor conductive layer made of InGaAsP has a function of transmitting light of a specific wavelength among incident lights, for example, the wavelength is 1.3 μm.
And a light receiving element capable of selectively receiving light having a wavelength of 1.55 μm out of the light having a wavelength of 1.55 μm. Therefore, a high-performance light receiving element having a filtering function can be realized.

In still another light receiving element according to the present invention, the insulating film formed on the surface of the semiconductor structure (mesa) has a laminated structure including the SiN layer and the SiO ₂ layer. The wiring capacitance between the wiring formed in the semiconductor device and the semiconductor structure can be reduced as compared with a configuration in which the insulating film is formed of a single SiN layer. As a result, it is possible to realize a high-speed light receiving element with a reduced wiring capacitance.

[0041]

Embodiments of the present invention will be described below with reference to the drawings. In the drawings, components having substantially the same function are denoted by the same reference numeral for simplicity of description. Note that the present invention is not limited to the following embodiments. (Embodiment 1) Embodiment 1 according to the present invention will be described with reference to FIGS. FIG. 1 schematically shows a cross-sectional configuration of a light receiving element 100 according to the present embodiment.

The light receiving element 100 of the present embodiment is made of InGa
An As / InP-based pin photodiode, a semi-insulating semiconductor substrate 101, a conductive semiconductor conductive layer 102, a light absorbing layer 103 formed on the semiconductor conductive layer 102, and a wide band gap layer 104; have.

The semiconductor conductive layer 102 is formed on the semiconductor substrate 101
And a semiconductor layer having different etching characteristics, and is formed in a partial region on the semiconductor substrate 101. In the present embodiment, the semiconductor substrate 101 is a semi-insulating InP substrate made of InP. On the other hand, the semiconductor conductive layer 102
Has n- composition different from that of InP constituting the substrate 101.
It is composed of InGaAsP and functions as an n-layer of a pin photodiode.

The light absorbing layer 103 formed on the semiconductor conductive layer 102 has a function of absorbing incident light. In this embodiment, the light absorption layer 103 is formed of n ⁻ -InGa
As, the pin photodiode i
Functions as a layer. The light absorption layer 103 is a semiconductor conductive layer 1
02 is formed in a partial region on the light absorbing layer 103.
Is formed on the semiconductor conductive layer 102 in a region where no is formed.
The side electrode 107 is formed.

On the light absorbing layer 103, the light absorbing layer 103
A wide band gap layer 104 having a larger band gap is formed, and a light absorbing layer 1 is formed on a part (for example, a central portion) of the wide band gap layer 104.
A P ⁺ diffusion region 105 formed by diffusing an impurity (for example, Zn) so as to reach 03 is formed. The wide band gap layer 104 in the present embodiment is an n ⁻ -InP layer made of InP.

Since the wide band gap layer 104 has a larger band gap than the light absorbing layer 103, it can transmit light having a wavelength to be absorbed by the light absorbing layer 103. That is, it can function as a window layer (window layer) of the pin photodiode. Wide band gap layer 1 by diffusing P-type impurity (Zn)
When 04 is the main p-type conductive layer, most of the light absorption layer 103 can be an i-layer, so that the light receiving sensitivity of the light receiving element can be increased. The role of the wide band gap layer 104 as a window layer becomes particularly important when used as a front-illuminated light receiving element.

The wide band gap layer 104 is
Not only does it serve as a window layer, but also serves to reduce the reverse leakage current of the pn junction. This role is important not only in the case of a front illuminated light receiving element whose role as a window layer is important, but also in the case of a back illuminated light receiving element. In an InGaAs / InP-based pin photodiode, an InGaAs layer 103 serving as a light absorption layer is used.
It is known that when a pn junction is exposed on the surface of the semiconductor device, the leakage current increases. However, the InGaAs layer 10
In the case where the InP wide bandgap layer 104 is provided on the surface 3, the pn junction is exposed on the surface of the wide bandgap layer 104 and the pn junction is not exposed on the surface of the InGaAs layer 103. Therefore, the leakage current can be reduced as compared with the case where the wide band gap layer 104 is not provided.

A p-side electrode 106 is formed on P ⁺ diffusion region 105 in wide band gap layer 104. In this embodiment, the p-side electrode 106 is Ti / Pt
/ Au is a ring-shaped electrode made of a laminated metal film and arranged on the outer peripheral portion of the circular diffusion region 105. The reason why the annular electrode having an opening in the center is used as the p-side electrode 106 is to increase the light receiving efficiency by preventing the electrode 106 from interfering with the incident light as much as possible in the case of the front-illuminated type.

The P-side electrode 106 is electrically connected to a pad (pad electrode) 110 for electrically connecting to an external device (not shown). In the present embodiment, the semiconductor conductive layer 102, the light absorbing layer 103, and the wide band gap layer 104 in which the diffusion region 105 is formed are included in the semiconductor structure (light receiving portion mesa) 140. The p-side electrode 106 is provided above the light-receiving unit mesa 140 (on the top of the head), and the pad 110 electrically connected to the p-side electrode 106 is arranged in a region other than the region where the light-receiving unit mesa 140 is located. Have been.

In the configuration shown in FIG.
A separate semiconductor conductive layer (second semiconductor conductive layer) 109 made of the same material as the first semiconductor conductive layer 102 is separated from the semiconductor conductive layer (first semiconductor conductive layer) 102 therein. A pad 110 is disposed on the second semiconductor conductive layer 109 with an insulating film 108 interposed therebetween. Thus, by providing the pad 110 at a position separated from the light receiving unit mesa 140, the parasitic capacitance due to the pad 110 can be reduced.

In the present embodiment, the second semiconductor conductive layer 10
Reference numeral 9 denotes a pad mesa 160 for mounting a pad. Second
By using the semiconductor conductive layer 109 as the pad mesa 160, the height of the n-side electrode 107 provided on the first semiconductor conductive layer 102 and the height of the pad 110 electrically connected to the p-side electrode 106 are reduced. You can do almost the same. If the heights of the n-side electrode 107 and the pad 110 are almost the same,
Connecting members of the same size on them (eg bumps)
Can be mounted and the light receiving element 100 can be mounted, so that there is an advantage that the mounting of the light receiving element 100 is facilitated.

An insulating film 108 made of, for example, SiN is formed on the surfaces of the light receiving portion mesa 140, the pad mesa 160, and the substrate 101 except for the region where the n-side electrode 107 and the p-side electrode 106 are located. This insulating film 10
A wiring 111 for connecting the p-side electrode 106 and the pad 110 is formed on 8. In the present embodiment, the p-side electrode 106, the pad 110, and the wiring 111 are integrally formed, and are formed of a laminated metal film of Ti / Pt / Au.

In the manufacturing process, the side surface of the light-receiving portion mesa 140 has a stepped shape so that the formation of the pattern for removing the wiring using the photoresist can be performed well. That is, each layer (10
2, 103, 104) are stacked such that the side surface of the light receiving unit mesa 140 is stepped, and the upper surface area of the lower layer in the light receiving unit mesa 140 is larger than the lower surface area of the upper layer located above the lower layer. Has also been enlarged.

The other conditions of the light receiving element 100 according to the present embodiment are exemplified as follows. In addition, the present invention
The conditions are not limited to these conditions, and suitable conditions can be set as appropriate.

The thickness of the InP substrate 101 is 150 to 20
0 μm, and the height of the light receiving portion mesa 140 is 5 to 1 μm.
It is about 0 μm. The thickness of the first semiconductor conductive layer 102 is about 1.5 to 3 μm, and the shape of the mesa is
It is a rectangle of (40 × 80) μm ² to (100 × 200) μm ² . Like the thickness of the first semiconductor conductive layer 102, the thickness of the second semiconductor conductive layer 109 is about 1.5 to 3 μm. The shape of the mesa of the second semiconductor conductive layer 109 is a circle having a diameter of about 50 to 100 μm, or a side of 50 to 100 μm.
It is a rectangle (square) of about 100 μm.

The thickness of the light absorbing layer 103 is 1.5 to 3 μm
The mesa shape is a circle having a diameter of 35 to 70 μm. The thickness of the wide band gap layer 104 is 1
２2 μm, and the mesa shape is 30-60 μm in diameter.
Is circular. The shape of the diffusion region 105 in the wide band gap layer 104 is a circle having a diameter of 25 to 50 μm. Each shape is a shape viewed from the normal direction of the substrate (above the light receiving element 100).

The relationship of the carrier concentration is described as follows.
The carrier concentration of the semiconductor conductive layer (n ⁺ layer) 102 is high, while the carrier concentration of the light absorbing layer (n ⁻ layer or i layer) is low. In the present embodiment, the layer (n
^{Although the} wide band gap layer 104 is formed from the (-layer), the carrier concentration of the wide band gap layer 104 is not particularly limited.

In the light receiving element 100 of this embodiment, the semiconductor conductive layer 102 and the semi-insulating InP substrate 101 have different etching characteristics. Therefore, the semiconductor conductive layer 102 can be selectively etched, so that the InP substrate 1
The etching can be stopped at the stage where the surface of No. 01 is exposed. That is, the etching can be easily controlled, and it is not necessary to perform the process of etching the upper portion of the InP substrate 101. Therefore, the height of the light-receiving portion mesa 140 does not become unnecessarily high.
1 can be easily formed, and as a result, the light receiving element 100 excellent in mass productivity can be realized. Further, since the light receiving portion mesa 140 has a step on the side surface, it is possible to form a good pattern for removing the wiring 111. Therefore, also in this respect, the light receiving element 100 excellent in mass productivity
Can be realized.

In this embodiment, the light receiving section mesa 140
Although a configuration in which a step is formed on the side surface is shown, the present invention
The configuration is not limited to such a configuration, and the shape of the light-receiving unit mesa 140 can be appropriately designed to an appropriate shape. In the present embodiment, the configuration in which the P-side electrode 106 and the n-side electrode 107 are formed on the diffusion region 105 and the semiconductor conductive layer 102, respectively, has been described. It is sufficient that each of the 106 and the n-side electrode 107 can be electrically connected to the light absorbing layer 103. For this reason, it is not limited to the configuration shown in FIG. Further, it will be readily apparent to those skilled in the art that various modifications can be made.

Next, a method for manufacturing the light receiving element 100 according to the present embodiment will be described with reference to FIGS. 2A to 2D are process cross-sectional views illustrating a method for manufacturing the light receiving element 100.

First, as shown in FIG. 2A, an n-InGaAsP semiconductor conductive layer 102 and an n ⁻ -InGaAs light absorbing layer 103 are formed on a semi-insulating InP semiconductor substrate 101.
And an n ⁻ -InP window layer 104 are sequentially crystal-grown, and then a diffusion region 105 reaching the light absorption layer 103 by diffusing, for example, Zn impurities is formed in a part of the wide band gap layer (window layer) 104. I do.

InGaAs forming the semiconductor conductive layer 102
The composition of sP is expressed as _{In 1-x Ga x As y} P 1-y, and a relationship of y = 2.12x to between x and y. That is, there is freedom of the one-dimensional in the composition of _{In 1-x Ga x As y} P, when defining the values of composition x or y, InGaAsP having a predetermined absorption edge wavelength is uniquely determined. In other words, the composition of InGaAsP is InGaAsP
Can be expressed by the absorption edge wavelength.

FIG. 3 is a graph showing the relationship between the wavelength and the light absorption of InGaAsP. In this specification, In _1-x G
a _x As _y P _1-y light in (0 ≦ x ≦ 1,0 ≦ y ≦ 1) is defined as the absorption edge wavelength of the maximum wavelength to be absorbed. As shown in FIG. 3, InP containing no Ga and As is contained.
In the case of (x = 0, y = 0), the absorption edge wavelength is 0.93 μm
The absorption edge wavelength is the smallest among InGaAsP-based materials. On the other hand, In _1-x Ga _x A containing no P
At s (y = 1), the absorption edge wavelength is larger than 1.6 μm, and the absorption edge wavelength is largest in the InGaAsP-based material. The absorption edge wavelength of the InGaAsP-based material is represented by the compositions x and y
Can be set to an arbitrary value between the upper end and the lower end.

[0064] _{In 1-x Ga x As y} P 1-y absorption edge wavelength λg of
And the relationship between the composition x and y are shown in Table 1 below. The forbidden band width Eg is also shown for reference.

[0065]

[Table 1]

By determining the values of the compositions x and y, for example, 1.0 μm, 1.30 μm, 1.5 μm
An InGaAsP layer having an absorption edge wavelength such as m can be obtained. InP substrate 101 and n-InGaAsP
To make the etching characteristics different from that of the layer 102,
For example, the absorption edge wavelength λg is larger than 0.93 μm.
An n-InGaAsP layer 102 having a size smaller than 55 μm may be used. To further increase the difference in etching characteristics, it is preferable to use the n-InGaAsP layer 102 having an absorption edge wavelength λg of 1.0 μm or more.

In this embodiment, the wide band gap layer 104 is formed of an n ⁻ -InP layer (λg = 0.92 μm).
, Light having a wavelength of 1.3 μm to 1.55 μm mainly used in optical fiber communication is transmitted through the wide band gap layer 104 without being absorbed. Therefore, in the front-illuminated type light receiving element, the wide band gap layer 104 can function as a window layer.

Next, as shown in FIG. 2B, after a first etching mask 201 is formed on the wide band gap layer 104 so as to cover the diffusion region 105, the first etching mask 201 is formed. The wide band gap layer 104 is etched as a mask. As the first etching mask 201, for example, a SiN layer is used. In the present embodiment, the wide band gap layer 10
At the time of etching of No. 4, I
The first etching solution is used in which the etching rate of InP is sufficiently higher than the etching rate of nGaAs (for example, the etching rate ratio is 10 times or more). An example of such an etchant is a mixture of hydrochloric acid and phosphoric acid (volume ratio 1: 4). After that, the first etching mask 201 is removed.

Next, as shown in FIG. 2C, a second etching mask 202 is formed on a part of the light absorbing layer 103 so as to cover the wide band gap layer 104 including the diffusion region 105. Then, the light absorption layer 103 is etched using the second etching mask 202 as a mask. The second etching mask 202 is also made of SiN
Layers can be used.

In this embodiment, when the InGaAs light absorbing layer 103 is etched, the etching speed of the InGaAsP constituting the semiconductor conductive layer 102 is reduced by I.
The etching rate of nGaAs is sufficiently high (for example,
(Etching rate ratio is 10 times or more) The second etching solution is used. As such an etchant, for example, a mixed solution of sulfuric acid, a hydrogen peroxide solution and water (volume ratio of 1: 1: 5) can be mentioned. After that, the second etching mask 202 is removed.

Next, as shown in FIG. 2D, the semiconductor conductive layer 102 is formed so as to cover the wide band gap layer 104 and the light absorbing layer 103 and in a region where the mesa of the light absorbing layer 103 is not located. Forming a third etching mask 203 on the semiconductor conductive layer 102 so as to cover a part of
Next, the semiconductor conductive layer 102 is etched using the third etching mask 203 as a mask. As the third etching mask 203, a SiN layer can be used.

In this embodiment, when etching the InGaAsP semiconductor conductive layer 102, the semiconductor substrate 10
1, the etching rate of InP constituting InG
A third etching solution is used in which the etching rate of aAsP is sufficiently high (for example, the etching rate ratio is 10 times or more). As such an etchant,
For example, a mixture of sulfuric acid, hydrogen peroxide and water (volume ratio 5:
1: 1).

By the above etching process, the light receiving portion mesa 140 having a stepped side surface and the second semiconductor conductive layer 109 are formed.
Is formed. After that, the third etching mask 203 is removed, and then an insulating film 108 made of, for example, SiN is deposited on the entire surface of the substrate except for the region where the diffusion region 105 and the n-side electrode 107 are formed.

Thereafter, a pattern for removing the P-side electrode 106, the n-side electrode 107, the pad 110, and the wiring 111 is formed using a photoresist (not shown). Next, after a laminated metal film of Ti / Pt / Au is formed on the entire surface of the substrate and the photoresist is lifted off, the P-side electrode 10 is formed.
6, the n-side electrode 107, the pad 110, and the wiring 111 are obtained, and the light receiving element 100 shown in FIG. 1 is completed.

According to the manufacturing method of this embodiment, the InGaAsP semiconductor conductive layer 102 having different etching characteristics from the InP substrate 101 is formed on the InP substrate 101.
The InGaAsP semiconductor conductive layer 102 can be selectively etched. Therefore, the etching can be easily controlled. As a result, there is no need to perform etching up to the upper surface of the semiconductor substrate 101 to ensure separation of the semiconductor conductive layer.
The height of the mesa can be minimized.

In the manufacturing method of this embodiment, each semiconductor layer is etched by selective etching, and an etching mask having a different shape is used for each layer. By using such a plurality of etching masks, etching can be performed in order so that the lamination area of each layer on the substrate 101 is sequentially reduced as shown in FIG. Therefore, the respective semiconductor layers can be stacked so that a step is formed on the side surface of the light receiving unit mesa 140.

When the photoresist for defining the cutout pattern is deposited in a configuration in which no step is formed on the side surface of the light receiving portion mesa 140, the thickness of the photoresist located on the lower side surface of the mesa 140 is increased. Meanwhile, Mesa 1
The thickness of the photoresist located on the side surface of the upper part 40 is reduced. When a thin photoresist is formed on the upper portion of the mesa 140, the lift-off of the laminated metal film at that location is not performed well, and the entire upper portion of the mesa 140 is covered with the laminated metal film. In the case of a configuration in which a step is formed on the side surface of the light-receiving portion mesa 140, the formation of a thin photoresist that causes a pattern failure can be reduced as compared with a configuration in which there is no step. In other words, in the mesa in which the lamination area of each layer becomes smaller sequentially, each layer forms a step for each step, so that a plurality of steps having a height lower than the step (mesa height) formed by the entire mesa 140 are used. As a result, the wiring 111 can be formed satisfactorily, and the occurrence of pattern defects can be prevented. In the manufacturing method of the present embodiment, SiN is used as the first to third etching masks. However, the present invention is not limited to SiN. For example, an etching mask made of SiO ₂ or photoresist may be used. May be used. (Embodiment 2) Embodiment 2 according to the present invention will be described with reference to FIGS. FIG. 4 schematically shows a cross-sectional configuration of the light receiving element 200 according to the present embodiment.

The light receiving element 200 of the present embodiment is different from the light receiving element 100 of the first embodiment in that a carrier barrier layer 120 is formed between the first semiconductor conductive layer 102 and the light absorbing layer 103. . The other configuration is the same as that of the first embodiment, and the description is omitted or simplified.

The light receiving element 200 shown in FIG. 4 has a light receiving part mesa 150 and a pad mesa 160 on a semi-insulating InP substrate 101. The light receiving section mesa 150 is n-In
A semiconductor conductive layer 102 comprised of a GaAsP, n ^-
A barrier layer (InP buffer layer) 120 made of -InP, a light absorption layer 103 made of n ^-- InGaAs, and a wide band gap layer (InP window layer) 104 formed with ap ⁺ diffusion region 105. And in order from the bottom. These layers are sequentially laminated so that the lamination area becomes smaller. As in the first embodiment, the first semiconductor conductive layer 102 and the carrier barrier layer 120 are stacked.
, And between the light absorption layer 103 and the wide band gap layer 104. Note that a step may be provided between the carrier barrier layer 120 and the light absorption layer 103.

First semiconductor conductive layer 102 and light absorbing layer 10
3 has a function of preventing carriers generated in the semiconductor conductive layer 102 from diffusing into the light absorption layer 103. Therefore, the holes of the electron-hole pairs excited by light in the semiconductor conductive layer 102 can be prevented from diffusing into the light absorption layer 103 by the carrier barrier layer 120. In the case where the carrier barrier layer 120 is formed, the light receiving element 200 can be used not only as a front-illuminated type but also as a back-illuminated type. This will be described in more detail.

FIG. 5 shows each layer (101,
102, 120, 103, and 104) are diagrams schematically illustrating the band gap. Black circles represent electrons, and white circles represent holes.

In the case of rear incidence, since light is incident from the back side of the InP substrate 101, unlike the case of front incidence, the incident light is applied to the semiconductor conductive layer 10 before the light absorption layer 103.
Reach 2. Since the InP substrate 101 has a relatively large band gap, it transmits light having a wavelength of 1.3 μm or 1.55 μm for optical fiber communication (see FIG. 3 and Table 1).
In the semiconductor conductive layer 102 having a smaller band gap than the InP substrate 101, photoexcitation may be caused by incident light to generate electron-hole pairs. In order to prevent the holes of this electron-hole pair from diffusing into the light absorbing layer 103, between the semiconductor conductive layer 102 and the light absorbing layer 103,
In having a larger band gap than the semiconductor conductive layer 102
P carrier barrier layer 120 is inserted. In this configuration, the holes of the electron-hole pairs generated in the semiconductor conductive layer 102 cannot be diffused into the light absorption layer 103 and recombine in the semiconductor conductive layer 102 without any change. do not do.

As shown in FIG. 3 and Table 1, the absorption edge wavelength of the semiconductor conductive layer 102 composed of InGaAsP can be changed depending on the composition. Can function as That is, the semiconductor conductive layer 102
On the other hand, in addition to conductivity, a filtering function of transmitting light of a specific wavelength among incident light can be added.

For example, the wavelengths of 1.3 μm and 1.55 μm
In order to selectively receive light having a wavelength of 1.55 μm out of the light of m, InGa constituting the semiconductor conductive layer 102 is required.
The absorption edge wavelength of AsP is larger than 1.3 μm and 1.55
The wavelength may be smaller than μm, preferably larger than 1.35 μm and smaller than 1.5 μm, and light having a wavelength of 1.3 μm may be absorbed by the semiconductor conductive layer 102. As described above, the semiconductor conductive layer 1 is irradiated with light having a wavelength of 1.3 μm.
02 cannot be diffused into the light absorbing layer 103 due to the presence of the carrier barrier layer 120, and recombine in the semiconductor conductive layer 102 as a result. No photocurrent is generated with 0.3 μm light. On the other hand, light having a wavelength of 1.55 μm passes through the semiconductor conductive layer 102 and is absorbed by the light absorption layer 103 to generate a photocurrent. Therefore, it is possible to configure the light receiving element 200 having sensitivity only to light having a wavelength of 1.55 μm. In this way, it is possible to impart wavelength selectivity to the light receiving element 200.

The wavelengths of 1.3 μm and 1.55 μm
If it is desired to receive both of the light of
2 is 1.3 μm.
Smaller than, for example, greater than 0.93 μm and 1.3 μm.
m, preferably larger than 0.93 μm and smaller than 1.25 μm. In this case, light having wavelengths of 1.3 μm and 1.55 μm passes through the semiconductor conductive layer 102 and is absorbed by the light absorption layer 103.

In this embodiment, since the semiconductor conductive layer 102 has a filtering function, it is not necessary to add a separate filter layer in order to give wavelength selectivity to the light receiving element. Therefore, a light receiving element having wavelength selectivity can be realized with a simple configuration. In addition, with such a simple configuration, an increase in manufacturing cost can be suppressed. In addition, since the InP substrate 101 and the semiconductor conductive layer 102 have different etching characteristics from each other, the light receiving element 200 also has an advantage of being excellent in mass productivity for the same reason as in the first embodiment.

In this embodiment, the carrier barrier layer 1
Although an InP layer is used as 20, any layer other than the InP layer may be used as long as it can prevent carriers of the semiconductor conductive layer 102 from diffusing into the light absorption layer 103. Further, the pad mesa 160 may be formed of a layer (for example, an insulating layer) other than the second semiconductor conductive layer 109. However, from the viewpoint of easy manufacture, it is preferable that the pad mesa 160 be formed using the second semiconductor conductive layer 109 made of the same material as the first semiconductor conductive layer 109.

The other conditions of the light receiving element 200 of this embodiment are illustratively as follows. Note that the present invention is not limited to these conditions, and suitable conditions can be set as appropriate.

The thickness of the InP substrate 101 is about 150 μm, and the height of the light receiving mesa 140 is about 5 to 10 μm. The thickness of the first semiconductor conductive layer 102 is 1.5
３3 μm, and the shape of the mesa is (40 × 8
0) It is a rectangle of μm ² to (100 × 200) μm ² . Like the thickness of the first semiconductor conductive layer 102, the thickness of the second semiconductor conductive layer 109 is about 1.5 to 3 μm. The shape of the mesa of the second semiconductor conductive layer 109 is 50 to 1 in diameter.
A circle of about 00 μm, or 50-100 μm on one side
It is a rectangle (square) of a degree.

The thickness of the carrier barrier layer 120 is 1 to 2 μm.
m, and the mesa shape is almost the same as that of the light absorbing layer. The thickness of the light absorbing layer 103 is 1.5 to 3 μm
The mesa shape is a circle having a diameter of 35 to 70 μm. The thickness of the wide band gap layer 104 is 1
２2 μm, and the mesa shape is 30-60 μm in diameter.
Is circular. The shape of the diffusion region 105 in the wide band gap layer 104 is a circle having a diameter of 25 to 50 μm. Each shape is a shape viewed from the normal direction of the substrate (above the light receiving element 200).

The relationship between the carrier concentrations is as follows.
The carrier concentration of the semiconductor conductive layer (n ⁺ layer) 102 is high, while the carrier concentration of the light absorbing layer (n ⁻ layer or i layer) is low. In the present embodiment, the layer (n
^- was constructed from layers), the wide band gap layer 104
The carrier concentration of carrier barrier layer 120 is not particularly limited.

Next, a method for manufacturing the light receiving element 200 of this embodiment will be described with reference to FIGS. 6A to 6D are process cross-sectional views illustrating a method for manufacturing the light receiving element 200.

First, as shown in FIG. 6A, an n-InGaAsP semiconductor conductive layer 102, an n ⁻ -InP carrier barrier layer 120, and an n ⁻ − are formed on a semi-insulating InP substrate 101.
The InGaAs light absorbing layer 103 and the n ⁻ -InP wide band gap layer 104 are sequentially crystal-grown, and then, for example, Zn
Is diffused to reach the light absorption layer 103,
A diffusion region 105 is formed. When manufacturing the back-illuminated type light receiving element 200 that selectively receives light having a wavelength of 1.55 μm, InGaAs constituting the semiconductor conductive layer 102 is used.
As described above, the absorption edge wavelength of P is set in a range larger than 1.3 μm and smaller than 1.55 μm, and preferably in a range larger than 1.35 μm and smaller than 1.5 μm.

Next, as shown in FIG. 6B, after a first etching mask 301 is formed on the wide band gap layer 104 so as to cover the diffusion region 105, the first etching mask 301 is formed. The wide band gap layer 104 is etched as a mask. As the first etching mask 301, for example, a SiN layer is used. In the present embodiment, the wide band gap layer 10
At the time of etching of No. 4, I
The first etching solution is used in which the etching rate of InP is sufficiently higher than the etching rate of nGaAs (for example, the etching rate ratio is 10 times or more). An example of such an etchant is a mixture of hydrochloric acid and phosphoric acid (volume ratio 1: 4). After that, the first etching mask 301 is removed.

Next, as shown in FIG. 6C, a second etching mask 302 is formed on a part of the light absorbing layer 103 so as to cover the wide band gap layer 104 including the diffusion region 105. Then, the light absorption layer 103 and the carrier barrier layer 120 are etched using the second etching mask 302 as a mask. As the second etching mask 302, a SiN layer can be used.

In this embodiment, when etching the InGaAs light absorbing layer 103, the half carrier barrier layer 12
0, the etching rate of InP
A second etching solution is used in which the etching rate of aAs is sufficiently high (for example, the etching rate ratio is 10 times or more). As such an etching solution, for example, a mixed solution of sulfuric acid, hydrogen peroxide and water (volume ratio of 1: 1:
5). On the other hand, the InP carrier barrier layer 120
Is used, a third etching solution is used in which the etching rate of InP is sufficiently higher than the etching rate of InGaAsP forming the semiconductor conductive layer 102 (for example, the etching rate ratio is 10 times or more). . An example of such an etchant is a mixture of hydrochloric acid and phosphoric acid (volume ratio 1: 4). afterwards,
The second etching mask 302 is removed.

Next, as shown in FIG. 6D, a region which covers the wide band gap layer 104, the light absorbing layer 103 and the carrier barrier layer 120, and where the mesa of the light absorbing layer 103 is not located. A third etching mask 303 is formed on the semiconductor conductive layer 102 so as to cover a part of the semiconductor conductive layer 102, and then the semiconductor conductive layer 102 is etched using the third etching mask 303 as a mask. As the third etching mask 303, a SiN layer can be used.

In this embodiment, when etching the InGaAsP semiconductor conductive layer 102, the semiconductor substrate 10
1, the etching rate of InP constituting InG
A fourth etching solution is used in which the etching rate of aAsP is sufficiently high (for example, the etching rate ratio is 10 times or more). As such an etchant,
For example, a mixture of sulfuric acid, hydrogen peroxide and water (volume ratio 1: 1)
1: 5).

By the above etching process, the light receiving portion mesa 150 having a stepped side surface and the second semiconductor conductive layer 109 are formed.
Is formed. After that, the third etching mask 303 is removed, and then an insulating film 108 made of, for example, SiN is deposited on the entire surface of the substrate except for the region where the diffusion region 105 and the n-side electrode 107 are formed.

Thereafter, a pattern for removing the P-side electrode 106, the n-side electrode 107, the pad 110, and the wiring 111 is formed using a photoresist (not shown). Next, after a laminated metal film of Ti / Pt / Au is formed on the entire surface of the substrate and the photoresist is lifted off, the P-side electrode 10 is formed.
6, the n-side electrode 107, the pad 110, and the wiring 111 are obtained, and the light receiving element 200 shown in FIG. 4 is completed.

According to the manufacturing method of this embodiment, the InGaAsP semiconductor conductive layer 102 having different etching characteristics from the InP substrate 101 is formed on the InP substrate 101.
The InGaAsP semiconductor conductive layer 102 can be selectively etched. Therefore, the etching can be easily controlled. As a result, the light receiving unit mesa 150
Height can be kept to a minimum.

In addition, the etching of each semiconductor layer is performed by selective etching, and at the same time, 3
A type of etching mask is used. By using such a plurality of etching masks, the light receiving portion mesa 1
Each semiconductor layer can be laminated so that a step is formed on the side surface of the semiconductor device 50. As a result, the wiring 111 can be formed favorably, and the problem of disconnection can be prevented. Further, in this embodiment, the light absorption layer 103 and the carrier barrier layer 120 are each etched by the second etching liquid and the third etching liquid using only the second etching mask. The number of forming steps can be reduced. (Embodiment 3) Embodiment 3 according to the present invention will be described with reference to FIGS. FIG. 7 schematically illustrates a cross-sectional configuration of the light receiving element 300 according to the present embodiment.

The light receiving element 300 of the present embodiment has the wiring 11
1 in that the underlying insulating film is composed of a laminated film of a SiN layer and a SiO ₂ layer,
This is different from the light receiving element 100 according to the first embodiment, which is a single layer. Other configurations are the same as those of the first embodiment.
Omit or simplify the description.

The light receiving element 300 shown in FIG. 7 has a light receiving part mesa 140 and a pad mesa 160 on a semi-insulating InP substrate 101. The light receiving unit mesa 140 is n-In
A semiconductor conductive layer 102 comprised of a GaAsP, n ^-
Light absorbing layer 103 made of -InGaAs, and p ⁺
A wide band gap layer (InP window layer) 104 in which the diffusion region 105 is formed is provided in order from the lower layer. Each of these layers is sequentially laminated so that the lamination area becomes smaller.
Are stacked so that a step is provided on the side surface of the. Note that, as in the configuration of the second embodiment, the semiconductor conductive layer 10
A carrier barrier layer 120 may be provided between the light absorbing layer 103 and the light absorbing layer 103. Further, the pad mesa 160 can be formed from a layer (eg, an insulating layer) other than the second semiconductor conductive layer 109.

In the light receiving element 300, the diffusion region 10
5 and the SiN passivation film 108 so as to cover the entire substrate except for the region where the n-side electrode 107 is formed.
And an insulating film 114 formed of a laminated film of SiO ₂ and an SiO ₂ interlayer insulating film 112. That is, the insulating film 114
Surface of Light-receiving Mesa 140 and Pad Mesa 160 and Substrate 1
01, and a laminated structure of a SiN passivation film (SiN layer) 108 formed on the surface of the SiN layer 108 and a SiO ₂ interlayer insulating film (SiO ₂ layer) 112 formed on the SiN layer 108. In this embodiment, the thickness of the SiN passivation film 108 is about 30 nm, and the thickness of the SiO ₂ interlayer insulating film (SiO ₂ layer) 112 is about 500 nm.

In the light receiving element 300 of the present embodiment, the insulating film 114 formed on the surface of the light receiving portion mesa 140 has a laminated structure, and the insulating film 114 is formed thicker than in the case of a single SiN layer. ing. Therefore, the wiring capacitance can be reduced. Hereinafter, the reason why the insulating film 114 is formed by a stacked film of the SiN layer and the SiO ₂ layer will be described. Generally SiN is limited to thickly If so cracks are likely to occur in thickness is deposited, yet SiN is SiO ₂
Has a higher dielectric constant than. However, in the case of an InP-based light receiving element, if SiO ₂ is used for the passivation film, S
It is known that the leakage current is larger than when iN is used. Therefore, the inventor of the present application believes that a light-receiving element having a low leakage current and a low wiring capacity can be realized by using an insulating film in which a thick SiO ₂ layer for reducing capacitance is stacked on a thin SiN layer for passivation. With this in mind, the inventors succeeded in completing the light receiving element 300 in which the wiring capacitance was reduced to about half of the junction capacitance. The junction capacitance of the light receiving element 300 shown in FIG. 7 is 0.1 pF, and the wiring capacitance is 0.05 pF.

The thickness of the SiN layer 108 is 20 nm or more and 1
It is preferable that the thickness be not more than 00 nm. The reason is that Si
This is because if the thickness of the N layer 108 is 20 nm or more, a passivation effect can be obtained, and if the thickness is 100 nm or less, the SiN layer can be formed without cracks. The diameter of the diffusion region 105 is 35
For a light receiving element of about μm,
In order to make it about 1/100, the thickness of the SiO ₂
Preferably, the thickness is 0 nm or more. The upper limit of the thickness of the SiO ₂ layer 112 is not particularly limited, and a suitable value may be determined as appropriate according to the design of the light receiving element 300.

Next, a method for manufacturing the light receiving element 300 of this embodiment will be described with reference to FIGS. 8A to 8D are process cross-sectional views illustrating a method for manufacturing the light receiving element 300.

First, a semi-insulating InP substrate 101 is placed on a semi-insulating InP substrate 101 by the same manufacturing method as shown in FIGS. 2 (a) to 2 (d).
A structure in which the light receiving portion mesa 140 and the pad mesa 160 are formed is obtained. This structure is shown in FIG. Since the structure shown in FIG. 8A is obtained by using the manufacturing method of the first embodiment, the effects of the first embodiment can be obtained in the present embodiment.

Next, as shown in FIG. 8B, the substrate 10 is covered so as to cover the light receiving portion mesa 140 and the pad mesa 160.
1 on the SiN passivation film 108 (thickness: about 3
0 nm) and the SiO ₂ interlayer insulating film 112 (thickness: about 500
nm), and then over the diffusion region 105 and n
The opening 310 is formed by removing the portion of the interlayer insulating film 112 and the passivation film 108 where the side electrode 107 is to be formed by etching. Note that the insulating film 114 located on the light receiving portion mesa 140 is formed of the wide band gap layer 10.
4, formed on the exposed portions of the light absorption layer 103 and the semiconductor conductive layer 102, and has a surface reflecting the step formed on the side surface of the light receiving portion mesa 140.

Next, as shown in FIG. 8C, a spacer film 311 made of SiN is formed on the interlayer insulating film 112.
After depositing (thickness: about 200 nm), a pattern for removing the P-side electrode 106, the n-side electrode 107, the pad 110, and the wiring 111 is formed by the photoresist 312.
Next, the spacer film 311 is etched using the photoresist 312 as a mask. The spacer film 31
Reference numeral 1 denotes a layer inserted between the insulating film 114 serving as a base and a photoresist 312 for defining a missing pattern. By inserting a spacer film 311, a photoresist is formed during lift-off in a later step. It is possible to effectively prevent the metal thin film on the 303 from peeling off to the metal thin film in the missing pattern as well.

Next, as shown in FIG. 8D, Ti (thickness: about 50 nm), Pt (thickness: about 100 nm)
nm) and Au (thickness: about 400 nm) are sequentially deposited, and then the photoresist 312 is dissolved in, for example, acetone, and lifted off to obtain a p-side electrode 106 and an n-side electrode 10.
7, the pad 110 and the wiring 111 are formed simultaneously. Thereafter, if the spacer film 311 is removed, the light receiving element 300 shown in FIG. 7 is obtained. The spacer film 3
11 may be left as it is and used as an anti-reflection film of the front-illuminated type light receiving element. After the structure shown in FIG. 7, an antireflection film can be deposited again.

In the manufacturing method of this embodiment, the spacer film 3
Since 11 is used, the lift-off of Ti / Pt / Au becomes easier as compared with the case where only the photoresist is used. Further, since the spacer film 311 is made of SiN and the interlayer insulating film 112 thereunder is made of SiO ₂ , the spacer film 311 can be selectively etched. More specifically, the etching rate by reactive ion etching using a reactive gas such as CF ₄ is S
Since it is larger than iN and smaller than SiO ₂ , if the spacer film 311 is etched by reactive ion etching, only the spacer film 311 can be removed without substantially etching the interlayer insulating film 112.

In the light receiving element 300 of this embodiment, since the pad electrode 110 is formed on the pad mesa 160 in an area different from that of the light receiving section mesa 140, not only the parasitic capacitance due to the pad electrode 110 but also the light receiving section mesa Since the parasitic capacitance between 140 and the wiring 111 is also reduced, a faster light receiving element can be realized as compared with a conventional light receiving element. Further, in combination with the configuration of the second embodiment, the effect of the second embodiment can also be obtained.

[0115]

According to the light receiving element of the present invention, since the etching characteristics of the semiconductor conductive layer and the semiconductor substrate are different from each other, the height of the semiconductor structure including the semiconductor conductive layer should not be increased more than necessary. it can. Therefore, the formation of the wiring is facilitated, so that a light receiving element excellent in mass productivity can be provided.

Further, according to another light receiving element of the present invention, since the carrier barrier layer is formed between the semiconductor conductive layer and the light absorbing layer, it can function as a back illuminated light receiving element. Since the semiconductor conductive layer has a filtering function, a high-performance light-receiving element having wavelength selectivity can be provided.

Further, according to still another light receiving element of the present invention, since the insulating film formed on the surface of the semiconductor structure has a laminated structure including the SiN layer and the SiO ₂ layer, the wiring capacitance is reduced. A reduced high-speed light receiving element can be provided.

[Brief description of the drawings]

FIG. 1 is a light receiving element 10 according to a first embodiment of the present invention.
It is a figure which shows the cross-sectional structure of No. 0 typically.

FIGS. 2A to 2D are process cross-sectional views illustrating a method for manufacturing the light receiving element 100 according to the first embodiment of the present invention.

FIG. 3 is a graph showing a relationship between wavelength and absorption of InGaAsP.

FIG. 4 is a diagram schematically showing a cross-sectional configuration of a light receiving element 200 according to a second embodiment.

FIG. 5 is a graph showing a band gap of each layer of the light receiving element 200.

FIGS. 6A to 6D are process cross-sectional views illustrating a method for manufacturing the light receiving element 200 according to the second embodiment.

FIG. 7 is a diagram schematically illustrating a cross-sectional configuration of a light receiving element according to a third embodiment.

FIGS. 8A to 8D are process cross-sectional views illustrating a method for manufacturing the light receiving element 300 according to the third embodiment.

FIG. 9 is a diagram schematically showing a cross-sectional configuration of a conventional light receiving element.

[Explanation of symbols]

Reference Signs List 101 semiconductor substrate 102 semiconductor conductive layer 103 light absorption layer 104 wide band gap layer (window layer) 105 diffusion region 106 p-side electrode 107 n-side electrode 108 insulating film (SiN layer) 110 pad (pad electrode) 111 wiring 112 interlayer insulating film (SiO ₂ layer) 114 Insulating film 120 Carrier barrier layer (buffer layer) 140, 150 Light receiving part mesa 160 Pad mesa 311 Spacer film 312 Photoresist

Claims (27)

[Claims] 1. A semi-insulating semiconductor substrate, a semiconductor conductive layer formed in a partial region on the semiconductor substrate and having conductivity, and formed on the semiconductor conductive layer to absorb incident light. A light-absorbing layer having a function of performing, a wide-bandgap layer formed on the light-absorbing layer and having a larger bandgap than the light-absorbing layer, and a part of the wide-bandgap layer to reach the light-absorbing layer. A light-receiving element, wherein the semiconductor conductive layer is a semiconductor layer having etching characteristics different from those of the semiconductor substrate. 2. The semiconductor substrate is made of InP, the semiconductor conductive layer is made of InGaAsP, the light absorbing layer is made of InGaAs, and the wide band gap layer is The light receiving element according to claim 1, wherein the light receiving element is made of InP. 3. The InG forming the semiconductor conductive layer.
The absorption edge wavelength of aAsP is larger than 0.93 μm.
The light-receiving element according to claim 1, wherein the light-receiving element is in a range smaller than 55 μm. 4. The semiconductor conductive layer is an n-type semiconductor layer, the impurity is a p-type impurity, and the light absorbing layer functions as an i-layer of a pin photodiode. The light-receiving element according to claim 1, further comprising: an n-side electrode that electrically contacts the diffusion region; and a p-side electrode that electrically contacts the diffusion region. 5. A semiconductor structure including the semiconductor conductive layer, the light absorbing layer, and the wide band gap layer is formed in the partial region on the semiconductor substrate. In a region other than the partial region, a further semiconductor conductive layer separated from the semiconductor conductive layer in the semiconductor structure is formed. On the further semiconductor conductive layer, an external device and an electric device are electrically connected. 2. The pad according to claim 1, further comprising: a pad for electrically connecting the pad, wherein the pad is electrically connected to the diffusion region formed in a part of a wide band gap layer in the semiconductor structure. Light receiving element. 6. An annular electrode having an opening at the center is formed on the diffusion region, and the electrode is located on an insulating film formed so as to cover a surface of the semiconductor structure. The light receiving element according to claim 5, wherein the light receiving element is connected to the pad via a wiring. 7. The light-receiving element according to claim 5, wherein each layer constituting the semiconductor structure is stacked so that a step is formed on a side surface of the semiconductor structure. 8. A semi-insulating semiconductor substrate, a semiconductor conductive layer formed in a partial region on the semiconductor substrate and having conductivity, a light absorption layer having a function of absorbing incident light, A carrier barrier layer formed between the semiconductor conductive layer and the light absorbing layer to prevent carriers generated in the semiconductor conductive layer from diffusing into the light absorbing layer; and a carrier barrier layer formed on the light absorbing layer. A wide band gap layer having a larger band gap than the light absorption layer; and a diffusion region formed by diffusing an impurity into a part of the wide band gap layer so as to reach the light absorption layer. Is a light-receiving element made of InGaAsP and having a function of transmitting light of a specific wavelength among the incident light. 9. InGaAs constituting the semiconductor conductive layer
The absorption edge wavelength of sP is larger than 1.3 μm and 1.55 μm.
The light receiving element according to claim 8, wherein the light receiving element is within a range smaller than m. 10. The light-receiving element according to claim 9, wherein the absorption edge wavelength is in a range larger than 1.35 μm and smaller than 1.5 μm. 11. InGa constituting the semiconductor conductive layer
The absorption edge wavelength of AsP is larger than 0.93 μm and 1.3.
The light receiving element according to claim 8, wherein the light receiving element is within a range smaller than μm. 12. The absorption edge wavelength according to claim 1, wherein the absorption edge wavelength is within a range of more than 0.93 μm and less than 1.25 μm.
2. The light receiving element according to 1. 13. The semiconductor substrate is made of InP, the semiconductor conductive layer is made of InGaAsP, the carrier barrier layer is made of InP, and the light absorbing layer is made of InGaAs. The light receiving element according to claim 8, wherein the wide band gap layer is made of InP. 14. The light-receiving element according to claim 8, wherein the light-receiving element is a back-illuminated light-receiving element that is incident from the back side of the semiconductor substrate. 15. A semiconductor structure including the semiconductor conductive layer, the light absorption layer, the carrier obstacle layer, and the wide band gap layer is formed in the partial region on the semiconductor substrate, In a region excluding the partial region on the semiconductor substrate, a further semiconductor conductive layer separated from the semiconductor conductive layer in the semiconductor structure is formed, and on the further semiconductor conductive layer A pad for electrically connecting to an external device is formed, and the pad is electrically connected to the diffusion region formed in a part of a wide band gap layer in the semiconductor structure. The light receiving element according to claim 8. 16. A semi-insulating semiconductor substrate, a semiconductor conductive layer formed in a partial region on the semiconductor substrate and having conductivity, and formed on the semiconductor conductive layer to absorb incident light. A light-absorbing layer having a function of performing, a wide-bandgap layer formed on the light-absorbing layer and having a larger bandgap than the light-absorbing layer, and a part of the wide-bandgap layer to reach the light-absorbing layer. A diffusion region formed by diffusing impurities into the diffusion region; and an electrode formed on the diffusion region. The semiconductor conductive layer, the light absorption layer, and the wide band are provided in the partial region on the semiconductor substrate. A semiconductor structure including a gap layer is formed, and in a region other than the partial region on the semiconductor substrate, a further half separated from the semiconductor conductive layer in the semiconductor structure. A body conductive layer is formed, a pad for electrically connecting to an external device is formed on the further semiconductor conductive layer, and an insulating film is formed on a surface of the semiconductor structure. And a wiring for electrically connecting the electrode and the pad is formed on the insulating film. The insulating film includes a SiN layer and a SiO ₂ layer formed on the SiN layer. A light receiving element having a stacked structure including: 17. The light receiving device according to claim 16, wherein the thickness of the SiN layer is 20 nm or more and 100 nm or less, and the thickness of the SiO ₂ layer is 400 nm or more. 18. A carrier barrier layer is further formed between the semiconductor conductive layer and the light absorbing layer to prevent carriers generated in the semiconductor conductive layer from diffusing into the light absorbing layer. The light receiving element according to claim 16, wherein 19. A semiconductor conductive layer having a different etching characteristic from the semiconductor substrate, a light absorbing layer having a function of absorbing incident light, and a band gap larger than the light absorbing layer on the semi-insulating semiconductor substrate. Forming a diffusion region by diffusing impurities into a part of the wide band gap layer so as to reach the light absorption layer; and forming a diffusion region; Etching the gap layer and the light absorbing layer into a predetermined shape; providing an etching mask on the semiconductor conductive layer so as to cover the wide band gap layer and the light absorbing layer in the predetermined shape; Using an etchant that selectively etches the semiconductor conductive layer with respect to a substrate, selectively etches a portion of the semiconductor conductive layer. Comprising a step of etching, the manufacturing method of the light-receiving element. 20. The step of etching the wide band gap layer and the light absorption layer into a predetermined shape, wherein after the step of forming the diffusion region, the step of forming the diffusion region covers the wide band gap layer so as to cover the diffusion region. A step of providing a first etching mask; a step of selectively etching a part of the wide band gap layer with respect to the light absorption layer; 20. The method according to claim 19, further comprising: providing a second etching mask; and selectively etching a part of the light absorption layer with respect to the semiconductor conductive layer. 21. The semiconductor substrate is made of InP, the semiconductor conductive layer is made of InGaAsP,
The light absorbing layer is made of InGaAs, the wide band gap layer is made of InP, and the etching solution is an etching solution containing hydrochloric acid.
A method for manufacturing the light receiving element according to claim 20. 22. The semiconductor substrate is made of InP, the semiconductor conductive layer is made of InGaAsP,
The light absorbing layer is made of InGaAs, the wide band gap layer is made of InP, a step of etching a part of the wide band gap layer, and a step of etching a part of the light absorbing layer, 21. The method for manufacturing a light-receiving element according to claim 20, wherein the method is performed using an etching solution containing sulfuric acid as an etching solution for the etching. 23. A semiconductor conductive layer having conductivity on a semi-insulating semiconductor substrate, a carrier barrier layer for preventing carriers generated in the semiconductor conductive layer from diffusing into an upper layer, and incident light. A light absorbing layer having a function of absorbing light,
A step of sequentially crystal-growing a wide band gap layer having a larger band gap than the light absorption layer; and diffusing an impurity into a part of the wide band gap layer so as to reach the light absorption layer. Forming a first etching mask on the wide band gap layer so as to cover the diffusion region; and selectively using the first etching solution with respect to the light absorbing layer. Etching a part of the wide band gap layer, providing a second etching mask on the light absorbing layer so as to cover the wide band gap layer, and using a second etchant Selectively etching a part of the light absorbing layer with respect to a carrier barrier layer; and using a third etchant to etch the semiconductor conductive layer. Selectively etching a part of the carrier barrier layer, and forming a third etching mask on the semiconductor conductive layer so as to cover the wide band gap layer, the light absorbing layer and the carrier barrier layer. A method for manufacturing a light-receiving element, comprising: providing; and selectively etching a part of the semiconductor conductive layer with respect to the semiconductor substrate using a fourth etchant. 24. The semiconductor substrate is made of InP, the semiconductor conductive layer is made of InGaAsP,
The carrier barrier layer is made of InP, the light absorbing layer is made of InGaAs, the wide band gap layer is made of InP, and the first and third etching solutions are etching solutions containing hydrochloric acid. 24. The method according to claim 23, wherein the second and fourth etching solutions are etching solutions containing sulfuric acid. 25. A semiconductor conductive layer having an etching characteristic different from that of the semiconductor substrate, a light absorbing layer having a function of absorbing incident light, and a band gap larger than the light absorbing layer on a semi-insulating semiconductor substrate. Forming a diffusion region by diffusing impurities into a part of the wide band gap layer so as to reach the light absorption layer; and forming a diffusion region; A step of etching the gap layer and the light absorbing layer into a predetermined shape; and selectively etching a part of the semiconductor conductive layer to form the wide band gap layer and the light absorbing layer of the predetermined shape, and the semiconductor. Forming a semiconductor structure including a conductive layer and a further semiconductor conductive layer spaced from the semiconductor conductive layer in the semiconductor structure; Forming a SiN layer and a SiN layer on the surface of the semiconductor structure, the exposed portion of the semiconductor substrate and the further semiconductor conductive layer.
Forming an insulating film including the SiN layer and the SiO ₂ layer by sequentially laminating an O ₂ layer; and forming the insulating film located on a diffusion region in the wide band gap layer in the semiconductor structure. Forming an opening on the diffusion region by removing the electrode; forming an electrode on the diffusion region in the opening; and forming the insulating film or the insulating film on an exposed portion of the semiconductor substrate. Forming a pad for electrically connecting to an external device on the insulating film formed on the further semiconductor conductive layer; and electrically connecting the electrode and the pad on the insulating film. Forming a wiring to be electrically connected. 26. The method according to claim 25, wherein the step of forming the electrode, the step of forming the pad, and the step of forming the wiring are performed in the same step. 27. The step of performing in the same step, a step of depositing a spacer film made of SiN on the insulating film; and a step of removing a pattern of the electrode, the pad, and the wiring by using a photoresist. Forming, a step of etching the spacer film using the photoresist as a mask, a step of forming a metal thin film by depositing a metal material on the exposed insulating film and the photoresist, and 27. The method according to claim 26, further comprising: forming the electrode, the pad, and the wiring by removing and removing a resist.