CN112304347B - Coherent detector chip and preparation method thereof - Google Patents
Coherent detector chip and preparation method thereof Download PDFInfo
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- CN112304347B CN112304347B CN202011199919.XA CN202011199919A CN112304347B CN 112304347 B CN112304347 B CN 112304347B CN 202011199919 A CN202011199919 A CN 202011199919A CN 112304347 B CN112304347 B CN 112304347B
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- 230000001427 coherent effect Effects 0.000 title claims abstract description 43
- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- 239000010410 layer Substances 0.000 claims abstract description 244
- 238000005253 cladding Methods 0.000 claims abstract description 72
- 230000003287 optical effect Effects 0.000 claims abstract description 66
- 239000000758 substrate Substances 0.000 claims abstract description 63
- 238000010168 coupling process Methods 0.000 claims abstract description 62
- 238000005859 coupling reaction Methods 0.000 claims abstract description 62
- 230000008878 coupling Effects 0.000 claims abstract description 61
- 239000012792 core layer Substances 0.000 claims abstract description 59
- 230000031700 light absorption Effects 0.000 claims abstract description 26
- 238000000034 method Methods 0.000 claims description 42
- 239000000463 material Substances 0.000 claims description 27
- 239000002184 metal Substances 0.000 claims description 17
- 238000004519 manufacturing process Methods 0.000 claims description 13
- 238000000407 epitaxy Methods 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 238000001312 dry etching Methods 0.000 claims description 5
- 230000010354 integration Effects 0.000 claims description 5
- 239000000523 sample Substances 0.000 claims description 3
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 2
- 230000008569 process Effects 0.000 description 19
- 238000005516 engineering process Methods 0.000 description 16
- 230000004888 barrier function Effects 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 230000005693 optoelectronics Effects 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000003776 cleavage reaction Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000002360 explosive Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 210000001503 joint Anatomy 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920000620 organic polymer Polymers 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000007017 scission Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
- G01D5/26—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable characterised by optical transfer means, i.e. using infrared, visible, or ultraviolet light
- G01D5/32—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable characterised by optical transfer means, i.e. using infrared, visible, or ultraviolet light with attenuation or whole or partial obturation of beams of light
- G01D5/34—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable characterised by optical transfer means, i.e. using infrared, visible, or ultraviolet light with attenuation or whole or partial obturation of beams of light the beams of light being detected by photocells
- G01D5/353—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable characterised by optical transfer means, i.e. using infrared, visible, or ultraviolet light with attenuation or whole or partial obturation of beams of light the beams of light being detected by photocells influencing the transmission properties of an optical fibre
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/122—Basic optical elements, e.g. light-guiding paths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12133—Functions
- G02B2006/12138—Sensor
Abstract
The present disclosure provides a coherent detector chip, comprising: the chip comprises a substrate, a first chip substrate, a second chip substrate and a third chip substrate, wherein the substrate is a chip base and comprises a first substrate area, a second substrate area and a third substrate area positioned between the first substrate area and the second substrate area; and the passive region is positioned on the first substrate region and sequentially comprises the following components from bottom to top: a first lower cladding layer, a first waveguide core layer, and an upper cladding layer; the passive region is used for forming an optical mixer and an output waveguide thereof; the active region is positioned on the second substrate region and sequentially comprises from bottom to top: the waveguide detector comprises a second lower cladding layer, a second waveguide core layer, a second lower contact layer, a light absorption layer, a P-type layer and an upper contact layer, wherein an active region is used for forming a waveguide detector; and a coupling region located between the inactive region and the active region above the third substrate region, comprising in sequence from bottom to top: the coupling region is used for connecting an output waveguide of the optical mixer and the waveguide detector. Also provides a preparation method of the chip.
Description
Technical Field
The disclosure relates to the technical field of semiconductors, in particular to a monolithic integrated coherent detector chip and a preparation method thereof.
Background
With the implementation of 5G communication network scheme and the extensive development of 6G technology research, the communication rate and capacity of mobile internet of things will face unprecedented explosive growth. The huge data interaction amount puts higher requirements on the receiving, transmitting and processing speed of photoelectric signals such as data centers, backbone networks, access network nodes and the like. The coherent technology is a key technology oriented to the next generation and capable of effectively solving the problem of high-speed data transmission. The method realizes the multiple increase of the transmitted and received data volume under the same photoelectric chip transmission capacity by processing the photoelectric signal in a high-order modulation format, not only can meet the requirement of the rapidly increased data volume, but also can reduce the harsh requirement on the performance of the device.
The optoelectronic integrated chip technology is a technology for integrating photoelectric devices with different functions on a single substrate, so that a single chip is used for realizing a composite photoelectric function. Compared with the method of assembling discrete photoelectric devices, the method has the advantages of low power consumption, small size, economic cost, high module stability and the like. At present, the application of the coherent technology has gradually shifted from a backbone network to a more miniaturized and denser backbone network and the like, and under a limited resource environment, the single chip integrated chip can improve the module density to the greatest extent, so as to improve the data transmission efficiency of a link. However, in the process of implementing the present disclosure, the applicant finds that a chip scheme in which the optical mixer and the waveguide detector are separately disposed in the prior art has a large coupling loss, and the optical mixer and the waveguide detector usually adopt different material systems, so that the stability is poor when the optical mixer and the waveguide detector are mixed into an integrated chip, which is not favorable for considering both the high success rate of mass production and the high performance application of the chip.
Therefore, how to develop high-performance integrated optoelectronic devices and chips has become a technical problem to be solved.
Disclosure of Invention
Technical problem to be solved
Based on the above problems, the present disclosure provides a coherent detector chip and a manufacturing method thereof, so as to alleviate technical problems of poor stability of a coherent detector hybrid integrated chip in the prior art, which is not favorable for considering both high success rate of mass production and high performance application of the chip.
(II) technical scheme
In one aspect of the present disclosure, a coherent detector chip is provided, including: the substrate is a chip base and comprises a first substrate area, a second substrate area and a third substrate area positioned between the first substrate area and the second substrate area; and the passive region is positioned on the first substrate region and sequentially comprises the following components from bottom to top: a first lower cladding layer, a first waveguide core layer, and an upper cladding layer; the passive region is used to form an optical mixer and its output waveguides; the active area is located on the second substrate district, includes from bottom to top in proper order: the waveguide detector comprises a second lower cladding layer, a second waveguide core layer, a second lower contact layer, a light absorption layer, a P-type layer and an upper contact layer, wherein the active region is used for forming a waveguide detector; and the coupling region is positioned between the passive region and the active region above the third substrate region and sequentially comprises from bottom to top: the coupling region is used for connecting the output waveguide of the optical frequency device and the waveguide detector.
In the disclosed embodiment, the first lower cladding layer, the second lower cladding layer and the third lower cladding layer together form a lower cladding layer; the first waveguide core layer, the second waveguide core layer and the third waveguide core layer jointly form a waveguide core layer; causing the passive, active and coupling regions to share a lower cladding layer with a waveguide core layer; the second lower contact layer and the third lower contact layer jointly form a lower contact layer, so that the active region and the coupling region share the lower contact layer.
In the embodiment of the present disclosure, the forbidden bandwidth of the material of the light absorption layer is smaller than the energy of incident photons, and the forbidden bandwidths of the materials of the rest epitaxial layers of the coherent detector chip except the light absorption layer and the upper contact layer are all larger than the energy of incident photons.
In the embodiment of the present disclosure, the optical mixer adopts a strong optical confinement type deep ridge waveguide structure, wherein the widths of the first lower cladding layer, the first waveguide core layer and the upper cladding layer are the same, a high equivalent refractive index difference is formed between the sidewall of the optical mixer and the environment, and both the input waveguide and the output waveguide of the optical mixer are single-mode waveguides in a target operating wavelength range.
In the embodiment of the disclosure, the waveguide detector adopts a double-mesa multimode waveguide structure, and a light absorption layer, a P-type layer and an upper contact layer of the waveguide detector form a narrow strip-shaped narrow mesa in a unified manner; the second lower contact layer forms a wide table top, the narrow table top is positioned on the wide table top, and metal contacts are arranged on the surface of the narrow table top and the surfaces of the two sides of the narrow table top, which correspond to the wide table top.
In the embodiment of the disclosure, the coupling region adopts a single-mode waveguide structure whose side wall is strongly limited by a deep ridge and whose extension direction is weakly limited, and the width of the single-mode waveguide structure is not less than the width of the output waveguide of the optical mixer and not more than the width of the narrow mesa of the detector.
In the embodiment of the disclosure, the length of the coupling region is L, and L is more than 0 μm and less than or equal to 10 μm.
In the coherent detector chip of the present disclosure, the semiconductor substrate is intrinsic or Fe-doped semi-insulating InP; the lower cladding layer is intrinsic or unintentionally doped InP; the waveguide core layer is intrinsic or unintentionally doped In 1-x Ga x As y P 1-y (ii) a The upper cladding layer is intrinsic or unintentionally doped InP; the lower contact layer is N-type doped In 1- x Ga x As y P 1-y And the component coefficients x and y are the same as those of the waveguide core layer; the light absorption layer is InGaAs which is doped intrinsically or unintentionally or is doped lightly P type or N type; the P-type layer is P-type doped In 1-x Ga x As y P 1-y (ii) a The upper contact layer is P-type doped In 1-x Ga x As y P 1-y 。
In another aspect of the present disclosure, a method for manufacturing a coherent detector chip is provided, where the method is used to manufacture the coherent detector chip described in any one of the above paragraphs, and the method includes:
operation S1: epitaxially growing a lower cladding layer, a waveguide core layer and an upper cladding layer on a substrate;
operation S2: removing all the corresponding upper cladding layers in the active region and the coupling region;
operation S3: after the operation S2, carrying out secondary epitaxial growth on a lower contact layer, a light absorption layer, a P-type layer and an upper contact layer;
operation S4: removing the upper contact layer, the P-type layer and the light absorption layer in the coupling region, and removing the upper contact layer, the P-type layer, the light absorption layer and the lower contact layer in the inactive region;
operation S5: preparing a double-mesa multimode waveguide structure of the detector in an active region;
operation S6: preparing a coplanar electrode lead structure on the surface of the double-table prepared in the step S5;
operation S7: and preparing a waveguide structure in the passive region and the coupling region to finish the preparation of the coherent detector chip.
In the embodiment of the disclosure, a secondary epitaxy technology is adopted to complete monolithic integration of different epitaxy layer materials of the waveguide detector and the optical mixer, a high-selectivity dry etching technology is adopted to complete deep ridge vertical side wall morphology etching of the optical mixer and the coupling region single-mode waveguide, and the depth is not less than the sum of a lower cladding layer, a waveguide core layer and an upper cladding layer by 3.5 μm.
(III) advantageous effects
According to the technical scheme, the coherent detector chip and the preparation method thereof have at least one or part of the following beneficial effects:
(1) The low-loss mode conversion of the passive single-mode waveguide and the active multi-mode waveguide can be realized, the appearance influence of a complex preparation process on the butt joint boundary of two devices is avoided, and the electrical independence between array detectors is ensured;
(2) The optical field in the output waveguide of the optical mixer can be ensured to be injected into the active region in a single mode, and the sensitivity of the photoelectric conversion efficiency to the length of the coupling region is reduced; meanwhile, radiation loss of a large amount of optical power caused by the fact that the coupling region is exposed out of the waveguide core layer is avoided;
(3) The difference of the epitaxial structures of the active detector and the passive optical mixer is ensured to the greatest extent, including material components, thickness and doping concentration, so that the design flexibility of two devices is improved;
(4) The integrity and the material compactness of the epitaxial layer of the passive region optical mixer are ensured to the maximum extent; the method ensures that the structure has better structural morphology accuracy, and reduces the influence of the integrated device process on the performance of the mixer.
(5) Irregular shapes of materials at the boundary of the mask area caused by selective area epitaxial growth are avoided, and the pattern transfer precision of the whole chip process is improved;
(6) The monolithic integrated chip realizes direct demodulation and detection of optical signals, and reduces the deterioration of coupling loss between devices in the scheme of assembling discrete devices to the signal-to-noise ratio of a receiver module to the maximum extent.
Drawings
Fig. 1 is a schematic perspective view of a coherent detector chip according to an embodiment of the present disclosure;
FIG. 2 is a schematic cross-sectional view of a coherent detector chip taken along a central axis according to an embodiment of the present disclosure;
FIG. 3 is a schematic cross-sectional view of a post-secondary epitaxy device structure in accordance with an embodiment of the disclosure;
FIG. 4 is a schematic diagram of a top view structure of an integrated plurality of coherent detector chips according to an embodiment of the present disclosure;
fig. 5 is a schematic flow chart of a method for manufacturing a coherent detector chip according to an embodiment of the disclosure.
[ description of main reference numerals in the drawings ] of the embodiments of the present disclosure
11-substrate
12-passive region
13-active region
14-coupling region
11 a-first substrate region
11 b-second substrate region
11 c-third substrate region
121-lower cladding
121 a-first lower cladding layer
121 b-second lower cladding
121 c-third lower cladding
122-waveguide core layer
122 a-first waveguide core layer
122 b-second waveguide core layer
122 c-third waveguide core layer
123-upper cladding
131-lower contact layer
131 b-second lower contact layer
131 c-third lower contact layer
132-light absorbing layer
133-P type layer
134-upper contact layer
135-coplanar electrode lead
Detailed Description
The invention provides a coherent detector chip and a preparation method thereof, in particular to a monolithic coherent detector chip of a semiconductor optical mixer and a waveguide detector and a preparation method thereof, which realize the function integration of on-chip direct demodulation and optical detection of the coherent detector chip and solve the high-efficiency optical coupling problem and process compatibility of active and passive device structures.
The disclosure is directed to a key optical receiving chip in a coherent communication based optoelectronic module, the monolithic integrated chip including an optical mixer for demodulation and a waveguide probe for photoelectrically converting a demodulated signal. The detector epitaxial layer is grown on the waveguide core layer on the substrate by adopting a secondary epitaxial technology to realize the monolithic integration with the optical mixer structure, and the high-efficiency optical coupling and the process compatibility of the two devices are realized through the introduced coupling region.
To make the objects, technical solutions and advantages of the present disclosure more apparent, the present disclosure will be described in further detail below with reference to specific embodiments and the accompanying drawings.
In an embodiment of the present disclosure, a coherent detector chip is provided, which is shown in fig. 1 to 3, and includes:
the substrate 11 is used as a growth base of an epitaxial layer material of the integrated chip; the substrate comprises a first substrate area, a second substrate area and a third substrate area positioned between the first substrate area and the second substrate area;
and the passive region 12 is positioned on the first substrate region 11a and sequentially comprises the following components from bottom to top: a substrate 11, a first lower cladding layer 121a, a first waveguide core layer 122a, and an upper cladding layer 123; the passive region 12 is used to form an optical mixer and its output waveguide;
an active region 13 located on the second substrate region 11b and comprising, in order from bottom to top: the substrate 11 comprises a second lower cladding layer 121b, a second waveguide core layer 122b, a second lower contact layer 131b, a light absorption layer 132, a P-type layer 133 and an upper contact layer 134, wherein the active region 13 is used for forming a waveguide detector; and
a coupling region 14 located between the passive region 12 and the active region 13 on the third substrate region 11c, and sequentially including from bottom to top: a substrate 11, a third lower cladding layer 121c, a third waveguide core layer 122c and a third lower contact layer 131c, and the coupling region 14 is used for connecting the output waveguide of the optical mixer and the waveguide detector.
The first substrate region 11a, the second substrate region 11b and the third substrate region 11c jointly form a substrate 11; the first lower cladding layer 121a, the second lower cladding layer 121b, and the third lower cladding layer 121c together constitute a lower cladding layer 121; the first waveguide core layer 122a, the second waveguide core layer 122b, and the third waveguide core layer 122c together form the waveguide core layer 122; the second lower contact layer 131b and the third lower contact layer 131c together form the lower contact layer 131; as can be seen from fig. 1 to 3 in combination with the above description, the passive region 12, the active region 13, and the coupling region 14 respectively include a partially common epitaxial layer, wherein the passive region 12, the active region 13, and the coupling region 14 share the lower cladding layer 121 and the waveguide core layer 122; the active region 13 shares the lower contact layer 131 with the coupling region 14. The materials of the lower cladding layer 121 and the waveguide core layer 122 penetrate through the passive region 12, the active region 13 and the coupling region 14; the lower contact layer 13 material penetrates through the active region 13 and the coupling region 14; the shared epitaxial layer is uninterrupted, specific feature sizes are respectively defined in different regions, as shown in fig. 1, the third lower cladding layer 121c, the third waveguide core layer 122c and the third lower contact layer 131 in the coupling region 14 form a uniform strip shape; the first lower cladding layer 121a, the first waveguide core layer 122a, and the upper cladding layer 123 in the inactive region form a long stripe shape.
Each epitaxial layer of the coherent detector chip has the following material components and doping types: the semiconductor substrate 11: intrinsic or Fe-doped semi-insulating InP; the lower cladding layer 121: intrinsic or unintentionally doped InP; the waveguide core layer 122: intrinsic or unintentionally doped In 1-x Ga x As y P 1-y (ii) a The upper cladding layer 123: intrinsic or unintentionally doped InP; the lower contact layer 131: n-type doped In 1-x Ga x As y P 1-y And the composition coefficients x and y are the same as those of the waveguide core layer (122); the light absorbing layer 132: inGaAs that is intrinsically or unintentionally doped or lightly P-type or lightly N-type doped; the P-type layer 133: p-type doped In 1- x Ga x As y P 1-y (ii) a The upper contact layer 134: p-type doped In 1-x Ga x As y P 1-y 。
The forbidden band width of the material of the light absorption layer 132 in the coherent detector chip is smaller than the incident photon energy, and the forbidden band widths of the materials of the rest epitaxial layers except the light absorption layer 132 and the upper contact layer 134 are larger than the incident photon energy. The upper contact layer 134 is typically thin (no more than 100 nm) and is blocked from direct contact with the light absorbing layer 132 by the P-type layer 133 that does not absorb photon energy, so that a negligible small amount of photon energy is not absorbed or absorbed, which is not sufficient to affect the detector performance.
The optical mixer adopts a strong optical confinement type deep ridge waveguide structure based on a multi-mode interference principle. The widths of the first lower cladding layer 121a, the first waveguide core layer 122a and the upper cladding layer 123 of the strong optical confinement type deep ridge waveguide structure are consistent, a high equivalent refractive index difference is formed between the side wall of the optical mixer and the environment, and input and output waveguides of the strong optical confinement type deep ridge waveguide structure are single-mode waveguides in a target working wavelength range.
The waveguide detector adopts a double-mesa multimode waveguide structure, a narrow strip-shaped narrow mesa is uniformly formed by the light absorption layer 132, the P-type layer 133 and the upper contact layer 134, photoelectric conversion is carried out through the light absorption layer 132 to form an electron-hole pair, wherein electrons transit to the second lower contact layer 131b and are prevented from being diffused reversely by the P-type layer 133; the second lower contact layer 131b constitutes a wide mesa so that a metal contact is formed at a portion where the narrow mesa is widened. The holes transit to the upper contact layer 134 and are eventually collected by the contact metal on the upper contact layer 134. As shown in fig. 1, the narrow mesa is located on the wide mesa, metal contacts are disposed on two sides of the narrow mesa corresponding to the surface of the wide mesa, so that a single-side contact metal or a double-contact metal symmetrical with respect to the narrow mesa may be formed, and the metal contacts and the contact metal on the upper contact layer 134 extend together to form a coplanar electrode lead 135 structure, so as to collect photocurrent signals of different detectors at the same time for electrical processing.
The coupling region 14 adopts a single-mode waveguide structure with a deep ridge strongly limited side wall and a weakly limited extension direction, and the width of the single-mode waveguide structure is not less than the width of the output waveguide of the optical mixer and not more than the width of the narrow table-board of the detector. Specifically, the widths of the third lower clad layer 121c, the third waveguide core layer 122c, and the third lower contact layer 131c are uniform, and a lateral high refractive-index difference distribution is similarly formed. Since the material compositions of the third lower contact layer 131c and the third waveguide core layer 122c are the same, the difference between the refractive indices of the two layers is zero, and the confinement effect on the optical field is weak. At this time, only a refractive index difference exists between the third lower cladding layer 121c and the third waveguide core layer 122c, so that the optical field in the first waveguide core layer 122a of the optical mixer is shifted upward by the third lower contact layer 131c, so that the optical power is further coupled to the active in-region light absorbing layer 132.
The coupling region 14 is a single-mode waveguide structure with a combination of strong and weak optical confinement as described above, and has a length L. On the premise of ensuring enough process tolerance, selecting L more than 0 and less than or equal to 10 mu m; on one hand, the optical field can be ensured to still pass through the coupling region 14 in single-mode transmission and enter the active region 13; on the other hand, it is ensured that the optical field does not radiate to the outside through the third lower contact layer 131c at the coupling region 14 to cause power loss.
In the disclosed embodiment, as shown in fig. 4, a plurality of coherent detector chips as described above are integrated, and the optical mixer structure includes a plurality of (N, N > 1) single-mode input waveguides, a plurality of input tapered couplers, a rectangular multi-mode interference region having a width d, a plurality of output tapered couplers, and a plurality of single-mode input waveguides. The adjacent input and output waveguides are equally spaced, which is equal to the ratio of the width d of the multimode interference zone to the number N of output waveguides.
In an embodiment of the present disclosure, there is further provided a method for manufacturing the coherent detector chip, which is implemented by two times of epitaxial growth, and as shown in fig. 5, the method includes:
operation S1: epitaxially growing a lower cladding layer 121, a waveguide core layer 122, and an upper cladding layer 123 on a substrate 11;
the optical mixer epitaxial layer, including the lower cladding layer 121, the waveguide core layer 122 and the upper cladding layer 123, is directly grown on the substrate 11 by the first epitaxial process. In the preferred embodiment of the present disclosure, the passive waveguide layers 121, 122, 123 are grown on the Fe-doped or high purity intrinsic substrate 11 using a Metal Organic Chemical Vapor Deposition (MOCVD) process; all epitaxial layers are intrinsic materials, the upper and lower cladding layers 121 and 123 are each InP with the thickness of 1.5 mu m, and the waveguide core layer comprises Q1.05-InGaAsP with the thickness of 500 nm.
Operation S2: the corresponding upper cladding 123 in the active region 13 and the coupling region 14 is removed completely;
in order to realize the efficient coupling of the optical field from the waveguide core layer to the waveguide detector and realize different epitaxial layer structures in three regions of the coherent detector chip, all the upper cladding layers 123 in the active region 13 and the coupling region 14 need to be removed before the secondary epitaxial process is implemented. This step may be achieved by a wet etch or dry etch process. In the preferred embodiment of the present disclosure, the upper cladding layer 123 outside the inactive region 12 is removed by selective wet etching, and the etching stops at the surface of the waveguide core layer 122.
Operation S3: after operation S2, epitaxially growing a lower contact layer 131, a light absorption layer 132, a P-type layer 133, and an upper contact layer 134 for the second time;
the whole epitaxial layer structure of the waveguide detector comprises a lower contact layer 131, a light absorption layer 132, a P-type layer 133 and an upper contact layer 134, which are all realized by a secondary epitaxial process, and the growth starting range covers the whole range of the corresponding substrate, including all the passive region 12, the active region 13 and the coupling region 14. In the preferred embodiment of the present disclosure, MOCVD is adopted to perform maskless growth of the detector epitaxial layers 131, 132, 133, 134 on the surface of the sample wafer; wherein the lower contact layer is 400nm N-type doped Q1.05-InGaAsP with a doping concentration higher than 1 × 10 18 em -3 (ii) a The light absorbing layer is 500nm intrinsic or lightly doped In 0.53 Ga 0.47 As with a doping concentration of less than 5X 10 15 em -3 (ii) a The barrier layer is 300nm P-type doped Q1.05-InGaAsP with a doping concentration of not less than 5 × 10 17 cm -3 (ii) a The upper contact layer is 50nm P-type doped In 0.53 Ga 0.47 As with a doping concentration of not less than 1X 10 18 em -3 。
Operation S4: removing the upper contact layer 134, the barrier layer 133, and the light absorbing layer 132 in the coupling region 14, and removing the upper contact layer 134, the barrier layer 133, the light absorbing layer 132, and the lower contact layer 131 in the inactive region 12;
after the secondary epitaxial process is performed, removing the upper contact layer 134, the barrier layer 133 and the light absorption layer 132 in the coupling region 14 by a plurality of wet etching or dry etching processes, and removing all the upper contact layer 134, the barrier layer 133, the light absorption layer 132 and the lower contact layer 131 in the inactive region 12, so that only the lower cladding layer 121, the waveguide core layer 122 and the upper cladding layer 123 of the inactive region 12 are remained; only the lower cladding layer 121, the waveguide core layer 122 and the lower contact layer 131 remain in the coupling region 14.
In a preferred embodiment of the present disclosure, an Inductively Coupled Plasma (ICP) etching technique is employed.
Operation S5: preparing a double-mesa multimode waveguide structure of the detector in the active region 12;
the two table-boards of the waveguide detector in the active area are realized through wet etching or dry etching technology. This process can be performed simultaneously or alternately when performing operation S4, i.e. defining a narrow mesa of the detector in the active area while removing the coupling area 14 and the relevant detector epitaxial layers (upper contact layer 134, P-type layer 133, light absorbing layer 132) inside the inactive area 12, removing all epitaxial layers (upper contact layer 134, P-type layer 133, light absorbing layer 132) outside the narrow mesa pattern; when the relevant detector epitaxial layer 131 in the inactive region 12 is removed, the wide mesa of the detector in the active region 12 may be defined at the same time, the third lower contact layer 131c in the coupling region 14 is remained, and the wide mesa pattern and all the epitaxial layers of the lower contact layer 131 except the third lower contact layer are removed completely. The process of this step may be performed separately after the three regions of epitaxial layer materials are completely defined, i.e., the epitaxial layers outside the narrow mesa pattern of the detector (the upper contact layer 134, the P-type layer 133, the light absorbing layer 132) and the epitaxial layer of the lower contact layer 131 outside the wide mesa pattern in the active region 12 are sequentially removed.
Operation S6: preparing a coplanar electrode lead structure 135 on the surface of the double-table prepared in the step S5;
firstly, insulating medium film growth is carried out on all areas, films at metal contact positions on the surfaces of two table tops of the detector are removed, and film materials in other areas are reserved to be used as passivation layers of the detector. P-type contact metal and N-type contact metal are respectively grown by adopting a sputtering method, and a coplanar electrode lead structure is formed by adopting a stripping technology. And then rapidly thermally annealed to form a low-resistance ohmic contact on the surfaces of the upper contact layer 134 and the second lower contact layer 131 b. The metal coplanar electrode lead structures formed by stripping respectively extend from the metal contact positions of the two mesas to the wide mesas with the passivation layer films reserved on the surfaces, and the leads of the P-type contact metal are not connected with the leads of the N-type contact metal.
Operation S7: preparing a waveguide structure in the passive region and the coupling region;
etching the dielectric films in the passive waveguide region 12 and the coupling region 14 by adopting ICP or RIE technology to form mask patterns of the optical mixer and the coupling waveguide; at this time, the coupling region waveguide is aligned with the narrow mesa of the waveguide detector (i.e. the longitudinal symmetric central lines of the two coincide), so that the light path is transmitted in a straight line direction. The monolithic integration of different epitaxial layer materials of the waveguide detector and the optical mixer is completed by adopting a secondary epitaxial technology, the deep ridge vertical side wall appearance etching of the optical mixer and the waveguide in the coupling region is completed by adopting a high-selectivity dry etching technology, and the depth is not less than 3.5 mu m of the sum of the lower cladding 121, the waveguide core layer 122 and the upper cladding 123 of the waveguide epitaxial layer.
In the preparation process of all the coherent detector chips, silicon oxide, silicon nitride or organic polymer films can be used as dielectric film materials and used as detector passivation layer materials, high-precision pattern transfer masks and epitaxial layer protection materials. And (3) adopting a Plasma Enhanced Chemical Vapor Deposition (PECVD) technology to grow materials with the thickness of not less than 700nm, and completely covering all areas.
And finally, performing device cleavage and antireflection film growth on the input waveguide end face of the optical mixer to complete the preparation of the coherent detector chip.
So far, the embodiments of the present disclosure have been described in detail with reference to the accompanying drawings. It is to be noted that, in the attached drawings or in the description, the implementation modes not shown or described are all the modes known by the ordinary skilled person in the field of technology, and are not described in detail. Further, the above definitions of the various elements and methods are not limited to the various specific structures, shapes or arrangements of parts mentioned in the examples, which may be easily modified or substituted by those of ordinary skill in the art.
From the above description, those skilled in the art should clearly recognize that the coherent detector chip and the manufacturing method thereof are disclosed.
In summary, the present disclosure provides a coherent detector chip and a method for manufacturing the same, which implement low-loss mode conversion between a passive single-mode waveguide and an active multi-mode waveguide by introducing a coupling region structure, and simultaneously avoid the appearance influence of a complex manufacturing process on the butt-joint boundary of two devices, thereby ensuring the electrical independence between array detectors. The coupling area adopts a single-mode waveguide structure combining strong and weak optical limitations, so that the optical field in the output waveguide of the optical mixer is ensured to be injected into the active area in a single-mode, and the sensitivity of the photoelectric conversion efficiency to the length of the coupling area is reduced; and simultaneously, the radiation loss of a large amount of optical power caused by the fact that the coupling region exposes the waveguide core layer (122) is avoided. By adopting a secondary epitaxial growth method, the difference of the epitaxial structures of the active detector and the passive optical mixer is ensured to the greatest extent, including material components, thickness and doping concentration, and the design flexibility of two devices is improved. The integrity and the material compactness of the epitaxial layer of the passive region optical mixer are ensured to the maximum extent by a method of extending the detector layer structure for the second time. Since the optical mixer occupies a major area of the integrated chip (typically 70% and above), its sidewall quality seriously affects the insertion loss, and the phase relationship is very sensitive to the pattern accuracy, the method can avoid the impact of the integrated chip process on the performance of the optical mixer to the maximum extent. The maskless secondary epitaxy method avoids the irregular shape of the material at the boundary of the mask region caused by selective area epitaxy growth, and improves the pattern transfer precision of the whole process of the chip. The monolithic integrated chip realizes the direct demodulation and detection of optical signals, and reduces the deterioration of coupling loss between devices in the scheme of assembling discrete devices to the signal-to-noise ratio of a receiver module to the maximum extent.
It should also be noted that the directional terms mentioned in the embodiments, such as "upper", "lower", "front", "back", "left", "right", etc., are only directions referring to the drawings, and are not intended to limit the protection scope of the present disclosure. Throughout the drawings, like elements are represented by like or similar reference numerals. Conventional structures or constructions will be omitted when they may obscure the understanding of the present disclosure.
And the shapes and sizes of the respective components in the drawings do not reflect actual sizes and proportions, but merely illustrate the contents of the embodiments of the present disclosure. Furthermore, in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim.
Furthermore, the word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements.
The use of ordinal numbers such as "first," "second," "third," etc., in the specification and claims to modify a corresponding element does not by itself connote any ordinal number of the element or any ordering of one element from another or the order of manufacture, and the use of the ordinal numbers is only used to distinguish one element having a certain name from another element having a same name.
In addition, unless steps are specifically described or must occur in sequence, the order of the steps is not limited to that listed above and may be changed or rearranged as desired by the desired design. The embodiments described above may be mixed and matched with each other or with other embodiments based on design and reliability considerations, i.e., technical features in different embodiments may be freely combined to form further embodiments.
Those skilled in the art will appreciate that the modules in the devices in an embodiment may be adaptively changed and arranged in one or more devices different from the embodiment. The modules or units or components of the embodiments may be combined into one module or unit or component, and furthermore they may be divided into a plurality of sub-modules or sub-units or sub-components. All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or elements of any method or apparatus so disclosed, may be combined in any combination, except combinations where at least some of such features and/or processes or elements are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Also in the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware.
The above-mentioned embodiments, objects, technical solutions and advantages of the present disclosure are further described in detail, it should be understood that the above-mentioned embodiments are only examples of the present disclosure, and should not be construed as limiting the present disclosure, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.
Claims (8)
1. A coherent detector chip comprising:
the substrate is a chip base and comprises a first substrate area, a second substrate area and a third substrate area positioned between the first substrate area and the second substrate area;
and the passive region is positioned on the first substrate region and sequentially comprises the following components from bottom to top: a first lower cladding layer, a first waveguide core layer, and an upper cladding layer; the passive region is used to form an optical mixer and its output waveguides;
the active area is located on the second substrate district, includes from bottom to top in proper order: the waveguide detector comprises a second lower cladding layer, a second waveguide core layer, a second lower contact layer, a light absorption layer, a P-type layer and an upper contact layer, wherein the active region is used for forming a waveguide detector; and
a coupling region located between the inactive region and the active region above the third substrate region, comprising in sequence from bottom to top: a third lower cladding layer, a third waveguide core layer, and a third lower contact layer, the coupling region for coupling an output waveguide of the optical mixer and the waveguide probe;
the waveguide detector adopts a double-mesa multimode waveguide structure, and a light absorption layer, a P-type layer and an upper contact layer of the waveguide detector uniformly form a narrow strip-shaped narrow mesa; the second lower contact layer forms a wide table top, the narrow table top is positioned on the wide table top, and metal contacts are arranged on the surface of the narrow table top and the surfaces of the two sides of the narrow table top, which correspond to the wide table top;
the coupling region adopts a single-mode waveguide structure with a deep ridge strongly limited side wall and a weakly limited epitaxial direction, and the width of the single-mode waveguide structure is not less than the width of the output waveguide of the optical mixer and not more than the width of the narrow table top.
2. The coherent detector chip of claim 1, said first, second, and third lower cladding layers collectively comprising a lower cladding layer; the first waveguide core layer, the second waveguide core layer and the third waveguide core layer jointly form a waveguide core layer; making the passive, active and coupling regions share a lower cladding and waveguide core; the second lower contact layer and the third lower contact layer jointly form a lower contact layer, so that the active region and the coupling region share the lower contact layer.
3. The coherent detector chip of claim 1, wherein the material forbidden band width of the light absorption layer is smaller than the incident photon energy, and the material forbidden band widths of the epitaxial layers of the coherent detector chip except the light absorption layer and the upper contact layer are larger than the incident photon energy.
4. The coherent detector chip of claim 1, wherein said optical mixer uses a deep ridge waveguide structure with strong optical confinement, and wherein the widths of the first lower cladding layer, the first waveguide core layer, and the upper cladding layer are uniform, so as to form a high equivalent refractive index difference between the sidewalls of the optical mixer and the environment, and the input and output waveguides are single mode waveguides in the target operating wavelength range.
5. The coherent detector chip of claim 1, said coupling region having a length L,0 μm < L ≦ 10 μm.
6. The coherent detector chip of any of claims 1 to 5, said substrate being intrinsic or Fe-doped semi-insulating InP; the lower cladding is intrinsic or unintentionally doped InP; the waveguide core layer is intrinsic or unintentionally doped In 1- x Ga x As y P 1-y (ii) a The upper cladding layer is intrinsic or unintentionally doped InP; the lower contact layer is N-type doped In 1- x Ga x As y P 1-y And the component coefficients x and y are the same as those of the waveguide core layer; the light absorption layer is InGaAs which is doped intrinsically or unintentionally or is doped lightly P type or N type; the P type layer is P type doped In 1-x Ga x As y P 1-y (ii) a The upper contact layer is P-type doped In 1-x Ga x As y P 1-y 。
7. A method for manufacturing a coherent detector chip according to any one of claims 1 to 6, the method comprising:
operation S1: epitaxially growing a lower cladding layer, a waveguide core layer and an upper cladding layer on a substrate;
operation S2: removing all the corresponding upper cladding layers in the active region and the coupling region;
operation S3: after the operation S2, a lower contact layer, a light absorption layer, a P-type layer and an upper contact layer are epitaxially grown for the second time;
operation S4: removing the upper contact layer, the P-type layer and the light absorption layer in the coupling region, and removing the upper contact layer, the P-type layer, the light absorption layer and the lower contact layer in the inactive region;
operation S5: preparing a double-mesa multimode waveguide structure of the detector in an active region;
operation S6: preparing a coplanar electrode lead structure on the surface of the double-table prepared in the step S5;
operation S7: and preparing a waveguide structure in the passive region and the coupling region to complete the preparation of the coherent detector chip.
8. The method for manufacturing a coherent detector chip according to claim 7, wherein a secondary epitaxy technique is used to complete monolithic integration of different epitaxial layers of the waveguide detector and the optical mixer, and a high-selectivity dry etching technique is used to complete deep ridge vertical sidewall profile etching of the optical mixer and the coupling region single-mode waveguide, wherein the depth is not less than the sum of the lower cladding, the waveguide core layer and the upper cladding.
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