CN113594231A - Homoepitaxy GaN HEMT based on polarization doped AlGaN leakage isolation layer and manufacturing method thereof - Google Patents
Homoepitaxy GaN HEMT based on polarization doped AlGaN leakage isolation layer and manufacturing method thereof Download PDFInfo
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- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 48
- 238000002955 isolation Methods 0.000 title claims abstract description 40
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 24
- 238000001657 homoepitaxy Methods 0.000 title claims abstract description 13
- 230000010287 polarization Effects 0.000 title claims abstract description 12
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 91
- 230000004888 barrier function Effects 0.000 claims abstract description 43
- 239000000758 substrate Substances 0.000 claims abstract description 42
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 35
- 239000000463 material Substances 0.000 claims abstract description 30
- 230000003071 parasitic effect Effects 0.000 claims abstract description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 79
- 238000000034 method Methods 0.000 claims description 77
- 230000008569 process Effects 0.000 claims description 45
- 229910052757 nitrogen Inorganic materials 0.000 claims description 39
- 238000001451 molecular beam epitaxy Methods 0.000 claims description 32
- 238000000151 deposition Methods 0.000 claims description 27
- 229910052751 metal Inorganic materials 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 17
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 14
- 229910052733 gallium Inorganic materials 0.000 claims description 14
- 229910052782 aluminium Inorganic materials 0.000 claims description 12
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 12
- 238000005566 electron beam evaporation Methods 0.000 claims description 12
- 238000001259 photo etching Methods 0.000 claims description 9
- 239000012535 impurity Substances 0.000 claims description 8
- 238000003780 insertion Methods 0.000 claims description 8
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- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 7
- 229910052593 corundum Inorganic materials 0.000 claims description 7
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 7
- 238000000231 atomic layer deposition Methods 0.000 claims description 5
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 5
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- 229910052738 indium Inorganic materials 0.000 claims description 4
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Abstract
The invention discloses a homoepitaxy GaN HEMT based on a polarization doped AlGaN leakage isolation layer and a manufacturing method thereof. The GaN-based leakage current isolation layer comprises a substrate, a channel layer, an AlN insert layer and a barrier layer from bottom to top, wherein a GaN buffer layer and a polarized doped AlGaN leakage isolation layer are arranged between the substrate and the channel layer, Al components of the leakage isolation layer are changed from 100% to 0% from bottom to top along the growth direction according to the gradient that the thickness is increased by 5nm-6nm and the components are reduced by 1% -5%, an insulated gate medium layer and a gate electrode are sequentially arranged on the upper portion of the barrier layer, ohmic contact regions are respectively arranged on two sides of the barrier layer, and a source electrode and a drain electrode are respectively arranged on the ohmic contact regions. The invention can effectively reduce the dislocation density of the heteroepitaxial gallium nitride material, isolate the parasitic electric leakage of the homoepitaxial interface of the gallium nitride material, improve the breakdown voltage, the output power and the reliability of the device, and can be used for microwave power amplifiers and radio frequency integrated circuit chips.
Description
Technical Field
The invention belongs to the technical field of semiconductor devices, and particularly relates to a high electron mobility transistor which can be used for manufacturing a solid-state microwave power amplifier and a radio frequency integrated circuit chip.
Background
The nitride semiconductor material has the advantages of wide forbidden band, high critical breakdown field strength, high electron saturation drift velocity and the like, and the high electron mobility transistor developed based on the nitride semiconductor material has obvious advantages in the application fields of high frequency, high power, high efficiency, high temperature resistance and the like, and is a main device for preparing the solid-state microwave power amplifier. With continuous and deep research and innovation in the aspects of material epitaxy technology, device structure design, chip manufacturing process and new material application, the performance and reliability of the GaN HEMT device are greatly improved, the GaN HEMT device gradually develops towards a radio frequency integrated circuit chip and heterogeneous integration, and the GaN HEMT device is widely applied to electronic equipment such as 5G communication, radar detection, satellite navigation and the like. Meanwhile, power devices based on nitride semiconductor materials are also commercially applied in the fields of new energy automobiles, fast charging consumer electronics and the like.
The current GaN HEMT device is mainly obtained by heteroepitaxy on substrate materials such as SiC, sapphire, Si and the like, mainly because the heteroepitaxy technology and the device process are relatively mature, and the gallium nitride single crystal substrate material has small size and high price. With the progress of the self-supporting gallium nitride substrate preparation technology, the cost is reduced, the support is provided for the homoepitaxial preparation of the GaN HEMT device, and the homoepitaxial GaN HEMT device based on the self-supporting gallium nitride substrate is one of the future development directions. The conventional GaN HEMT device structure, as shown in fig. 1, includes, from bottom to top, a substrate, a nucleation layer, a buffer layer, a channel layer, an insertion layer, and a barrier layer on which a gate electrode, a source electrode, and a drain electrode are provided. This device has the following disadvantages:
firstly, the hetero-epitaxial gallium nitride material needs to adopt a nucleation layer structure, the crystal quality and the transport characteristic of the gallium nitride hetero-structure material on the hetero-epitaxial gallium nitride material are directly determined by parameters such as the growth process, the structure, the thickness and the like of the structure, the process control difficulty is large, and the repeatability and the consistency are poor.
And secondly, the hetero-epitaxial gallium nitride material has high-density dislocation defects, and the defects cause that a device can form a leakage channel under the condition of long-time high-voltage bias work, so that the breakdown voltage of the device is reduced, and electrons can be captured at the same time, so that the current collapse and the reliability degradation of the device are caused.
Thirdly, the homoepitaxy gallium nitride material has high-concentration n-type Si impurities at the interface of the self-supporting gallium nitride substrate and the gallium nitride epitaxy material, the impurities can be introduced into a parasitic body leakage channel and are difficult to completely remove, and the breakdown voltage and the output power density of the device are seriously deteriorated.
And fourthly, when the metal organic chemical vapor deposition technology is adopted to homoepitaxially grow the gallium nitride material, iron doping or carbon doping is needed to compensate high-concentration Si impurities at a homoepitaxial interface, so that the difficulty of the material growth process and parasitic pollution are increased, and the working frequency of the device can be reduced and the power loss can be increased by doping elements such as iron, carbon and the like.
Fifthly, the ohmic contact resistance of a source electrode and a drain electrode directly manufactured on the surface of the homoepitaxy gallium nitride heterostructure barrier layer is high, and the output characteristics of current, power and the like of the device are influenced.
Disclosure of Invention
The invention aims to provide a homoepitaxy GaN HEMT based on a polarization-doped AlGaN leakage isolation layer and a manufacturing method thereof aiming at the defects of the prior art, so as to effectively reduce the dislocation density of a heteroepitaxy gallium nitride material, isolate the parasitic leakage of a homoepitaxy interface of the homoepitaxy gallium nitride material, reduce the control difficulty of a material epitaxy growth process and improve the breakdown voltage and the output power of a device.
The technical scheme of the invention is realized as follows:
1. a homoepitaxy GaN HEMT based on a polarization doped AlGaN leakage isolation layer and a manufacturing method thereof comprise a substrate, a channel layer, an AlN insert layer and a barrier layer from bottom to top, and are characterized in that:
the substrate is made of a self-supporting gallium nitride substrate or a thick-film gallium nitride substrate material, and a polarization doped AlGaN leakage isolation layer and a GaN buffer layer are arranged between the substrate and the channel layer and used for isolating and shielding a parasitic leakage channel caused by Si impurities adsorbed on the surface of the substrate;
the upper part of the barrier layer is sequentially provided with an insulated gate dielectric layer and a gate electrode, the two sides of the barrier layer are ohmic contact regions, and a source electrode and a drain electrode are respectively arranged on the ohmic contact regions;
the Al component of the polarized doped AlGaN leakage isolation layer is changed from 100% to 0% along the growth direction from bottom to top according to the gradient that the thickness is increased by 5nm to 6nm and the component is reduced by 1 percent to 5 percent, and the thickness is 100nm to 500 nm.
Further, the thickness of the GaN buffer layer is 500nm-1000 nm; the channel layer is made of GaN or InGaN, and the thickness of the channel layer is 10nm-50 nm; the AlN insert layer is 1nm-2nm thick;
further, the barrier layer is made of any one of AlGaN, InAlN and ScAlN, and the thickness of the barrier layer is 5nm-30 nm; the insulated gate dielectric layer adopts Al2O3Or HfO2And the dielectric layer is 5nm-20nm thick.
2. A method for manufacturing a homoepitaxy GaN HEMT based on a polarization doped AlGaN leakage isolation layer is characterized by comprising the following steps:
1) on a substrate, growing an Al component on a substrate by a molecular beam epitaxy method from bottom to top along a growth direction, and changing from 100% to 0% according to a gradient that the component is reduced by 1% -5% when the thickness is increased by 5nm-6nm, wherein the thickness of a polarized doped AlGaN leakage isolation layer (2) is 100nm-500 nm;
2) growing a GaN buffer layer with the thickness of 500nm-1000nm on the polarized doped AlGaN leakage isolation layer by using a molecular beam epitaxy method;
3) growing a channel layer with the thickness of 10nm-50nm on the GaN buffer layer by using a molecular beam epitaxy method;
4) growing an AlN insert layer with the thickness of 1nm-2nm on the channel layer by using a molecular beam epitaxy method;
5) growing a barrier layer with the thickness of 5nm-30nm on the AlN insert layer by using a molecular beam epitaxy method;
6) selecting ohmic contact areas of a source electrode and a drain electrode on two sides of the barrier layer by adopting a photoetching process, and injecting the concentration of (1-5) multiplied by 10 into the ohmic contact areas19cm-3N-type Si ion of (1); depositing ohmic contact metal Ti/Al/Ni/Au on ohmic contact areas of the source electrode and the drain electrode by adopting an electron beam evaporation process, and annealing at 830 ℃ in a nitrogen atmosphere to form the source electrode and the drain electrode;
7) growing an insulated gate dielectric layer above the barrier layer by adopting an atomic layer deposition process;
8) and selecting a gate electrode pattern on the surface of the insulated gate dielectric layer by adopting a photoetching process, and depositing a Ni/Au metal combination on the insulated gate dielectric layer by adopting an electron beam evaporation process to form a gate electrode so as to finish the manufacture of the device.
Compared with the prior art, the invention has the following advantages:
1. the invention adopts the self-supporting gallium nitride substrate or the thick film gallium nitride substrate material, can carry out homoepitaxy on the GaN HEMT device, effectively reduces the dislocation density of the gallium nitride material and the leakage current caused by the dislocation density, and improves the breakdown voltage, the working reliability and the output power density of the device.
2. Because the polarized doped AlGaN leakage isolation layer is adopted, Si impurities at the homoepitaxial interface can be effectively prevented from diffusing to the device channel layer, and the breakdown voltage of the device is improved; microscopically, two-dimensional hole gas can be generated at interfaces of adjacent different Al component layers in the polarization-doped AlGaN leakage isolation layer due to a polarization effect, three-dimensional hole gas is formed in the whole polarization-doped AlGaN leakage isolation layer macroscopically, the polarization-doped AlGaN leakage isolation layer capable of generating the three-dimensional hole gas and a GaN layer adsorbing n-type Si impurities on a homoepitaxial interface form a pn junction, a back barrier is formed by improving an energy band, a parasitic leakage channel caused by the Si impurities at the homoepitaxial interface is effectively isolated, and meanwhile, the pn junction can bear a certain voltage drop and is beneficial to improving the breakdown voltage of a device.
3. The invention can reduce the leakage current of the grid and improve the working efficiency of the device because the insulated grid dielectric layer is additionally arranged.
4. The preparation of the device adopts n-type Si ion implantation in the source-drain ohmic contact area, so that the ohmic contact resistance of the homoepitaxial GaN HEMT device can be effectively reduced, and the output performance and the power density of the device are improved.
5. The molecular beam epitaxy method is adopted for the epitaxy of the device material to grow the polarization doped AlGaN leakage isolation layer, so that the accurate control of Al component step change can be realized, and the molecular beam epitaxy technology is adopted in the whole growth process, so that the growth of a barrier layer structure with ultrathin thickness and strong polarization characteristics is facilitated, the control difficulty is reduced, the process repeatability and consistency are increased, and the working reliability of the device is improved.
Drawings
Fig. 1 is a structural view of a conventional GaN HEMT device;
FIG. 2 is a block diagram of a homoepitaxial GaN HEMT device of the present invention;
fig. 3 is a schematic flow chart of the present invention for fabricating the device of fig. 2.
Detailed Description
Referring to fig. 2, the homoepitaxial GaN HEMT based on the polarization-doped AlGaN leakage isolation layer of the present invention includes a substrate 1, a polarization-doped AlGaN leakage isolation layer 2, a GaN buffer layer 3, a channel layer 4, an AlN insertion layer 5, a barrier layer 6, an insulated gate dielectric layer 7, a source electrode 8, a drain electrode 9, and a gate electrode 10.
Wherein:
the substrate 1 is made of a self-supporting gallium nitride substrate or a thick film gallium nitride substrate material;
the polarized doped AlGaN leakage isolation layer 2 is positioned above the substrate 1, the Al component of the polarized doped AlGaN leakage isolation layer is changed from 100% to 0% along the growth direction from bottom to top according to the gradient that the thickness is increased by 5nm to 6nm and the component is reduced by 1% -5%, and the thickness is 100nm to 500 nm;
the GaN buffer layer 3 is positioned above the polarized doped AlGaN leakage isolation layer 2, and the thickness of the GaN buffer layer is 500nm-1000 nm;
the channel layer 4 is positioned above the GaN buffer layer 3, and is made of GaN or InGaN with the thickness of 10nm-50 nm;
the AlN insert layer 5 is positioned above the channel layer 4, and the thickness of the AlN insert layer is 1nm-2 nm;
the barrier layer 6 is positioned above the AlN insert layer 5, and is made of any one of AlGaN, InAlN and ScAlN, and the thickness of the barrier layer is 5nm-30 nm; the two sides of the barrier layer 6 are ohmic contact regions of a source electrode and a drain electrode, and the source electrode 8 and the drain electrode 9 are respectively arranged on the two ohmic contact regions;
the insulated gate dielectric layer 7 is positioned above the barrier layer 6 and is made of Al2O3Or HfO2The thickness is 5nm-20 nm;
the gate electrode 10 is located above the insulated gate dielectric layer 7.
Referring to fig. 3, the homoepitaxial GaN HEMT based on the polarization-doped AlGaN leakage isolation layer and the method for manufacturing the same according to the present invention, three embodiments are given as follows.
In the first embodiment, a homoepitaxial GaN high electron mobility transistor is manufactured, in which a substrate is a self-supporting GaN substrate, the thickness of a polarization-doped AlGaN leakage isolation layer is 100nm, and the Al component is reduced by 5% from 100% along the growth direction from bottom to top according to the thickness increasing by 5nm, and the thickness of a GaN channel layer is 20nm and the thickness of an AlGaN barrier layer is 30 nm.
Step one, a polarization doped AlGaN leakage isolation layer is deposited, as shown in FIG. 3 (a).
Selecting a self-supporting gallium nitride substrate, placing the substrate in a growth chamber, and depositing a polarized doped AlGaN leakage isolation layer with the thickness of 100nm and the gradient step change that Al components are reduced by 5% from 100% to 5nm along the growth direction from bottom to top by using a molecular beam epitaxy technology.
The process conditions for depositing the polarized doped AlGaN leakage isolation layer are as follows: the temperature is 720 ℃, and the equilibrium vapor pressure of the aluminum beam is 2.8 multiplied by 10-7The equilibrium vapor pressure of Torr and gallium beam is 7.5X 10-7Torr, nitrogen gas flow rate was 2.3sccm, and nitrogen plasma RF source power was 375W.
Step two, a GaN buffer layer is deposited, as shown in fig. 3 (b).
And depositing a GaN buffer layer with the thickness of 1000nm on the polarized doped AlGaN leakage isolation layer by using a molecular beam epitaxy technology.
The technological conditions for depositing the GaN buffer layer are as follows: the temperature is 720 ℃, the equilibrium vapor pressure of the gallium beam is 7.5 multiplied by 10- 7The nitrogen flow rate was 2.3sccm and the nitrogen plasma RF source power was 375W.
Step three, depositing a GaN channel layer, as shown in FIG. 3 (c).
A GaN channel layer with a thickness of 20nm was deposited on the GaN buffer layer using molecular beam epitaxy technique.
The process conditions for depositing the GaN channel layer are as follows: the temperature is 720 ℃, the equilibrium vapor pressure of the gallium beam is 7.5 multiplied by 10- 7The nitrogen flow rate was 2.3sccm and the nitrogen plasma RF source power was 375W.
Step four, an AlN insertion layer is deposited, as shown in fig. 3 (d).
An AlN insertion layer with a thickness of 1nm was deposited on the GaN channel layer using molecular beam epitaxy.
The process conditions for depositing the AlN insert layer are as follows: the temperature is 720 ℃, the equilibrium vapor pressure of the aluminum beam is 2.8 multiplied by 10- 7The nitrogen flow rate was 2.3sccm and the nitrogen plasma RF source power was 375W.
Step five, depositing an AlGaN barrier layer, as shown in FIG. 3 (e).
Deposition of 30nm thick Al on AlN insertion layer using molecular beam epitaxy technique0.25Ga0.75An N barrier layer.
Deposition of Al0.25Ga0.75The process conditions adopted by the N barrier layer are as follows: the temperature is 720 ℃, and the equilibrium vapor pressure of the aluminum beam is 2.8 multiplied by 10-7The equilibrium vapor pressure of Torr and gallium beam is 7.5X 10-7Torr, nitrogen gasThe flow rate is 2.3sccm, and the nitrogen plasma RF source power is 375W.
And step six, manufacturing a source electrode and a drain electrode, as shown in fig. 3 (f).
Selecting ohmic contact areas of a source electrode and a drain electrode on the surface of the AlGaN barrier layer by adopting a photoetching process, and injecting the ohmic contact areas with the concentration of 3 multiplied by 1019cm-3N-type Si ion of (1); and depositing a Ti/Al/Ni/Au metal combination with the thickness of 0.02 mu m/0.05 mu m/0.04 mu m on the ohmic contact area of the source electrode and the drain electrode by adopting an electron beam evaporation process, and performing rapid thermal annealing for 30s in a nitrogen atmosphere at the temperature of 830 ℃ to form the source electrode and the drain electrode.
The electron beam evaporation adopts the following process conditions: vacuum degree less than 1.2X 10-3Pa, power 400W, evaporation rate
Step seven, depositing Al with the thickness of 10nm on the AlGaN barrier layer by using an atomic layer deposition process2O3And (e) an insulated gate dielectric layer, as shown in fig. 3 (g).
And step eight, manufacturing a gate electrode, as shown in fig. 3 (h).
By adopting a photoetching process on Al2O3Selecting a grid electrode pattern on the insulated gate dielectric layer, and performing electron beam evaporation process on Al2O3And depositing metal on the insulated gate dielectric layer to manufacture a gate, wherein the deposited metal is a Ni/Au metal combination, and the thickness of the metal is 0.02 mu m/0.3 mu m.
The electron beam evaporation adopts the following process conditions: vacuum degree less than 1.2X 10-3Pa, power 400W, evaporation rate
And finishing the manufacture of the device.
In the second embodiment, a substrate is made of a thick-film gallium nitride substrate material, the thickness of the polarization-doped AlGaN leakage isolation layer is 300nm, the Al component is reduced by 2% from 100% to 6nm along the growth direction from bottom to top, and the homoepitaxial gallium nitride high-electron-mobility transistor is provided with an InGaN channel layer with the thickness of 10nm and an InAlN barrier layer with the thickness of 12 nm.
Step 1, depositing a polarized doped AlGaN leakage isolation layer on a thick film gallium nitride substrate material, as shown in FIG. 3 (a).
Selecting thick film gallium nitride substrate material, placing it in growth chamber, using molecular beam epitaxy technique, at 710 deg.C and aluminum beam equilibrium vapor pressure of 2.3 × 10-7The equilibrium vapor pressure of Torr and gallium beam is 8.0 × 10-7And under the process conditions of Torr, nitrogen flow of 2.3sccm and nitrogen plasma radio frequency source power of 375W, a polarization-doped AlGaN leakage isolation layer with the thickness of 300nm and the gradient step change that Al components are reduced by 2% from 100% along the growth direction from each 6nm component increase along the growth direction is deposited on the thick film gallium nitride substrate material.
And 2, depositing a GaN buffer layer on the polarized doped AlGaN leakage isolation layer, as shown in a figure 3 (b).
Using molecular beam epitaxy technique, at 710 deg.C, the equilibrium vapor pressure of gallium beam is 8.0 × 10-7And (3) depositing a GaN buffer layer with the thickness of 800nm on the polarized doped AlGaN leakage isolation layer under the process conditions that the nitrogen flow is 2.3sccm and the nitrogen plasma radio frequency source power is 375W.
Step 3, depositing In on the GaN buffer layer0.05Ga0.95N channel layer, as shown in fig. 3 (c).
Using molecular beam epitaxy technique, at 600 deg.C, the equilibrium vapor pressure of indium beam is 1.6 × 10-7Torr, the equilibrium vapor pressure of gallium beam is 8.0X 10-7Torr, nitrogen flow rate of 2.3sccm, and nitrogen plasma RF source power of 375W to deposit In with a thickness of 10nm on the GaN buffer layer0.05Ga0.95And an N channel layer.
Step 4, In0.05Ga0.95An AlN insertion layer is deposited on the N-channel layer, as shown in fig. 3 (d).
Using molecular beam epitaxy technique, at 600 deg.C, the equilibrium vapor pressure of aluminum beam is 2.3 × 10-7Torr, nitrogen flow rate of 2.3sccm, and nitrogen plasma RF source power of 375W under In process conditions0.05Ga0.95N ditchAn AlN insertion layer was deposited on the channel layer to a thickness of 1.5 nm.
Step 5, depositing In on the AlN insert layer0.17Al0.83And (e) an N barrier layer, as shown in FIG. 3 (e).
Using molecular beam epitaxy technique, at 600 deg.C, the equilibrium vapor pressure of indium beam is 1.6 × 10-7Torr, the equilibrium vapor pressure of aluminum beam is 2.3X 10-7Depositing 12nm thick In on AlN insert layer under the process conditions of 2.3sccm nitrogen flow and 375W nitrogen plasma radio frequency source power0.17Al0.83An N barrier layer.
Step 6, making source and drain electrodes, as shown in FIG. 3(f)
In by adopting a photoetching process0.17Al0.83Selecting ohmic contact region of source electrode and drain electrode on the surface of N barrier layer, and injecting 5 × 10 concentration solution into the ohmic contact region19cm-3N-type Si ion of (1); then adopting electron beam evaporation process, and making vacuum degree be less than 1.2X 10-3Pa, power 600W, evaporation rate
The metal combination of Ti/Al/Ni/Au was deposited to a thickness of 0.05/0.12/0.08 μm on the ohmic contact regions of the source and drain electrodes, and subjected to rapid thermal annealing at a temperature of 830 ℃ for 30 seconds in a nitrogen atmosphere to form the source and drain electrodes.
Step 7, depositing HfO with the thickness of 20nm on the InAlN barrier layer by using an atomic layer deposition process2And (e) an insulated gate dielectric layer, as shown in fig. 3 (g).
Using a photolithography process on HfO2Selecting a grid electrode pattern on the insulated gate dielectric layer, and using an electron beam evaporation technology to ensure that the vacuum degree is less than 1.2 multiplied by 10-3Pa, power 600W, evaporation rate
Under the process conditions of (1), under HfO2Depositing metal on the insulated gate dielectric layer to manufacture a gate electrode, wherein the deposited metal isAnd combining Ni/Au metal with the metal thickness of 0.04 mu m/0.5 mu m to finish the manufacture of the device.
In the third embodiment, a homoepitaxial GaN high electron mobility transistor is manufactured, in which a substrate is a self-supporting GaN substrate, the thickness of a polarized doped AlGaN leakage isolation layer is 500nm, Al components decrease by 1% from 100% to 100% along the growth direction according to the increase of 5nm in thickness, the thickness of a GaN channel layer is 50nm, and the thickness of a scann barrier layer is 5 nm.
Step A, selecting a self-supporting gallium nitride substrate, placing the substrate in a growth chamber, and using a molecular beam epitaxy technology, wherein the temperature is 700 ℃, and the equilibrium vapor pressure of an aluminum beam is 2.1 multiplied by 10-7The equilibrium vapor pressure of Torr and gallium beam is 8.5X 10-7Under the process conditions of Torr, nitrogen flow of 2.3sccm and nitrogen plasma radio frequency source power of 375W, a polarized doped AlGaN leakage isolation layer with the thickness of 500nm and the gradient step change of Al component reduced by 1% from 100% per 5nm along the growth direction from bottom to top is deposited on the self-supporting gallium nitride substrate, as shown in FIG. 3 (a).
Step B, using molecular beam epitaxy technique, at 700 deg.C, the equilibrium vapor pressure of gallium beam is 8.5 × 10- 7And (b) depositing a GaN buffer layer with the thickness of 500nm on the polarized doped AlGaN leakage isolating layer under the process conditions of the Torr, the nitrogen flow rate of 2.3sccm and the nitrogen plasma radio frequency source power of 375W, as shown in figure 3 (b).
Step C, using molecular beam epitaxy technique, at 700 deg.C, the equilibrium vapor pressure of gallium beam is 8.5 × 10- 7A GaN channel layer with a thickness of 50nm was deposited on the GaN buffer layer under process conditions of 2.3sccm of nitrogen flow and 375W of nitrogen plasma RF source power, as shown in FIG. 3 (c).
Step D, using molecular beam epitaxy technology, at the temperature of 700 ℃, the equilibrium vapor pressure of the aluminum beam is 2.1 multiplied by 10- 7AlN insert layer with a thickness of 2nm was deposited on the GaN channel layer under the process conditions of Torr, nitrogen flow of 2.3sccm, and nitrogen plasma RF source power of 375W, as shown in FIG. 3 (d).
Step E, using molecular beam epitaxy technology, wherein the temperature is 670 ℃, and the equilibrium vapor pressure of scandium beam is1.8×10- 8Torr, the equilibrium vapor pressure of aluminum beam is 2.1X 10-7Torr, nitrogen flow rate of 2.3sccm, and nitrogen plasma RF source power of 375W, and Sc with a thickness of 5nm is deposited on the AlN insert layer0.18Al0.82And (e) an N barrier layer, as shown in FIG. 3 (e).
Step F, selecting a source electrode and drain electrode ohmic contact area on the surface of the ScAlN barrier layer by adopting a photoetching process, and injecting 1 multiplied by 10 concentration into the ohmic contact area19cm-3N-type Si ion of (1); then adopting electron beam evaporation process, setting vacuum degree less than 1.2X 10-3Pa, power 500W, evaporation rate
The Ti/Al/Ni/Au metal combination was deposited on the ohmic contact regions of the source and drain electrodes to a thickness of 0.02/0.2/0.05 μm and subjected to rapid thermal annealing at a temperature of 830 c for 30 seconds in a nitrogen atmosphere to form the source and drain electrodes, as shown in fig. 3 (f).
G, depositing Al with the thickness of 5nm on the ScAlN barrier layer by using an atomic layer deposition process2O3And (e) an insulated gate dielectric layer, as shown in fig. 3 (g).
Step H, adopting photoetching technology to remove Al2O3Selecting a grid electrode pattern on the insulated gate dielectric layer, and using an electron beam evaporation technology to ensure that the vacuum degree is less than 1.2 multiplied by 10-3Pa, power 500W, evaporation rate
Under the process conditions of (1) at Al2O3And depositing Ni/Au metal combination with the thickness of 0.03 mu m/0.4 mu m on the insulated gate dielectric layer to manufacture a gate, and finishing the manufacture of the device, as shown in figure 3 (h).
The foregoing description is only three specific examples of the present invention and is not intended to limit the invention, and it will be apparent to those skilled in the art that various modifications and variations in form and detail can be made without departing from the principle and structure of the invention after understanding the content and principle of the invention, but the modifications and variations will fall within the scope of the appended claims.
Claims (10)
1. The utility model provides a homoepitaxy GaN HEMT based on polarization mixes AlGaN electric leakage isolation layer includes substrate (1), channel layer (4), AlN inserted layer (5), barrier layer (6) from bottom to top, its characterized in that:
the substrate (1) is made of a self-supporting gallium nitride substrate or a thick-film gallium nitride substrate material, and a polarized doped AlGaN leakage isolation layer (2) and a GaN buffer layer (3) are arranged between the substrate and the channel layer (4) and are used for isolating and shielding a parasitic leakage channel caused by Si impurities adsorbed on the surface of the substrate;
an insulated gate dielectric layer (7) and a gate electrode (10) are sequentially arranged on the upper part of the barrier layer (6), ohmic contact regions are arranged on two sides of the barrier layer (6), and a source electrode (8) and a drain electrode (9) are respectively arranged on the ohmic contact regions;
the polarized doped AlGaN leakage isolating layer (2) has the Al component which is changed from 100% to 0% from bottom to top along the growth direction according to the gradient that the thickness is increased by 5nm-6nm and the component is reduced by 1% -5%, and the thickness is 100nm-500 nm.
2. The transistor of claim 1, wherein:
the GaN buffer layer (3) is 500nm-1000nm thick;
the channel layer (4) is made of GaN or InGaN, and the thickness of the channel layer is 10nm-50 nm;
the AlN insertion layer (5) has a thickness of 1nm to 2 nm.
3. The transistor of claim 1, wherein: the barrier layer (6) is made of any one of AlGaN, InAlN and ScAlN, and the thickness of the barrier layer is 5nm-30 nm.
4. The transistor of claim 1, wherein: the insulated gate dielectric layer (7) adopts Al2O3Or HfO2And the dielectric layer is 5nm-20nm thick.
5. A method for manufacturing a homoepitaxy GaN HEMT based on a polarization doped AlGaN leakage isolation layer is characterized by comprising the following steps:
1) on a substrate (1), a molecular beam epitaxy method is utilized to grow a polarized doped AlGaN leakage isolation layer (2) with the thickness of 100nm-500nm, wherein Al components are changed from 100% to 0% along the growth direction from 5nm-6nm of thickness increase and 1% -5% of component reduction;
2) growing a GaN buffer layer (3) with the thickness of 500nm-1000nm on the polarized doped AlGaN leakage isolating layer (2) by a molecular beam epitaxy method;
3) growing a channel layer (4) with the thickness of 10nm-50nm on the GaN buffer layer (3) by a molecular beam epitaxy method;
4) growing an AlN insert layer (5) with the thickness of 1nm-2nm on the channel layer (4) by a molecular beam epitaxy method;
5) growing a barrier layer (6) with the thickness of 5nm-30nm on the AlN insert layer (5) by using a molecular beam epitaxy method;
6) selecting ohmic contact areas of a source electrode and a drain electrode on two sides of the barrier layer (6) by adopting a photoetching process, and injecting the concentration of (1-5) multiplied by 10 into the ohmic contact areas19cm-3N-type Si ion of (1); depositing ohmic contact metal Ti/Al/Ni/Au on ohmic contact areas of the source electrode and the drain electrode by adopting an electron beam evaporation process, and annealing at 830 ℃ in a nitrogen atmosphere to form a source electrode (8) and a drain electrode (9);
7) growing an insulated gate dielectric layer (7) above the barrier layer (6) by adopting an atomic layer deposition process;
8) a gate electrode pattern is selected on the surface of the insulated gate dielectric layer (7) by adopting a photoetching process, and then an electron beam evaporation process is adopted to deposit a Ni/Au metal combination on the insulated gate dielectric layer (7) to form a gate electrode (10), so that the device is manufactured.
6. The method of manufacturing of claim 5, wherein: the molecular beam epitaxy method in the step 1) has the following process conditions: the temperature is 700-720 ℃, the equilibrium vapor pressure of the aluminum beam is 2.1 multiplied by 10-7Torr-2.8×10-7Torr, equilibrium vapor pressure of gallium beam current is 7.5X 10-7Torr-8.5×10-7The nitrogen flow rate was 2.3sccm and the nitrogen plasma RF source power was 375W.
7. The method of manufacturing of claim 5, wherein: the molecular beam epitaxy method in the step 2) has the following process conditions: the temperature is 700-720 ℃, the equilibrium vapor pressure of the gallium beam is 7.5 multiplied by 10-7Torr-8.5×10-7The nitrogen flow rate was 2.3sccm and the nitrogen plasma RF source power was 375W.
8. The method of manufacturing of claim 5, wherein: the molecular beam epitaxy method in 3) has the following process conditions: the temperature is 600-720 ℃, the equilibrium vapor pressure of the gallium beam is 7.5 multiplied by 10-7Torr-8.5×10-7Torr, equilibrium vapor pressure of indium beam current is 1.6X 10-7The nitrogen flow rate was 2.3sccm and the nitrogen plasma RF source power was 375W.
9. The method of manufacturing of claim 5, wherein: the molecular beam epitaxy method in 4) has the following process conditions: the temperature is 600-720 ℃, the equilibrium vapor pressure of the aluminum beam is 2.1 multiplied by 10-7Torr-2.8×10-7The nitrogen flow rate was 2.3sccm and the nitrogen plasma RF source power was 375W.
10. The method of manufacturing of claim 5, wherein: the molecular beam epitaxy method in the step 5) has the following process conditions: the temperature is 600-720 ℃, the equilibrium vapor pressure of the aluminum beam is 2.1 multiplied by 10-7Torr-2.8×10-7Torr, equilibrium vapor pressure of gallium beam current is 7.5X 10-7Torr, equilibrium vapor pressure of indium beam current is 1.6X 10-7Torr, scandium Beam equilibrium vapor pressure of 1.8X 10-8The nitrogen flow rate was 2.3sccm and the nitrogen plasma RF source power was 375W.
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| JP2011187643A (en) * | 2010-03-08 | 2011-09-22 | Sharp Corp | Heterojunction field-effect transistor |
| CN108155224A (en) * | 2017-12-06 | 2018-06-12 | 中国电子科技集团公司第十三研究所 | Gallium nitride epitaxial slice, epitaxy method and gallium nitride based transistor |
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| JP2011187643A (en) * | 2010-03-08 | 2011-09-22 | Sharp Corp | Heterojunction field-effect transistor |
| CN108155224A (en) * | 2017-12-06 | 2018-06-12 | 中国电子科技集团公司第十三研究所 | Gallium nitride epitaxial slice, epitaxy method and gallium nitride based transistor |
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