JP2011187643A - Heterojunction field-effect transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a heterojunction field-effect transistor in which a leakage current is small and a breakdown strength is high. <P>SOLUTION: The heterojunction field-effect transistor includes: an AlN buffer layer; an AlGaN composition inclined layer; a GaN channel layer; and an AlGaN barrier layer, which are successively layered on an insulating substrate. The AlGaN composition inclined layer reduces an Al density from the lower face toward the upper face, the AlGaN barrier layer has a larger Al density by 15% or more than the Al density on the upper face of the AlGaN composition inclined layer, and a pseudo p-type sheet carrier density obtained by spontaneous polarization and a piezoelectric effect in the AlGaN composition inclined layer is 3&times;10<SP>12</SP>cm<SP>-2</SP>through 4&times;10<SP>12</SP>cm<SP>-2</SP>. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a heterojunction field effect transistor (HFET) that generates a two-dimensional electron gas, and more particularly to reduction of leakage current and improvement of pressure resistance of an HFET including a plurality of nitride semiconductor layers formed on an insulating substrate. Is.

  In nitride semiconductors such as GaN and AlGaN, the band gap is large, the dielectric breakdown voltage is high, the drift speed of electrons is large, and a two-dimensional electron gas due to a heterojunction can be used. For example, when an AlGaN layer is stacked on an undoped GaN layer, secondary electron gas is generated at the heterointerface due to both the spontaneous polarization and the piezoelectric polarization. An HFET using such a secondary electron gas as a channel is known. Thus, an HFET using a nitride semiconductor can be preferably applied to a power device for controlling a large current.

  By the way, conventionally, in an HFET manufactured on a sapphire substrate which is a typical insulating substrate, in order to improve the punch-through breakdown voltage and reduce the leakage current, the resistance of the buffer layer or the like under the channel layer is increased. It is considered that p-type conversion is indispensable (see, for example, JP 2005-85852 A).

However, normally, the undoped nitride semiconductor itself is an n-type semiconductor having a carrier concentration of 10 ¹⁵ to 10 ¹⁶ cm ⁻³ . In particular, since a nitride semiconductor layer crystal-grown on a sapphire substrate generally has relatively good crystallinity, it is not easy to increase its resistance.

  On the other hand, in order to obtain a high-resistance nitride semiconductor layer, a method of compensating n-type carriers by doping p-type impurities such as Mg and C, and doping impurities that form deep energy levels such as Fe Thus, a method for trapping carriers is used (for example, see Japanese Patent Application Laid-Open No. 2007-184379). It is well known that Mg doping is typically effective for making a nitride semiconductor layer p-type.

JP-A-2005-85852 JP 2007-184379 A JP 2009-10142 A

  However, in HFET, doping a nitride semiconductor layer below a channel layer with a general p-type impurity is considered to cause current collapse (a phenomenon in which drain current rapidly decreases during operation of HFET). Yes. Exceptionally, it is considered that the HFET is not significantly affected by current collapse only when the resistance of the nitride semiconductor layer under the channel layer is increased by doping C as a p-type impurity. However, when the crystallinity is further improved in the nitride semiconductor layer under the channel layer by further reducing the dislocation density, there is a possibility that the nitride semiconductor layer may not be easily made p-type or high in resistance. Also remains.

  In view of the state of the prior art as described above, in order to reduce the leakage current and improve the punch-through breakdown voltage and reduce the current collapse in the HFET, a high resistance by impurity doping in the nitride semiconductor layer under the channel layer is required. It is desirable to avoid conversion to p-type as much as possible.

  Accordingly, an object of the present invention is to reduce the leakage current of the HFET and improve the withstand voltage without making the nitride semiconductor layer under the channel layer p-type by impurity doping.

  As a result of intensive studies by the present inventor, the nitride semiconductor layer structure under the channel layer in the HFET can be pseudo-typed without impurity doping by optimizing the nitride semiconductor layer structure under the channel layer. It was found to be possible. As a result of the pseudo p-type, it is possible to increase the breakdown voltage and suppress the current collapse by reducing the leakage current in the HFET.

That is, the heterojunction field effect transistor according to the present invention includes an AlN buffer layer, an AlGaN composition gradient layer, a GaN channel layer, and an AlGaN barrier layer that are sequentially stacked on an insulating substrate. The Al concentration is reduced toward the upper surface, and the AlGaN barrier layer has an Al concentration that is 15% or more larger than the Al concentration on the upper surface of the AlGaN composition gradient layer, and spontaneous polarization and piezoelectric effects are present in the AlGaN composition gradient layer. The pseudo p-type sheet carrier concentration obtained by the above is 3 × 10 ¹² cm ⁻² or more and 4 × 10 ¹² cm ⁻² or less.

  In addition, it is preferable that a source electrode, a gate electrode, and a drain electrode are disposed on the AlGaN barrier layer, and the AlGaN composition gradient layer and the source electrode are electrically connected. As the insulating substrate, a sapphire substrate or a non-doped SiC substrate can be preferably used.

  As described above, according to the present invention, the AlGaN composition graded layer under the GaN channel layer in the HFET can be pseudo-p-type without doping impurities, thereby increasing the breakdown voltage and reducing the leakage current of the HFET. The current collapse can be reduced.

It is a typical sectional view showing HFET by one embodiment of the present invention. FIG. 3 is a schematic cross-sectional view showing an HFET according to another embodiment of the present invention. It is a graph which shows the simulation result of the relationship between the pseudo | simulation p-type sheet carrier density | concentration in the AlGaN composition inclination layer in the HFET by this invention, and a punch through breakdown voltage.

As described above, the hetero-type field effect transistor according to the present invention includes an AlN buffer layer, an AlGaN composition gradient layer, a GaN channel layer, and an AlGaN barrier layer, which are sequentially stacked on an insulating substrate. The Al concentration is reduced from the lower surface to the upper surface, and the AlGaN barrier layer has an Al concentration that is 15% or more higher than the Al concentration on the upper surface of the AlGaN composition gradient layer. The pseudo p-type sheet carrier concentration obtained by the piezo effect is 3 × 10 ¹² cm ⁻² or more and 4 × 10 ¹² cm ⁻² or less.

  As an insulating substrate material, a substrate that does not include a movable carrier, such as sapphire or undoped SiC, is desirable. That is, the presence of the movable carrier in the substrate acts to compensate for the electric field in the nitride semiconductor layer thereon, which is not desirable for increasing the breakdown voltage of the HFET.

  The AlGaN composition gradient layer is preferably electrically connected to the source electrode of the source electrode, gate electrode, and drain electrode disposed on the AlGaN barrier layer. That is, when the AlGaN composition gradient layer which is a pseudo p-type layer is not connected to the source electrode, when the operation of the HFET is switched from OFF to ON, excessive holes in the pseudo p-type layer are difficult to escape, The effective two-dimensional electron gas concentration in the layer becomes ns-ps (n-type sheet carrier concentration-p-type sheet carrier concentration), leading to an increase in on-resistance. Therefore, the value of ps in the pseudo p-type layer is preferably as small as possible as long as the withstand voltage of the HFET can be maintained.

FIG. 3 is a graph showing simulation results for determining the relationship between the pseudo p-type sheet carrier concentration in the AlGaN composition gradient layer and the punch-through breakdown voltage (defined as a voltage at which the drain leakage current density becomes 1 μA / mm) of the HFET. is there. That is, the horizontal axis of this graph represents the pseudo p-type sheet carrier concentration (× 10 ¹² cm ⁻² ) in the AlGaN composition gradient layer, and the vertical axis represents the punch-through breakdown voltage (V).

As can be seen from the simulation results in FIG. 3, the punch-through breakdown voltage of the HFET increases with an increase in the pseudo p-type sheet carrier concentration (ps), and is 540 V when the sheet carrier concentration is ps = 3 × 10 ¹² cm ^−2. It is calculated that a withstand voltage of 1200 V is obtained when the sheet carrier concentration is ps = 4 × 10 ¹² cm ⁻² .

In order to obtain the pseudo p-type sheet carrier concentration (ps) in the AlGaN composition gradient layer, the difference in Al atom composition ratio in the group III element between the lower surface side and the upper surface side of the composition gradient layer is expressed by Δx ( when the Al atomic composition ratio is large) in the lower surface side, empirically ^{ps = 2.6 × 10 13 Δx~4.8 ×} 10 13 Δx
Can be obtained at
(1) When ps = 3 × 10 ¹² cm ⁻² , 0.06 ≦ Δx ≦ 0.12
(2) When ps = 4 × 10 ¹² cm ⁻² , 0.08 ≦ Δx ≦ 0.15
It is considered that Δx should be set in the range of.

  Note that there is no specific limitation on the thickness of the composition gradient layer with respect to obtaining a predetermined pseudo p-type sheet carrier concentration (ps) in the AlGaN composition gradient layer.

  Incidentally, a graded AlGaN layer similar to the AlGaN composition gradient layer in the present invention is also disclosed in Japanese Patent Application Laid-Open No. 2009-10142. However, the graded AlGaN layer in Patent Document 3 is provided to suppress strain due to lattice mismatch between the AlN layer and the GaN layer, and teaches an Al composition range suitable for suppressing lattice strain. There is only. Also, in the cited document 3, there is no teaching or suggestion about the pseudo p-type sheet carrier concentration as in the AlGaN composition gradient layer according to the present invention.

  That is, in the present invention, the punch-through breakdown voltage is improved by setting the pseudo p-type sheet carrier concentration within a predetermined range by changing the Al concentration in the AlGaN composition gradient layer. The effect of the invention is obtained by an electronic principle different from the principle of suppressing lattice distortion used by the invention of No. 3. In addition, in the case of Patent Document 3, the lattice strain between the AlN layer and the GaN layer can be suppressed by the graded AlGaN layer regardless of the substrate, but in the AlGaN composition gradient layer in the present invention, The effect is exhibited only when an insulating substrate is used, and the effect is not exhibited when a conductive SiC or Si substrate is used.

  In the HFET of a more preferred embodiment according to the present invention, the AlGaN composition gradient layer is electrically connected to the source electrode. This is due to the following reason. That is, when the HFET is operated, an electrical path is provided by electrically connecting the AlGaN composition gradient layer and the source electrode in order to smoothly flow out / inject holes during the on / off operation. Is desired. In addition, when the AlGaN composition gradient layer and the source electrode are not electrically connected, there is a possibility of causing a new collapse depending on the operating conditions of the HFET. Also from this viewpoint, it is preferable that the AlGaN composition gradient layer and the source electrode are electrically connected. Further, when the pseudo p-type layer is connected to the source electrode, excess holes can be quickly extracted from the vicinity of the channel, so that the on-resistance of the HFET does not increase.

  On the other hand, increasing Δx in the AlGaN composition gradient layer to increase the pseudo p-type sheet carrier concentration (ps) results in a decrease in switching speed and a decrease in avalanche breakdown voltage due to an increase in capacitance component. Even when the AlGaN composition gradient layer is connected to the source electrode, it is not preferable to increase the ps.

(Embodiment 1)
FIG. 1 is a schematic cross-sectional view illustrating an HFET according to Embodiment 1 of the present invention. In the drawings of the present application, dimensional relationships such as length, thickness, and width are appropriately changed for clarity of the drawings, and do not represent actual dimensional relationships.

  The HFET of FIG. 1 can be manufactured as follows. First, the sapphire substrate 1 is introduced into a reaction chamber of an MOCVD (metal organic vapor deposition) apparatus, and surface nitriding of the substrate 1 is performed using ammonia at a substrate temperature of 1150 ° C. and a flow rate of 3 slm.

  Next, the substrate temperature is lowered to 550 ° C., trimethylaluminum (TMA) with a flow rate of 54.2 sccm and ammonia with a flow rate of 3 slm are introduced into the reaction chamber, and an AlN buffer layer 2 with a thickness of 30 nm is formed under a pressure of 13.3 kPa. Grow.

  Subsequently, after raising the substrate temperature to 1150 ° C., a reaction chamber pressure of 13.3 kPa and an ammonia flow rate of 12.5 slm were set, and a trimethyl gallium (TMG) flow rate was changed from 57.9 sccm to 103. 3 during a deposition time of 20 minutes. The AlGaN composition gradient layer 3 is grown by changing the flow rate to 3 sccm and changing the TMA flow rate from 60.2 sccm to 22.7 sccm. At this time, the Al atom composition ratio in the group III element is changed from 0.2 to 0.05 between the lower surface and the upper surface of the AlGaN composition gradient layer 3 having a thickness of 2 μm.

  Further, TMG with a flow rate of 13.0 sccm and ammonia with a flow rate of 12.5 slm were introduced into the reaction chamber under the conditions of a substrate temperature of 1100 ° C. and a reaction chamber pressure of 100 kPa, and a 40 nm thick GaN film was formed on the AlGaN composition gradient layer 3. The channel layer 4 is grown.

Finally, TMG with a flow rate of 9.1 sccm, TMA with a flow rate of 16.5 sccm, and ammonia with a flow rate of 12.5 slm were introduced into the reaction chamber under the conditions of a substrate temperature of 1100 ° C. and a pressure in the reaction chamber of 100 kPa, and a thickness of 20 nm. The Al _0.3 Ga _0.7 N barrier layer 5 is grown.

  On the AlGaN barrier layer 5 of the wafer including the nitride semiconductor multilayer structure manufactured as described above, a stack of, for example, Hf / Al / Hf / Au is formed by vacuum deposition or sputtering, and then at 800 ° C. for 1 min. By performing this annealing, the source electrode 6 and the drain electrode 7 are formed. At this time, each thickness of Hf / Al / Hf / Au may be, for example, 13 nm / 85 nm / 13 nm / 60 nm. Similarly, on the AlGaN barrier layer 5, for example, WN / W / Au is laminated by vacuum deposition or sputtering to form the gate electrode 8. At this time, each thickness of WN / W / Au may be, for example, 60 nm / 10 nm / 100 nm.

The HFET fabricated as described above includes an AlN buffer layer, a 2 μm thick GaN channel layer, and a 20 nm thick Al _0.25 Ga _0.75 N barrier layer sequentially stacked on a sapphire substrate. Compared with a conventional HFET, the effects of reducing leakage current, improving withstand voltage, and reducing current collapse can be obtained.

In Example 1, the Al composition ratio in the AlGaN composition gradient layer having a thickness of 2 μm was changed in the range of 0.2 to 0.05. However, the carrier concentration given by the above-described formula (1) is 1 As long as the conditions that can be changed within the range of × 10 ¹⁶ cm ^{−3 to} 3 × 10 ¹⁶ cm ⁻³ are satisfied, the Al composition ratio can be set to an arbitrary change range.

  However, in order to obtain the minimum required two-dimensional electron gas concentration in the GaN channel layer 4 by the action of both spontaneous polarization and piezoelectric polarization, the Al composition ratio of the AlGaN barrier layer 5 is set on the upper surface side of the AlGaN composition gradient layer. It is necessary to make it 15% or more larger than the Al composition ratio.

(Embodiment 2)
FIG. 2 illustrates an HFET according to Embodiment 2 of the present invention in a schematic cross-sectional view. In the fabrication of the HFET according to the second embodiment, the AlN buffer layer 2, the AlGaN composition gradient layer 3, the GaN channel layer 4, and the AlGaN barrier layer 5 are sequentially stacked on the sapphire substrate 1 in the same manner as in the first embodiment. The

  However, after that, in Embodiment 2, a part of the AlGaN barrier layer 5 and the GaN channel layer 4 are removed by etching with chlorine gas, and a part of the AlGaN composition gradient layer 3 is exposed.

  In the second embodiment, the source electrode 6, the drain electrode 7 and the gate electrode 8 are formed on the AlGaN barrier layer 5 in the same manner as in the first embodiment. In the second embodiment, an AlGaN composition gradient layer is further formed. A p-type ohmic electrode 9 is additionally formed on the exposed portion 3.

  The p-type ohmic electrode 9 can be formed by, for example, laminating Pd / Au by vacuum deposition or sputtering, and then annealing at 550 ° C. for 10 minutes. At this time, each thickness of Pd / Au may be 10 nm / 100 nm, for example. The p-type ohmic electrode 9 formed in this way is electrically connected to the source electrode 6.

  In the HFET according to the second embodiment, there is no significant difference in reducing the leakage current as compared with the HFET in the first embodiment, but an improvement can be obtained in terms of reducing current collapse during high-voltage operation or high-speed operation.

  As described above, according to the present invention, it is possible to reduce the leakage current and improve the withstand voltage of the HFET without making the nitride semiconductor layer under the channel layer p-type by impurity doping.

  1 Sapphire substrate, 2 AlN buffer layer, 3 AlGaN composition gradient layer, 4 GaN channel layer, 5 AlGaN barrier layer, 6 source electrode, 7 drain electrode, 8 gate electrode, 9 p-type electrode.

Claims (3)

Including an AlN buffer layer, an AlGaN composition gradient layer, a GaN channel layer, and an AlGaN barrier layer sequentially stacked on an insulating substrate;
The AlGaN composition gradient layer has an Al concentration reduced from its lower surface to its upper surface,
The AlGaN barrier layer has an Al concentration of 15% or more larger than the Al concentration on the upper surface of the AlGaN composition gradient layer;
The AlGaN heterojunction field effect transistor, wherein the pseudo p-type sheet carrier concentration obtained by the spontaneous polarization and piezoelectric effect in the composition gradient layer is ^4x10 12 ^{cm -2} or less ^3x10 12 ^{cm -2} or more.   The heterojunction according to claim 1, wherein a source electrode, a gate electrode, and a drain electrode are disposed on the AlGaN barrier layer, and the AlGaN composition gradient layer and the source electrode are electrically connected. Junction field effect transistor.   The heterojunction field effect transistor according to claim 1 or 2, wherein the insulating substrate is a sapphire substrate or a non-doped SiC substrate.

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