CN112133749A - P-type cap layer enhanced HEMT device and preparation method thereof - Google Patents
P-type cap layer enhanced HEMT device and preparation method thereof Download PDFInfo
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- 238000003780 insertion Methods 0.000 claims abstract description 12
- 230000037431 insertion Effects 0.000 claims abstract description 11
- 229910002601 GaN Inorganic materials 0.000 claims description 53
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 31
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- 229910010271 silicon carbide Inorganic materials 0.000 claims description 7
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims description 6
- 229910052594 sapphire Inorganic materials 0.000 claims description 6
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- 229910001425 magnesium ion Inorganic materials 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 238000001803 electron scattering Methods 0.000 description 2
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
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Abstract
The invention discloses a P-type cap layer enhanced HEMT device and a preparation method thereof, belonging to the technical field of microelectronics, and comprising a substrate, a low-temperature nucleating layer, a buffer layer, a high-resistance layer, a channel layer, a barrier layer, an insertion layer and a P-GaN cap layer which are sequentially stacked from bottom to top.
Description
Technical Field
The invention belongs to the technical field of microelectronics, and particularly relates to epitaxial preparation of a semiconductor device, namely a P-type cap layer enhanced HEMT device and a preparation method thereof.
Background
The third generation Semiconductor material, i.e. the Wide Band Gap Semiconductor (WBGS) Semiconductor material, is developed following the first generation silicon, germanium, the second generation gallium arsenide, indium phosphide, etc. Among the third generation semiconductor materials, gallium nitride (GaN) has superior properties such as wide band gap, direct band gap, high breakdown electric field, lower dielectric constant, high electron saturation drift velocity, strong radiation resistance, and good chemical stability, and becomes a key semiconductor material for manufacturing a new generation of microelectronic devices and circuits following germanium, silicon, and gallium arsenide.
The High Electron Mobility Transistor (HEMT) prepared by two-dimensional electron gas generated by polarization effect at the interface of the ALGaN/GaN heterojunction is a planar structure GaN-based power device mainly applied at present. However, since the two-dimensional electron gas at the heterojunction interface is always present, a relatively complex gate driving circuit is required in real applications, since the enhancement type GaN-based HEMT has become an important research technology direction. The main technical means for realizing the enhanced GaN-based HEMT power electric appliance at present comprise a concave grid structure, an F ion implantation technology, a P-type grid cap layer, a cascade structure and the like. Wherein. The method for realizing the depletion of two-dimensional electron gas at the heterojunction interface through the P-type gate cap layer structure on the ALGaN/GaN heterojunction is an industrialized mainstream technology, and the P-type gate cap layer technology has potential advantages in the aspects of interface quality, device on-state characteristics and the like. However, the implementation of the P-type gate cap layer enhanced GaN-based HEMT device still has some problems, for example; the concentration of holes in the P-type gate cap layer is difficult to increase, the etching depth of the P-type gate cap layer is difficult to control, and the like.
In an ALGaN/GaN heterojunction HEMT device, the AL component of the barrier layer directly affects the density and surface roughness of the two-dimensional electron gas. In addition, in order to realize the enhancement type HEMT device, a p-type gate process is usually adopted, and the distance between the p-type gate and the two-dimensional electron gas needs to be reduced for regulating and controlling the two-dimensional electron gas by the enhancement gate, so that the growth of a p-type layer needs to be realized when the p-type gate is grown. However, researches find that when a P-type material is grown by a conventional MOCVD process, high hole concentration cannot be realized, and Mg ions which are not effectively doped form defects to influence the lattice quality of a P-type layer. Mg ions can penetrate into the bottom layer in a defect mode to affect the lattice quality of the barrier layer and the channel layer, electron scattering is increased, and mobility is reduced.
Disclosure of Invention
The invention aims to overcome the problems and provides an epitaxial preparation method of a P-GaN cap layer enhanced HEMT device, which can improve the lattice quality, obtain higher Mg doping and realize effective activation to generate high-concentration holes. The ALN layer is inserted below the P-cap layer, so that the diffusion of Mg can be effectively blocked, and the defects caused by the diffusion of Mg can be effectively reduced. Barrier layer ALxGa1-xThe N and AL components are gradually increased, so that the surface roughness is better ensured while the concentration of the two-dimensional electron gas is ensured. The P-cap layer grows by adopting high pressure, the incorporation of Mg is effectively improved, and better lattice quality is obtained.
The device structure comprises a substrate, a low-temperature nucleating layer, a buffer layer, a high-resistance layer, a channel layer, a barrier layer, an insertion layer and a P-GaN cap layer, wherein all the layers are sequentially arranged from bottom to top.
Preferably, the substrate is any material that can be used to epitaxially grow a gallium nitride film, including insulating or semi-insulating sapphire, silicon carbide, gallium nitride, and diamond, with dimensions in the range of 2-8 inches.
Preferably, the nucleation layer can be any one or combination of ALN, ALGaN and GaN, and the film thickness is 10-200 nm.
Preferably, the buffer layer is an unintentionally doped intrinsic AlGaN layer grown by MOCVD, and the thickness of the buffer layer is 0.5-2 um.
Preferably, the high-resistance layer is a semi-insulating high-quality gallium nitride thin film layer formed by the unintentional doping growth of MOCVD growth, and the thickness of the thin film is in the range of 1.5-3 um.
Preferably, the channel layer is a semi-insulating high-quality gallium nitride channel thin film layer grown by MOCVD, and the thickness range of the thin film is 50-200 nm.
Preferably, the barrier layer ALxGa1-xAnd N, wherein the Al component gradually increases, the thickness of 5-15% gradually changes to 15-35%, and the thickness is 10-35 nm.
Preferably, the insertion layer is an ALN layer, and the thickness of the insertion layer is 1-10 nm.
Preferably, the P-GaN cap layer is an Mg-GaN layer grown under a specific growth condition by adopting metal organic vapor phase epitaxy deposition, and the thickness of the Mg-GaN layer is 50-200 nm.
Preferably, the P-GaN cap layer grows hair at high pressure of 500-600 torr and at 800-1000 ℃.
A preparation method of a P-type cap layer enhanced HEMT device comprises the following steps:
(1) providing a substrate, wherein the substrate is made of all materials for extending the gallium nitride film, including insulating or semi-insulating materials such as sapphire, silicon carbide, gallium nitride, diamond and the like, and has the size ranging from 2 to 8 inch;
(2) growing a nucleating layer at the temperature of 400-700 ℃, wherein the nucleating layer is grown by any one or combination of ALN, ALGaN and GAN, and the total thickness of the nucleating layer is 10-200 nm;
(3) growing a buffer layer on the nucleation layer, wherein the buffer layer is made of an aluminum gallium nitrogen material, the growth temperature is 900-1120 ℃, and the film thickness is 0.5-2 um;
(4) growing an unintentionally doped gallium nitride high-resistance layer on the buffer layer, wherein the thickness range of the film is 1.5-3 um, and the growth temperature is 1120-1150 ℃;
(5) growing a gallium nitride channel layer on the high-resistance layer, wherein the thickness range of the film is 50-200 nm;
(6) the structural formula of the barrier layer on the channel layer is ALGaN, the thickness is 10-35nm, and the AL component is gradually increased from 10% to 40% at the temperature of 800-1000 ℃.
(7) An ALN insertion layer is connected to the channel layer, and the thickness of the ALN insertion layer is 5 nm;
(8) and growing the P-GaN cap layer on the insertion layer at the growth pressure of 500torr and the temperature of 950 ℃.
Compared with the prior art, the invention has the following advantages: a new structure and a growing method are provided, so that the epitaxial preparation of the enhancement type HEMT device is realized, and the stability of the performance of the enhancement type HEMT device is ensured. The main technology comprises the following steps:
1. growth barrier layer AL adopting variable componentsxGa1-xAnd N, wherein the mode of gradually increasing the AL component is adopted, so that under the condition that polarization can be caused to generate enough two-dimensional electron gas concentration, the lattice mismatch between the GaN channel layer and the ALN layer is reduced as much as possible, and the barrier layer is used as an intermediate layer and has a relieving effect by adopting the mode of gradually increasing the AL component.
2. The ALN insertion layer is arranged below the P-GaN cap layer, Mg ions can be continuously diffused in a defect mode in the epitaxial layer, but the ALN grown by MOCVD is in a metal-like sheet mode, so that the diffusion of Mg can be effectively blocked, and the electron scattering phenomenon of the epitaxial layer below the P-GaN cap layer is reduced.
3. The high-pressure growth method is adopted to grow the P-GaN cap layer, so that the lattice quality of the P-GaN cap layer can be effectively improved, the incorporation of Mg can be improved, and the hole carrier concentration and the mobility of the P-GaN cap layer can be effectively improved. The new structure and the long method can effectively improve the characteristics of the HEMT device and are suitable for the application of high-voltage high-power electronic devices.
Drawings
FIG. 1 is a schematic structural diagram of the present invention.
FIG. 2 shows the results of the experiment obtained in example 1.
Wherein: l1-substrate, L2-low temperature nucleation layer, L3-buffer layer, L4-high resistance layer, L5-channel layer, L6-barrier layer, L7-insertion layer, L8-P-GaN cap layer.
Detailed Description
In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further described with the specific embodiments.
The invention discloses a P-type cap layer enhanced HEMT device, which comprises a substrate L1, a low-temperature nucleating layer L2, a buffer layer L3, a high-resistance layer L4, a channel layer L5, a barrier layer L6, an insertion layer L7 and a P-GaN cap layer L8 which are sequentially stacked from bottom to top,
example 1
(1) A substrate L1 is provided, which is all the material used to epitaxially grow the gan film, including insulating or semi-insulating sapphire, silicon carbide, gan and diamond, in the size range of 2 inch.
(2) The nucleation layer L2 is grown at 400 deg.C, and can be grown by one or combination of ALN, ALGaN and GAN, and has a total thickness of 10 nm.
(3) And growing a buffer layer L3 which is an aluminum gallium nitrogen material on the nucleation layer, wherein the growth temperature is 900 ℃, and the film thickness is 0.5 um.
(4) And growing an unintentionally doped gallium nitride high-resistance layer L4 on the buffer layer, wherein the thickness of the film is in the range of 1.5um, and the growth temperature is between 1120 ℃.
(5) A gallium nitride channel layer L5 was grown on the high resistance layer with a film thickness in the range of 50nm.
(6) The structural formula of the barrier layer L6 on the channel layer is ALGaN, the thickness is 10nm, and the AL component is gradually increased from 10% to 40% at the temperature of 800 ℃.
(7) A layer L7 was inserted into the channel layer, which was an ALN layer with a thickness of 5 nm.
(8) The P-GaN cap layer L8 was grown on the interlevel at a growth pressure of 500torr and a temperature of 950 ℃.
Example 2
(1) A substrate L1 is provided, which is all the material used to epitaxially grow the gan film, including insulating or semi-insulating sapphire, silicon carbide, gan and diamond, in the size range of 5 inches.
(2) The nucleation layer L2 is grown at 500 deg.C, and can be grown by one or combination of ALN, ALGaN and GAN, and has a total thickness of 40 nm.
(3) And growing a buffer layer L3 which is an aluminum gallium nitrogen material on the nucleation layer, wherein the growth temperature is 1000 ℃, and the film thickness is 1 um.
(4) And growing an unintentionally doped gallium nitride high-resistance layer L4 on the buffer layer, wherein the thickness of the film is in the range of 2um, and the growth temperature is between 1135 ℃.
(5) A gallium nitride channel layer L5 was grown on the high resistance layer with a film thickness in the range of 100nm.
(6) The structural formula of the barrier layer L6 on the channel layer is ALGaN, the thickness is 25nm, and the AL component is gradually increased from 15% to 35% at the temperature of 900 ℃.
(7) A layer L7 was inserted into the channel layer, which was an ALN layer with a thickness of 2 nm.
(8) The P-GaN cap layer L8 was grown on the interlevel at a growth pressure of 550torr and a temperature of 950 ℃.
Example 3
(1) A substrate L1 is provided, which is all the material used to epitaxially grow the gan film, including insulating or semi-insulating sapphire, silicon carbide, gan and diamond, with dimensions in the 8inch range.
(2) The nucleation layer L2 is grown at 700 deg.C, and can be grown by one or combination of ALN, ALGaN and GAN, and has a total thickness of 50nm.
(3) And growing a buffer layer L3 which is an aluminum gallium nitrogen material on the nucleation layer, wherein the growth temperature is 1120 ℃, and the film thickness is 2 um.
(4) And growing an unintentionally doped gallium nitride high-resistance layer L4 on the buffer layer, wherein the thickness of the film is in the range of 3um, and the growth temperature is between 1150 ℃.
(5) A gallium nitride channel layer L5 was grown on the high resistance layer with a film thickness in the range of 200nm.
(6) The structural formula of the barrier layer L6 on the channel layer is ALGaN, the thickness is 35nm, and the AL component is gradually increased from 20% to 30% at the temperature of 1000 ℃.
(7) A layer L7 was inserted into the channel layer, which was an ALN layer with a thickness of 7 nm.
(8) The P-GaN cap layer L8 was grown on the interlevel at a growth pressure of 600torr and a temperature of 950 ℃.
As can be seen from fig. 2, the data result after example 1 is shown in fig. 2, which shows that the surface roughness of the epitaxial layer of the gan device prepared under the condition of example 1 is obviously improved compared with the surface roughness of the epitaxial layer of the gan device under the conventional experimental condition.
It will be appreciated by those skilled in the art that the invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The embodiments disclosed above are therefore to be considered in all respects as illustrative and not restrictive. All changes which come within the scope of or equivalence to the invention are intended to be embraced therein.
Claims (10)
1. A P-type cap layer enhanced HEMT device is characterized by comprising a substrate (L1), a low-temperature nucleation layer (L2), a buffer layer (L3), a high-resistance layer (L4), a channel layer (L5), a barrier layer (L6), an insertion layer (L7) and a P-GaN cap layer (L8) which are sequentially stacked from bottom to top.
2. The P-type cap layer enhanced HEMT device of claim 1, wherein said substrate layer (L1) is 2-8inch in size and is made of any one of silicon, silicon carbide, gallium nitride and diamond.
3. The P-type cap layer enhancement type HEMT device of claim 1, wherein said low temperature nucleation layer (L2) is any one or combination of ALN, ALGaN, GaN, and the film thickness of said low temperature nucleation layer (L2) is 10-200 nm.
4. The P-type cap layer enhanced HEMT device of claim 1, wherein said buffer layer (L3) is an unintentionally doped aluminum gallium nitride layer grown by MOCVD with a thickness of 0.5-2 um.
5. The P-type cap layer enhancement mode HEMT device of claim 1, wherein said high resistance layer (L4) is a semi-insulating high quality gallium nitride thin film layer grown by MOCVD-grown unintentional doping growth, with a film thickness in the range of 1.5-3 um.
6. The P-type cap layer enhancement mode HEMT device of claim 1, wherein said channel layer (L5) is a semi-insulating high quality gallium nitride channel thin film layer grown by MOCVD with a film thickness in the range of 50-200 nm.
7. The P-type cap layer enhancement type HEMT device of claim 1, wherein said barrier layer (L6) has the formula ALxGa1-xThe N and AL components gradually increase, the concentration of 10-25% gradually changes to 25-40%, and the thickness is 10-35 nm.
8. The P-type cap layer enhancement type HEMT device of claim 1, wherein an ALN plug-in layer (L7) is inserted after the barrier layer (L6) is completed, and the thickness is 1nm to 10 nm.
9. The P-type cap layer enhanced HEMT device of claim 1, wherein said P-GaN cap layer is a P-GaN layer (L8) grown under high pressure using MOCVD with a thickness of 50-200 nm.
10. A method for manufacturing a P-type cap layer enhanced HEMT device according to any one of claims 1-8, comprising the steps of:
(1) providing a substrate (L1) of all materials used to epitaxially grow gallium nitride films, including insulating or semi-insulating sapphire, silicon carbide, gallium nitride and diamond materials, in the size range of 2-8 inch;
(2) growing a nucleation layer (L2) at a temperature of 400-700 ℃, wherein the nucleation layer is grown by any one or combination of ALN, ALGaN and GAN, and the total thickness of the nucleation layer is 10-200 nm;
(3) growing a buffer layer (L3) which is an aluminum gallium nitrogen material on the nucleation layer, wherein the growth temperature is 900-1120 ℃, and the film thickness is 0.5-2 um;
(4) growing an unintentionally doped gallium nitride high-resistance layer (L4) on the buffer layer, wherein the thickness of the film is 1.5-3 um, and the growth temperature is 1120-1150 ℃;
(5) growing a gallium nitride channel layer (L5) on the high-resistance layer, wherein the thickness of the film is 50-200 nm;
(6) the structural formula of the barrier layer (L6) on the channel layer is ALGaN, the thickness is 10-35nm, and the AL component is gradually increased from 10% to 40% at the temperature of 800-1000 ℃;
(7) an insertion layer (L7) formed by connecting ALN to the barrier layer, and having a thickness of 5 nm;
(8) a P-GaN cap layer (L8) was grown on the interlevel at a growth pressure of 500torr and a temperature of 950 ℃.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112713189A (en) * | 2020-12-29 | 2021-04-27 | 西安电子科技大学芜湖研究院 | Epitaxial structure of HEMT device with gallium nitride high-resistance layer and preparation method thereof |
| CN112909077A (en) * | 2021-02-07 | 2021-06-04 | 电子科技大学 | Double-heterojunction polarization-enhanced quasi-longitudinal GaN HEMT device |
| WO2023024550A1 (en) * | 2021-08-27 | 2023-03-02 | 聚能晶源(青岛)半导体材料有限公司 | Enhanced gan-based hemt device, and device epitaxy and preparation method therefor |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090001384A1 (en) * | 2007-06-27 | 2009-01-01 | Toyoda Gosei Co., Ltd. | Group III Nitride semiconductor HFET and method for producing the same |
| US20120315741A1 (en) * | 2011-06-13 | 2012-12-13 | Jie Su | Enhanced magnesium incorporation into gallium nitride films through high pressure or ald-type processing |
| CN103035672A (en) * | 2011-09-28 | 2013-04-10 | 富士通株式会社 | Compound semiconductor device and method of manufacturing the same |
| CN108807510A (en) * | 2018-07-10 | 2018-11-13 | 电子科技大学 | A kind of inverse-impedance type GaN high electron mobility transistor |
-
2020
- 2020-09-15 CN CN202010964501.7A patent/CN112133749A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090001384A1 (en) * | 2007-06-27 | 2009-01-01 | Toyoda Gosei Co., Ltd. | Group III Nitride semiconductor HFET and method for producing the same |
| US20120315741A1 (en) * | 2011-06-13 | 2012-12-13 | Jie Su | Enhanced magnesium incorporation into gallium nitride films through high pressure or ald-type processing |
| CN103035672A (en) * | 2011-09-28 | 2013-04-10 | 富士通株式会社 | Compound semiconductor device and method of manufacturing the same |
| CN108807510A (en) * | 2018-07-10 | 2018-11-13 | 电子科技大学 | A kind of inverse-impedance type GaN high electron mobility transistor |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112713189A (en) * | 2020-12-29 | 2021-04-27 | 西安电子科技大学芜湖研究院 | Epitaxial structure of HEMT device with gallium nitride high-resistance layer and preparation method thereof |
| CN112713189B (en) * | 2020-12-29 | 2022-09-13 | 西安电子科技大学芜湖研究院 | Epitaxial structure of HEMT device with gallium nitride high-resistance layer and preparation method thereof |
| CN112909077A (en) * | 2021-02-07 | 2021-06-04 | 电子科技大学 | Double-heterojunction polarization-enhanced quasi-longitudinal GaN HEMT device |
| CN112909077B (en) * | 2021-02-07 | 2022-03-29 | 电子科技大学 | Double-heterojunction polarization-enhanced quasi-longitudinal GaN HEMT device |
| WO2023024550A1 (en) * | 2021-08-27 | 2023-03-02 | 聚能晶源(青岛)半导体材料有限公司 | Enhanced gan-based hemt device, and device epitaxy and preparation method therefor |
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