CN113496869A - 一种外延基底用硅晶片之背面膜层及制造方法 - Google Patents
一种外延基底用硅晶片之背面膜层及制造方法 Download PDFInfo
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Abstract
本发明提供一种外延基底用硅晶片之背面膜层及制造方法。所述外延基底用硅晶片之背面膜层包括:双层膜,所述双层膜包括直接覆盖在硅晶片背面上的第一层,以及第一层上覆盖的第二层;所述外延基底用硅晶片之背面膜层的制造方法包括:步骤1,将硅晶片背面朝上装炉后,采用三步低温高速化学气相沉积法生长第一层膜;步骤2,将经步骤1后硅晶片正面(抛光面)朝上装炉后,采用低压化学气相沉积法在第一层膜上生长第二层膜。本发明的优势在于:提高了双层膜的膜厚均匀性,增强了背面膜的背封效果,解决了因硅晶片背面膜膜厚不均匀、晶舟印、颗粒等问题对所造成的镜面抛光不良。
Description
技术领域
本发明涉及集成电路技术领域,特别涉及一种外延衬底用硅晶片之背处理方法。
背景技术
现代集成电路的制造往往需要经历数百道工艺,在一个硅晶片上要制作多个微芯片,每个芯片又差不多有数以百万计的器件和互连线路,它们对任何沾污都非常敏感。而硅晶片的加工一般要经过切片、倒角、磨片、腐蚀、抛光、清洗等诸多制程,这些制程中难免会遭受到颗粒、有机物、金属等各种沾污。若在芯片制作的有源区域存在金属沾污,将会导致器件中的氧化物-多晶硅删结构中的结构性缺陷、pn结上漏电流的增加以及少数载流子寿命的减少等诸多问题,进而引起芯片性能的显著下降甚至失效。因此,对衬底材料硅晶片中金属沾污的有效控制,是保证芯片上器件电学性能和提高成品率的重要条件,是现在大规模集成电路工艺中需要着重控制的一个关键因素。
半导体硅晶片中的金属沾污主要为铜的过渡族金属,这些金属的固溶度很低,很容易在硅片中聚集沉积,金属会在硅能带中引入深能级,同时也会诱生出大量的二次缺陷。金属沾污的聚集沉积优先发生在硅片中的异质处,如表面、机械损伤处、点缺陷、位错、层错、氧沉淀等。为了消除金属沾污的不利影响,人为地在硅片非活性区域引入一些缺陷作为吸杂点以使金属沾污在吸杂点沉积,来消除电活性沾污,这是目前控制硅晶片中金属沾污的重要手段,也就是所谓的吸杂技术。
吸杂技术分为内吸杂和外吸杂。内吸杂技术是通过控制直拉硅片的氧沉淀行为,一方面使硅片近表面区域(一般在几十微米以内)不形成氧沉淀,而集成电路的有源区就制作在这一区域;另一方面在硅片体内形成足够高密度的氧沉淀及其诱生缺陷,它们可以把金属沾污从集成电路的有源区吸收到硅片体内并将其固定住,从而有效避免金属沾污对集成电路芯片的危害性。一般而言,硅片体内的氧沉淀及其诱生缺陷的密度越高,内吸杂的能力越强。
外吸杂技术主要是指在硅晶片的背面引入一些缺陷来作为吸杂点吸除金属沾污,主要的方法是通过背处理制程在硅晶片的背面沉积一层多晶硅或通过背面的喷砂处理来引入一些微裂纹作为吸杂点,其他还有如金属膜沉积、溶解物扩散、氮化硅沉积、磷吸杂、激光损伤、氧气等等。
自1977年美国IBM公司发表多晶硅外吸杂专利技术以来,多晶硅外吸杂的效果便得到了广泛的认可。多晶硅吸杂是在硅晶片背面沉积一层不掺杂多晶硅,利用多晶硅的晶格高度无序和晶粒间界起吸杂作用。由于多晶硅外吸杂方法比其他的外吸杂方法得到的硅晶片具有更高的机械强度、更高的洁净度,并且多晶硅层还可增强氧沉淀,即增强内吸杂效果,起到促进内吸杂的作用,因此硅晶片制造的背处理制程中多数采用多晶硅外吸杂技术。
另外,目前双极、CMOS、BiCMOS和VDCMOS等大规模集成电路多数产品工艺使用外延硅晶片,即在抛光硅晶片的表面生长一层单晶外延层。 一般而言,外延沉积的硅晶片是重掺杂的,在外延生长过程,重掺杂片的掺杂剂在高温(1100℃)状态下会从重掺杂片的正面与背面以原子形式扩散进入气相滞留层中,与流动的反应物混合,在外延生长过程中再次掺入到外延层中,产生“自掺杂效应”,致使外延层电阻率下降,影响器件性能。但外延层在硅片正表面生长时,这个效应会减弱,但硅片背面的外扩散仍在继续,在这个高温过程中,如果在硅晶片背面沉积一层薄膜,就能有效组织掺杂剂的向外扩散,这一层就如同密封剂一样防止掺杂剂的逃逸。为有效抑制硅晶片外延生长过程中的“自掺杂效应”,实际生产制造中多采用二氧化硅背封膜,即在硅晶片背面沉积一层高纯SiO2薄膜,对硅晶片背面的掺杂剂起到封闭作用。
因此,集成电路芯片制造用外延衬底之硅晶片的背面处理制程,既要在其背面生长一层多晶硅膜作为吸除源,以有效吸除硅晶片体内的金属杂质,同时也要生长一层二氧化硅膜作为封闭层,以防止硅晶片体内的掺杂剂逸出而导致外延层的自掺杂效应。由此可见,硅晶片的多晶硅外吸杂技术以及二氧化硅背封技术的背处理制程是硅晶片加工的重要制程。
实际生产中,外延衬底硅晶片之背面膜制程后的下一道工序是镜面抛光,因此,外延衬底硅晶片之背面膜的膜厚均匀性及品质,将会直接影响外延衬底硅晶片硅晶片的抛光效果和良率。
发明内容
本发明提供一种外延基底用硅晶片之背面膜层及制造方法,旨在进一步改善现有外延衬底用硅晶片之背面膜品质,提高外延基底用硅晶片背面膜的膜厚均匀性及性能,同时解决因背面膜膜厚不均匀、晶舟印、颗粒等问题导致的镜面抛光不良。
本发明提供一种外延基底用硅晶片之背面膜层及制造方法。所述外延基底用硅晶片之背面膜层包括:双层膜,所述双层膜包括直接覆盖在硅晶片背面上的第一层,以及第一层上覆盖的第二层。
所述外延基底用硅晶片之背面膜层的制造方法包括:步骤1, 将硅晶片背面朝上置于炉内托盘上,采用三步低温高速化学气相沉积法生长第一层膜;步骤2, 将经步骤1后硅晶片正面(抛光面)朝上装炉后,采用低压化学气相沉积法在第一层膜上生长第二层膜。
以上所述外延基底用硅晶片背面双层膜之第一层为二氧化硅膜,第二层为多晶硅膜,并且二氧化硅膜膜厚DSiO2>多晶硅膜膜厚Dp-Si。
执行步骤1,所述外延基底用硅晶片背面双层膜之二氧化硅膜的具体制造方法如下:
(1)将待处理硅晶片背面朝上置于炉内托盘上;
(2)在托盘机械传送速度200~300mm/min、硅晶片表面温度400~450℃的条件下,分三段生长二氧化硅膜,三段中反应混合气体硅烷:氧气体积比均为1∶8~1∶12,二氧化硅膜覆盖在硅晶片背面及边缘区域,三步生长二氧化硅膜膜厚分别满足如下三个函数关系:
d1=q1t1;
d2=q2t2;
d3=q3t3;
其中,t1为第一沉积时间,t2 为第二沉积时间,t3 为第二沉积时间,且t1 = t2 = t3;
d1 为第一膜厚,d2 为第二膜厚,d3 为第三膜厚;
q1为反应混合气体硅烷:氧气的第一流量且0.4≤q1≤0.5ml/min;
q2为反应混合气体硅烷:氧气的第二流量且0.6≤q1≤0.8ml/min;
q3为反应混合气体硅烷:氧气的第二流量且1.0≤q1≤1.2ml/min;
(3)待二氧化硅膜沉积完成并出炉后,进行边缘膜去除。
以上所述执行步骤1 (2)中在反应混合气体流量不同、生长时间相同的条件下分三段生长不同厚度的二氧化硅膜,提高了二氧化硅膜的膜厚均匀性及背封效果。
继执行步骤1后接着执行步骤2。
所述步骤2多晶硅膜的制造方法如下:
(1)将经步骤1后的硅晶片正面(抛光面)朝上装入炉内晶舟中;
(2)在晶舟转速2.0~3.5rpm、硅烷流量150~250sccm/min、炉内温度600~700℃的条件下,沉积多晶硅膜,覆盖在硅晶片整个外表面;
(3)待多晶硅膜沉积完成出炉后,进行边缘抛光。
如上所述,本发明中的外延基底用硅晶片之背面膜层及制造方法,特别采用了不同沉积条件下分三步生长不同厚度二氧化硅膜的制造方法,提高了硅晶片背面双层膜的膜厚均匀性及膜品质,解决了因硅晶片背面膜厚不均匀、晶舟印、颗粒等问题造成的硅晶片镜面抛光不良。
附图说明
附图1 硅晶片及背面膜层横截面示意图。
附图2 硅晶片背面膜制备工艺流程图。
具体实施例
实施例1
待处理硅晶片:经混酸腐蚀并清洗后的200mm硅晶片300片,要求生长二氧化硅总膜厚5000 Å,多晶硅总膜厚3000 Å。
步骤1生长第二层多晶硅膜:
(1)将待处理硅晶片装入低温氧化背封炉;
(2)在托盘机械传送速度210mm/min、硅晶片表面温度430℃、反应混合气体硅烷:氧气均为1:12的条件下,三段反应气体的流量分别设定为0.40ml/min、0.68ml/min、1.10ml/min,控制三段生长时间相同;
(3)待二氧化硅膜沉积完成并出炉后,进行边缘膜去除。
步骤2在二氧化硅膜上继续生长多晶硅膜:
(1)将步骤1完成的硅晶片装入多晶硅背封炉;
(2) 在晶舟转速2.9rpm、硅烷流量210sccm/min、炉内温度630℃的条件下,沉积3000 Å多晶硅膜;
(3)待多晶硅膜沉积完成出炉后,进行边缘抛光。
完成步骤2后,检测背面双层膜,其膜厚不均匀度为2.0%;进一步进行抛光工序,结果表明:在晶舟印对应位置处,出现了2片抛光不良。
实施例2
待处理硅晶片:经混酸腐蚀并清洗后的200mm硅晶片200片,要求生长二氧化硅总膜厚8000 Å,多晶硅总膜厚2000 Å。
步骤1生长第二层多晶硅膜:
(1)将待处理硅晶片装入低温氧化背封炉;
(2)在托盘机械传送速度260mm/min、硅晶片表面温度430℃、反应混合气体硅烷:氧气均为1:8的条件下,三段反应气体的流量分别设定为0.45ml/min、0.70ml/min、1.05ml/min,控制三段生长时间相同;
(3)待二氧化硅膜沉积完成并出炉后,进行边缘膜去除。
步骤2在二氧化硅膜上继续生长多晶硅膜:
(1)将步骤1完成的硅晶片装入多晶硅背封炉;
(2) 在晶舟转速2.9rpm、硅烷流量220sccm/min、炉内温度650℃的条件下,沉积2000 Å多晶硅膜;
(3)待多晶硅膜沉积完成出炉后,进行边缘抛光。
完成步骤2后,检测背面双层膜,其膜厚不均匀度为1.8%;进一步进行抛光工序,结果表明:在晶舟印对应位置处,出现了3片抛光不良。
实施例3
待处理硅晶片:经混酸腐蚀并清洗后的200mm硅晶片200片,要求生长二氧化硅总膜厚3000 Å,多晶硅总膜厚1000 Å。
步骤1生长第二层多晶硅膜:
(1)将待处理硅晶片装入低温氧化背封炉;
(2)在托盘机械传送速度230mm/min、硅晶片表面温度450℃、反应混合气体硅烷:氧气均为1:10的条件下,三段反应气体的流量分别设定为0.48ml/min、0.66ml/min、1.08ml/min,控制三段生长时间相同;
(3)待二氧化硅膜沉积完成并出炉后,进行边缘膜去除。
步骤2在二氧化硅膜上继续生长多晶硅膜:
(1)将步骤1完成的硅晶片装入多晶硅背封炉;
(2) 在晶舟转速3.2rpm、硅烷流量230sccm/min、炉内温度670℃的条件下,沉积1000 Å多晶硅膜;
(3)待多晶硅膜沉积完成出炉后,进行边缘抛光。
完成步骤2后,检测背面双层膜,其膜厚不均匀度为1.6%;进一步进行抛光工序,结果表明:在晶舟印对应位置处,未出现抛光不良品。
实施例4
待处理硅晶片:经混酸腐蚀并清洗后的200mm硅晶片200片,要求生长二氧化硅总膜厚2000 Å,多晶硅总膜厚500 Å。
步骤1生长第二层多晶硅膜:
(1)将待处理硅晶片装入低温氧化背封炉;
(2)在托盘机械传送速度230mm/min、硅晶片表面温度450℃、反应混合气体硅烷:氧气均为1:11的条件下,三段反应气体的流量分别设定为0.44ml/min、0.72ml/min、1.13ml/min,控制三段生长时间相同;
(3)待二氧化硅膜沉积完成并出炉后,进行边缘膜去除。
步骤2在二氧化硅膜上继续生长多晶硅膜:
(1)将步骤1完成的硅晶片装入多晶硅背封炉;
(2) 在晶舟转速3.0rpm、硅烷流量180sccm/min、炉内温度650℃的条件下,沉积800 Å多晶硅膜;
(3)待多晶硅膜沉积完成出炉后,进行边缘抛光。
完成步骤2后,检测背面双层膜,其膜厚不均匀度为1.8%;进一步进行抛光工序,结果表明:在晶舟印对应位置处,未出现抛光不良品。
对比例
待处理硅晶片:经混酸腐蚀并清洗后的200mm硅晶片200片,要求生长二氧化硅总膜厚5000 Å,多晶硅总膜厚2000 Å。
步骤1生长第二层多晶硅膜:
(1)将待处理硅晶片装入低温氧化背封炉;
(2)在托盘机械传送速度230mm/min、硅晶片表面温度450℃、反应混合气体硅烷:氧气均为1:7的条件下,反应混合气体的流量均设定为0.80ml/min,控制生长时间;
(3)待二氧化硅膜沉积完成并出炉后,进行边缘膜去除。
步骤2在二氧化硅膜上继续生长多晶硅膜:
(1)将步骤1完成的硅晶片装入多晶硅背封炉;
(2) 在晶舟转速2.8rpm、硅烷流量230sccm/min、炉内温度650℃的条件下,沉积2000 Å多晶硅膜;
(3)待多晶硅膜沉积完成出炉后,进行边缘抛光。
完成步骤2后,检测背面双层膜,其膜厚不均匀度为5.0%;进一步进行抛光工序,结果表明:在晶舟印对应位置处,出现了29片抛光不良品。
Claims (4)
1.一种外延基底用硅晶片之背面膜层及制造方法:
所述外延基底用硅晶片之背面膜层包括:双层膜,所述双层膜包括直接覆盖在硅晶片背面上的第一层,以及第一层上覆盖的第二层;所述外延基底用硅晶片之背面膜层的制造方法包括:步骤1,将硅晶片背面朝上装炉后,采用三步低温高速化学气相沉积法生长第一层膜;步骤2,将经步骤1后硅晶片正面(抛光面)朝上装炉后,采用低压化学气相沉积法在第一层膜上生长第二层膜。
2.根据权利要求1所述的外延基底用硅晶片之背面膜层,其特征在于,第一层为二氧化硅膜,第二层为多晶硅膜,并且二氧化硅膜膜厚DSiO2>多晶硅膜膜厚Dp-Si。
3.根据权利要求1所述的外延基底用硅晶片之背面膜层,其特征在于,所述步骤1中二氧化硅膜的制造方法如下:
(1)将待处理硅晶片背面朝上装入低温氧化背封炉;
(2)在托盘机械传送速度200~300mm/min、硅晶片表面温度400~450℃的条件下,分三段生长二氧化硅膜,三段中反应混合气体硅烷:氧气体积比均为1∶8~1∶12,二氧化硅膜覆盖在硅晶片背面及边缘区域,三步生长二氧化硅膜膜厚分别满足如下三个函数关系:
d1=q1t1;
d2=q2t2;
d3=q3t3;
其中,t1为第一沉积时间,t2 为第二沉积时间,t3 为第二沉积时间,且t1 = t2 = t3;
d1 为第一膜厚,d2 为第二膜厚,d3 为第三膜厚;
q1为反应混合气体硅烷:氧气的第一流量且0.4≤q1≤0.5ml/min;
q2为反应混合气体硅烷:氧气的第二流量且0.6≤q2≤0.8ml/min;
q3为反应混合气体硅烷:氧气的第三流量且1.0≤q3≤1.2ml/min;
(3)待二氧化硅膜沉积完成并出炉后,进行边缘膜去除。
4.根据权利要求1所述的外延基底用硅晶片之背面膜层,其特征在于,所述步骤2中多晶硅膜的制造方法如下:
(1)将经步骤1后的硅晶片正面(抛光面)朝上装入多晶硅沉积炉内晶舟中;
(2)在晶舟转速2.0~3.5rpm、硅烷流量150~250sccm/min、炉内温度600~700℃的条件下,沉积第二层多晶硅膜,覆盖在硅晶片的整个外表面区域;
(3)待多晶硅膜沉积完成出炉后,进行边缘抛光。
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