CN113410306B - 一种抗总剂量辐射加固ldmos器件结构及制备方法 - Google Patents

一种抗总剂量辐射加固ldmos器件结构及制备方法 Download PDF

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CN113410306B
CN113410306B CN202110663181.6A CN202110663181A CN113410306B CN 113410306 B CN113410306 B CN 113410306B CN 202110663181 A CN202110663181 A CN 202110663181A CN 113410306 B CN113410306 B CN 113410306B
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王成熙
杜欣荣
王清波
赵杰
卓青青
温富刚
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Xian Microelectronics Technology Institute
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    • H01L29/66409Unipolar field-effect transistors
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    • H01L29/66681Lateral DMOS transistors, i.e. LDMOS transistors

Abstract

本发明公开一种抗总剂量辐射加固LDMOS器件结构及制备方法,在衬底硅上间隔设置掺杂层,在掺杂层上端面的边部设置有部分嵌入的场氧化层,能有效提高场开启电压,使其高于工作电压,形成良好的隔离,同时能够减小多晶硅栅极与硅衬底之间的寄生电容;场氧化层内侧紧邻设置嵌入沟道的环状第一接触电极,且场氧化层内侧沉淀栅氧化层;环状第一接触电极上表面设置平整条状的多晶硅栅极,多晶硅栅极两端补分别与环状第一接触电极的对应栅氧化层区域重叠设置,多晶条形带界定了有源区的边界,可挡住注入的离子,注入离子的区域形成有源区。

Description

一种抗总剂量辐射加固LDMOS器件结构及制备方法
技术领域
本发明属于二极管技术领域,具体涉及一种抗总剂量辐射加固LDMOS器件结构及制备方法。
背景技术
横向扩散金属氧化物半导体(LDMOS)是在高压功率集成电路中经常采用的高耐压器件,而常规LDMOS器件通过场氧化层下的漂移区设计提高器件的耐压。
现有技术中的DMOS器件抗总剂量辐照能力较差,如图1-4所示,其具短多晶硅栅极11和较厚的厚场氧化层21,总剂量辐照会导致器件表面覆盖的二氧化硅层绝缘层中诱生正电荷并积累,而辐照诱生氧化层电荷数量与氧化层厚度的指数成正比。
由于LDMOS器件漂移区表面覆盖了厚场氧化层21,总剂量辐照时在漂移区表面氧化层中产生大量的辐照诱生正电荷,在这些诱生电荷产生的电场作用下,N沟道LDMOS器件的N型漂移区表面杂质浓度增加,而P沟道LDMOS器件的P型漂移区表面杂质浓度耗尽甚至反型,进而造成LDMOS器件耐压下降。
发明内容
针对现有技术中存在的抗总剂量辐照能力较弱问题,本发明提供一种抗总剂量辐射加固LDMOS器件结构及制备方法。
本发明是通过以下技术方案来实现:
一种抗总剂量辐射加固LDMOS器件结构,其特征在于,包括衬底硅,衬底硅上设置有掺杂层,掺杂层上表面四周沉淀有凸出设置的场氧化层;
所述场氧化层内侧的掺杂层上表面覆盖栅氧化层;
所述栅氧化层覆盖的掺杂层上表面四周设置有嵌入掺杂层的环状第一接触电极,上表面中部设置有两个条状第二接触电极,分别对应嵌入掺杂层的两个掺杂区;
所述栅氧化层上表面沉积有多晶硅栅极;所述多晶硅栅极两端分别与环状第一接触电极的对应栅氧化层区域重叠设置。
进一步,所述掺杂层中包括间隔设置的P阱和N阱;P阱和N阱接触界面形成PN结,所述多晶硅栅极沿PN结方向设置。
进一步,所述多晶硅栅极位于两个条状第二接触电极之间,并覆盖对应P阱和N阱之间的PN结。
进一步,所述条状第二接触电极平行于P阱和N阱之间的PN结设置。
进一步,所述多晶硅栅极一侧与一个条状第二接触电极的对应栅氧化层区域相邻设置,另一侧与另一个条状第二接触电极的对应栅氧化层区域间隔设置。
进一步,所述栅氧化层的厚度为50nm-100nm。
进一步,所述掺杂层包括依次设置的P阱、N阱和P阱,环状第一接触电极为P型源漏接触电极;两个条状第二接触电极为分别设置在N阱和一个P阱的N型源漏接触电极。
进一步,所述掺杂层包括依次设置的N阱、P阱和N阱,环状第一接触电极为N型源漏接触电极,两个条状第二接触电极为分别设置在P阱和一个N阱的P型源漏接触电极。
一种抗总剂量辐射加固LDMOS器件的制备方法,包括以下步骤:
衬底硅表面生长离子注入预氧层,对其光刻并退火,完成阱掺杂,形成掺杂层;
掺杂层上表面生长垫氧化层并淀积屏蔽氮化硅,光刻形成场氧化窗口;去除表面氮化硅及有源区氧化层;
在场氧化窗口内的边缘处光刻掺杂层形环状第一接触电极,在场氧化窗口内部光刻掺杂层形成条状第二接触电极,并完成源漏杂质注入及去胶,退火完成源漏掺杂;
在场氧化窗口内生长栅氧化层,并在生长栅氧化层上淀积多晶硅,光刻形成多晶硅栅极;完成抗总剂量辐射加固LDMOS器件的制备。
进一步,当衬底硅为N型硅则先光刻形成N阱窗口并完成N型硼杂质注入及去胶,再进行光刻形成P阱窗口并完成P型硼杂质注入及去胶;
当衬底硅为P型硅,则光刻形成P阱窗口并完成P型硼杂质注入及去胶,再进行光刻形成N阱窗口并完成N型硼杂质注入及去胶。
与现有技术相比,本发明具有以下有益的技术效果:
本发明一种抗总剂量辐射加固LDMOS器件结构,在衬底硅上间隔设置掺杂层,在掺杂层上端面的边部设置有部分嵌入的场氧化层,能有效提高场开启电压,使其高于工作电压,形成良好的隔离,同时能够减小多晶硅栅极与硅衬底之间的寄生电容;场氧化层内侧紧邻设置嵌入沟道的环状第一接触电极,且场氧化层内侧沉淀栅氧化层;环状第一接触电极上表面设置平整条状的多晶硅栅极,多晶硅栅极两端补分别与环状第一接触电极的对应栅氧化层区域重叠设置,多晶条形带界定了有源区的边界,可挡住注入的离子,注入离子的区域形成有源区。
进一步,LDMOS器件漂移区表面用薄的栅氧化层,厚度为50nm-100nm取代厚度为400nm以上的厚场氧化层,由于新结构LDMOS器件漂移区表面氧化层的厚度远小于现有LDMOS器件,可大幅减小总剂量辐照在漂移区表面氧化层中产生的辐照诱生电荷的数量,降低氧化层诱生电荷形成的电场强度,进而减少总剂量辐射对LDMOS器件漂移区表面杂质浓度的影响,提高LDMOS器件的抗总剂量辐射能力。
附图说明
图1:现有结构N沟道LDMOS器件顶视图;
图2:现有结构N沟道LDMOS器件纵向剖面图;
图3:现有结构P沟道LDMOS器件顶视图;
图4:现有结构P沟道LDMOS器件纵向剖面图;
图5:本发明中的一种优选实施例辐射加固结构N沟道LDMOS器件顶视图;
图6:本发明中的一种优选实施例辐射加固结构N沟道LDMOS器件纵向剖面图;
图7:本发明中的一种优选实施例辐射加固结构P沟道LDMOS器件顶视图;
图8:本发明中的一种优选实施例辐射加固结构P沟道LDMOS器件纵向剖面图;
图9:本发明具体实施例N型硅表面生长离子注入预氧层步骤示意图;
图10:本发明具体实施例光刻形成N阱窗口并完成N型硼杂质注入及去胶步骤示意图;
图11:本发明具体实施例光刻形成P阱窗口并完成P型硼杂质注入及去胶步骤示意图;
图12:本发明具体实施例退火完成阱掺杂步骤示意图;
图13:本发明具体实施例硅表面生长垫氧化层并淀积屏蔽氮化硅,光刻刻蚀形成场氧化窗口;
图14:本发明具体实施例场氧化,去除表面氮化硅及有源区氧化层步骤示意图;
图15:本发明具体实施例生长栅氧化层,淀积多晶硅,光刻刻蚀形成多晶硅栅极步骤示意图;
图16:本发明具体实施例光刻形成源漏接触窗口并完成N型源漏杂质注入及去胶,退火完成源漏掺杂步骤示意图。
图中:P阱1,场氧化层2,P型源漏接触电极3,N型源漏接触电极4,N阱5,栅氧化层6,多晶硅栅极7,衬底硅8,短多晶硅栅极11,厚场氧化层21。
具体实施方式
下面结合具体的实施例对本发明做进一步的详细说明,所述是对本发明的解释而不是限定。
本发明一种抗总剂量辐射加固LDMOS器件结构,如图5和图6所示,其包括衬底硅8,在衬底硅8上表面设有掺杂层,具体的,掺杂层上间隔设置的P阱1和N阱5;在掺杂层上表面四周沉淀有凸出设置的场氧化层2,形成能够提高场开启的电压,使其高于工作电压,形成良好的隔离,同时减小多晶硅栅极7与硅衬底8之间的寄生电容。
所述场氧化层2内侧的掺杂层上表面覆盖栅氧化层6,所述栅氧化层6覆盖的掺杂层上表面四周设置有嵌入掺杂层的环状第一接触电极,上表面中部设置有嵌入掺杂层的两个条状第二接触电极,分别对应嵌入掺杂层的两个掺杂区;
所述栅氧化层6上表面沉积有多晶硅栅极7;所述多晶硅栅极7两端分别与环状第一接触电极的对应栅氧化层6区域部分重叠设置,形成能够有效抑制短沟道的效应,并保持良好的亚阈值斜率。
栅氧化层6上表面刻蚀有表面平整的多晶硅栅极7,且多晶硅栅极7两端位于环状第一接触电极的对应栅氧化层6的区域,多晶硅栅极7条形带界定了有源区的边界,可挡住注入的离子,注入离子的区域形成有源区。
本发明提供的一种优选实施例为,P阱1和N阱5接触界面形成PN结,所述多晶硅栅极7位于两个条状第二接触电极之间,并覆盖对应P阱1和N阱5之间的PN结。
具体的,多晶硅栅极7一侧与一个条状第二接触电极的对应栅氧化层6区域相邻设置,另一侧与另一个条状第二接触电极的对应栅氧化层6区域间隔设置。
具体的,所述条状第二接触电极平行于PN结设置,并与环状第一接触电极间隔设置。
具体的,LDMOS器件漂移区表面用薄的栅氧化层6,厚度为50nm-100nm取代现有技术中采用的厚度为400nm以上的厚场氧化层21,由于本发明中新结构LDMOS器件漂移区表面氧化层的厚度远小于现有的LDMOS器件,可大幅减小总剂量辐照在漂移区表面氧化层中产生的辐照诱生电荷的数量,降低氧化层诱生电荷形成的电场强度,进而减少总剂量辐射对LDMOS器件漂移区表面杂质浓度的影响,提高LDMOS器件的抗总剂量辐射能力。
具体的,当本系统为PNP型时,掺杂层为依次设置的P阱1、N阱5和P阱1,环状第一接触电极为P型源漏接触电极3,两个条状第二接触电极为分别设置在N阱5和一个P阱1的N型源漏接触电极4;
当本系统为PNP型时,掺杂层为依次设置的N阱5、P阱1和N阱5,环状第一接触电极为N型源漏接触电极4,两个条状第二接触电极为分别设置在P阱1和一个N阱5的P型源漏接触电极3。
本发明一种抗总剂量辐射加固LDMOS器件结构的制备方法,包括以下步骤:
衬底硅8表面生长离子注入预氧层,对其光刻并退火,完成阱掺杂,形成掺杂层;
掺杂层表面生长垫氧化层用于做氮化硅的缓冲,之后淀积屏蔽氮化硅,光刻形成场氧化窗口;去除表面氮化硅及有源区氧化层;
在场氧化窗口内的边缘处光刻掺杂层形环状第一接触电极,在场氧化窗口内部光刻掺杂层形成条状第二接触电极,并完成源漏杂质注入及去胶,退火完成源漏掺杂;
在场氧化窗口内生长栅氧化层6,并在生长栅氧化层6上淀积多晶硅,光刻沉淀形成多晶硅栅极7,完成抗总剂量辐射加固LDMOS器件的制备。
具体的,衬底硅8可以为N型硅或P型硅,在衬底硅8阱掺杂过程中,若衬底硅8为N型硅则先光刻形成N阱窗口并完成N型硼杂质注入及去胶,再进行光刻形成P阱窗口并完成P型硼杂质注入及去胶;
若衬底硅8为P型硅,则光刻形成P阱窗口并完成P型硼杂质注入及去胶,再进行光刻形成N阱窗口并完成N型硼杂质注入及去胶。
本发明提供一种优选实施方式,以N沟道器件为例,包括以下步骤:
衬底硅8为N型硅,在其表面生长离子注入预氧层,如图9所示;光刻形成N阱窗口并完成N型硼杂质注入及去胶过程,如图10所示,光刻形成P阱窗口并完成P型硼杂质注入及去胶过程,如图11所示;之后进行退火并完成阱掺杂,如图12所示,硅表面生长垫氧化层并淀积屏蔽氮化硅,光刻刻蚀形成场氧化窗口,如图13所示;进行场氧化,去除表面氮化硅及有源区氧化层,如图14所示,在场氧化窗口内的边缘处光刻掺杂层形环状第一接触电极,在场氧化窗口内部光刻掺杂层形成条状第二接触电极,并完成源漏杂质注入及去胶,退火完成源漏掺杂;在场氧化窗口内生长栅氧化层6,并在生长栅氧化层6上淀积多晶硅,光刻刻蚀形成多晶硅栅极7,如图15所示,最后光刻形成源漏接触窗口并完成N型源漏杂质注入及去胶,退火完成源漏掺杂,如图16所示,完成抗总剂量辐射加固LDMOS的N沟道器件的制备。
本发明提供一组分别对采用本发明提出的新结构LDMOS器件和现有结构LDMOS器件进行100krad(Si)总剂量辐照试验,如下表格所示:
Figure BDA0003115954500000071
Figure BDA0003115954500000081
从试验结果分析,本发明的结构LDMOS器件源漏击穿电压BVds辐照前后变化量较现有结构LDMOS器件源漏击穿电压BVds辐照前后变化量低,故本发明的结构LDMOS器件具有更高的抗总剂量辐照能力。
具体实施例一:
1.采用形成的辐射加固LDMOS器件结构如下:
所采用的具体参数为:N阱5结深3.5μm,P阱1结深3.5μm,器件沟道长度3μm,漂移区长度4μm,栅氧化层6厚度为80nm,场氧化层2厚度为600nm;
2.采用本发明结构的辐射加固N沟道LDMOS器件源漏击穿电压60V,P沟道LDMOS器件源漏击穿电压-58V。经100krad(Si)总剂量辐照后,N沟道LDMOS器件源漏击穿电压下降约1V,P沟道LDMOS器件源漏击穿电压下降约1V;源漏击穿电压相同的现有的结构N沟道LDMOS器件辐照后源漏击穿电压下降约5V,P沟道LDMOS器件源漏击穿电压下降约1V。新型辐射加固结构的LDMOS器件抗总剂量辐射能力高于现有的结构LDMOS器件。
具体实施例二:
采用形成的辐射加固LDMOS器件结构如下:
1.所采用的具体参数为:N阱5结深2.5μm,P阱1结深2.5μm,器件沟道长度2.5μm,漂移区长度2μm,栅氧化层6厚度为50nm,场氧化层2厚度为600nm;
2.采用本发明工艺方法形成的辐射加固N沟道LDMOS器件源漏击穿电压32V,P沟道LDMOS器件源漏击穿电压-26V。经100krad(Si)总剂量辐照后,N沟道LDMOS器件源漏击穿电压下降约1V,P沟道LDMOS器件源漏击穿电压下降约1V;源漏击穿电压相同的现有的结构N沟道LDMOS器件辐照后源漏击穿电压下降约4V,P沟道LDMOS器件源漏击穿电压下降约1V。新型辐射加固结构的LDMOS器件抗总剂量辐射能力高于现有的结构LDMOS器件。

Claims (3)

1.一种抗总剂量辐射加固LDMOS器件结构,其特征在于,包括衬底硅(8),
衬底硅(8)上设置有掺杂层,掺杂层上表面四周沉淀有凸出设置的场氧化层(2);
所述场氧化层(2)内侧的掺杂层上表面覆盖栅氧化层(6);
所述栅氧化层(6)覆盖的掺杂层上表面四周设置有嵌入掺杂层的环状第一接触电极,上表面中部设置有两个条状第二接触电极,分别对应嵌入掺杂层的两个掺杂区;
所述栅氧化层(6)上表面沉积有多晶硅栅极(7);所述多晶硅栅极(7)两端分别与环状第一接触电极的对应栅氧化层(6)区域重叠设置;
所述掺杂层中包括间隔设置的P阱(1)和N阱(5);P阱(1)和N阱(5)接触界面形成PN结,所述多晶硅栅极(7)沿PN结方向设置;
所述多晶硅栅极(7)位于两个条状第二接触电极之间,并覆盖对应P阱(1)和N阱(5)之间的PN结;
所述条状第二接触电极平行于P阱(1)和N阱(5)之间的PN结设置;
所述多晶硅栅极(7)一侧与一个条状第二接触电极的对应栅氧化层(6)区域相邻设置,另一侧与另一个条状第二接触电极的对应栅氧化层(6)区域间隔设置;
所述栅氧化层(6)的厚度为50nm-100nm;
所述掺杂层包括依次设置的P阱(1)、N阱(5)和P阱(1),环状第一接触电极为P型源漏接触电极(3);两个条状第二接触电极为分别设置在N阱(5)和一个P阱(1)的N型源漏接触电极(4);
或者所述掺杂层包括依次设置的N阱(5)、P阱(1)和N阱(5),环状第一接触电极为N型源漏接触电极(4),两个条状第二接触电极为分别设置在P阱(1)和一个N阱(5)的P型源漏接触电极(3)。
2.一种抗总剂量辐射加固LDMOS器件的制备方法,其特征在于,基于权利要求1所示任意一种抗总剂量辐射加固LDMOS器件结构,包括以下步骤:
衬底硅(8)表面生长离子注入预氧层,对其光刻并退火,完成阱掺杂,形成掺杂层;
掺杂层上表面生长垫氧化层并淀积屏蔽氮化硅,光刻形成场氧化窗口;去除表面氮化硅及有源区氧化层;
在场氧化窗口内的边缘处光刻掺杂层形环状第一接触电极,在场氧化窗口内部光刻掺杂层形成条状第二接触电极,并完成源漏杂质注入及去胶,退火完成源漏掺杂;
在场氧化窗口内生长栅氧化层(6),并在生长栅氧化层(6)上淀积多晶硅,光刻形成多晶硅栅极(7);完成抗总剂量辐射加固LDMOS器件的制备。
3.根据权利要求2所述一种抗总剂量辐射加固LDMOS器件的制备方法,其特征在于,当衬底硅(8)为N型硅则先光刻形成N阱窗口并完成N型硼杂质注入及去胶,再进行光刻形成P阱窗口并完成P型硼杂质注入及去胶;
当衬底硅(8)为P型硅,则光刻形成P阱窗口并完成P型硼杂质注入及去胶,再进行光刻形成N阱窗口并完成N型硼杂质注入及去胶。
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