CN108899282B - 带有电荷平衡结构的沟槽栅场效应晶体管及其制造方法 - Google Patents
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Abstract
本发明涉及一种带有电荷平衡结构的沟槽栅场效应晶体管及其制造方法,属于半导体技术领域。采用了本发明的制造方法,在N‑EPI内埋下一层N‑埋区和P‑埋区,N‑埋区主要用于降低通路电阻,P‑埋区用于辅助N‑埋区在关断状态下的耗尽,从而形成电荷平衡结构,进而将纵向器件的漏极通过N‑埋层和N‑沟槽引出至器件上表面,形成平面器件,可以更好地集成于电路中。且本发明的带有电荷平衡结构的沟槽栅场效应晶体管的生产工艺简便,成本相对低廉,应用范围也相当广泛。
Description
技术领域
本发明半导体技术领域,特别涉及场效应晶体管技术领域,具体是指一种带有电荷平衡结构的沟槽栅场效应晶体管及其制造方法。
背景技术
随着电子信息技术的迅速发展,特别是像时尚消费电子和便携式产品的快速发展,金属氧化物半导体场效应晶体管(MOSFET)等功率器件的需求量越来越大,MOSFET主要分为横向和纵向两种,横向MOSFET的明显优势是其较好的集成性,可以更容易集成到现有技术的工艺平台上,但由于其耐压的漂移区在表面展开,显示出了其最大的不足,占用的面积较大,面积代表成本,耐压越高的器件,劣势越明显。而纵向MOSFET的结构如图1所示,可以很好地避免这一问题,因此,超高压的分立器件仍然以纵向为主。
然而,随着应用电压的不断增大,导通电阻相对于击穿电压呈现2.5次方指数增大,导通电阻大小就决定承受电流能力的大小,进而决定了器件的面积,从而影响成本,在不改变衬底材料的情况下,电荷平衡的概念的引入使得导通相同电压应用下的导通电阻可以得到很大程度的降低,电荷平衡的概念,应用到横向器件,就是我们所说的降低表面电场的RESURF技术,若应用于纵向器件,其实就是我们所熟知的超结技术。如何利用该RESURF技术在纵向沟槽栅结构的器件中实现电荷平衡结构成为本领域亟待解决的问题。
发明内容
本发明的目的是克服了上述现有技术中的缺点,在N-EPI内埋下一层N-Bury区和P-Bury区,N-Bury区主要用于降低通路电阻,P-Bury区用于辅助N-Bury区在关断状态下的耗尽,从而形成带有电荷平衡结构的沟槽栅场效应晶体管,且本发明的器件生产工艺简便,成本相对低廉,应用范围也相当广泛。
为了实现上述的目的,本发明的带有电荷平衡结构的沟槽栅场效应晶体管的制造方法包括以下步骤:
(1)在P-衬底上注入磷,形成N-埋层;
(2)在所述的N-埋层上生长N-外延层;
(3)在器件顶部之上定义有源区,并在器件内设置隔离区;
(4)形成自器件顶部至所述N-埋层的N-沟槽,引出所述N-埋层,作为漏极;
(5)在器件顶部形成沟槽栅,作为栅极;
(6)形成位于所述N-外延层中的P-埋区和N-埋区;
(7)在相邻两个所述沟槽栅之间进行P-体区注入,并退火,形成HVPB区域;
(8)在所述的HVPB区域内沿所述的沟槽栅进行N+注入,并利用后段工艺,形成源极。
该带有电荷平衡结构的沟槽栅场效应晶体管的制造方法中,器件包括两个隔离区和两个N-沟槽,所述的两个N-沟槽分别设置于所述的两个隔离区的外侧。
该带有电荷平衡结构的沟槽栅场效应晶体管的制造方法中,所述的步骤(5)具体包括以下步骤:
(51)在所述的两个隔离区之间刻蚀栅极沟槽;
(52)高温修复所述栅极沟槽的界面;
(53)淀积氧化层覆盖所述的栅极沟槽;
(54)在所述的栅极沟槽内进行多晶硅淀积;
(55)去除多余的氧化层及多晶硅,形成沟槽栅。
该带有电荷平衡结构的沟槽栅场效应晶体管的制造方法中,所述的步骤(6)具体为:在所述N-外延层中,进行硼注入形成硼掺杂的P-埋区,并进行磷注入,形成磷掺杂的N-埋区。
该带有电荷平衡结构的沟槽栅场效应晶体管的制造方法中,所述的P-埋区和N-埋区均位于相邻两个沟槽栅之间的N-外延层的底部,且所述的P-埋区位于所述的N-埋区下方。
本发明还提供一种利用上述方法制成的带有电荷平衡结构的沟槽栅场效应晶体管。
该带有电荷平衡结构的沟槽栅场效应晶体管包括:
P-衬底;
N-埋层,形成于所述的P-衬底上方;
N-外延层,形成于所述的N-埋层上方;
有源区,位于器件顶部之上;
隔离区,设置于器件内;
沟槽栅,设置于器件顶部,作为栅极;
N-沟槽,形成自器件顶部至所述N-埋层,引出所述N-埋层,作为漏极;
P-埋区和N-埋区,形成于所述N-外延层中,用以实现电荷平衡;
HVPB区域,设置于相邻两个所述沟槽栅之间;
源极,利用后段工艺形成于器件顶部。
该带有电荷平衡结构的沟槽栅场效应晶体管包括两个隔离区和两个N-沟槽,所述的两个N-沟槽分别设置于所述的两个隔离区的外侧。
该带有电荷平衡结构的沟槽栅场效应晶体管中,所述的P-埋区为硼注入形成于所述N-外延层中的硼掺杂的P-埋区;所述的N-埋区为磷注入形成于所述N-外延层中的磷掺杂的N-埋区;
该带有电荷平衡结构的沟槽栅场效应晶体管中,所述的P-埋区和N-埋区均位于相邻两个沟槽栅之间的N-外延层的底部,且所述的P-埋区位于所述的N-埋区下方。
采用了该发明的带有电荷平衡结构的沟槽栅场效应晶体管及其制造方法,在N-EPI内埋下一层N-埋区和P-埋区,N-埋区主要用于降低通路电阻,P-埋区用于辅助N-埋区在关断状态下的耗尽,从而形成电荷平衡结构,进而将纵向器件的漏极通过N-埋层和N-沟槽引出至器件上表面,形成平面器件,可以更好地集成于电路中。且本发明的带有电荷平衡结构的沟槽栅场效应晶体管的生产工艺简便,成本相对低廉,应用范围也相当广泛。
附图说明
图1为现有技术的纵向MOSFET的结构示意图。
图2为本发明的带有电荷平衡结构的沟槽栅场效应晶体管的制造方法的步骤流程图。
图3为本发明的制造方法中形成N-埋层的步骤的示意图。
图4为本发明的制造方法中生长N-外延层的步骤的示意图。
图5为本发明的制造方法中定义有源区、隔离区的步骤的示意图。
图6为本发明的制造方法中形成N-沟槽的步骤的示意图。
图7为本发明的制造方法中形成沟槽栅的步骤的示意图。
图8为本发明的制造方法中形成P-埋区和N-埋区的步骤的示意图。
图9为本发明的制造方法中HVPB注入的步骤的示意图。
图10为本发明的带有电荷平衡结构的沟槽栅场效应晶体管的结构示意图。
图11为本发明的带有电荷平衡结构的沟槽栅场效应晶体管在开启状态下的电路路径示意图。
具体实施方式
为了能够更清楚地理解本发明的技术内容,特举以下实施例详细说明。
请参阅图2所示,为本发明的带有电荷平衡结构的沟槽栅场效应晶体管的制造方法的步骤流程图。
在一种实施方式中,该带有电荷平衡结构的沟槽栅场效应晶体管的制造方法包括以下步骤:
(1)如图3所示,在P-衬底上注入磷,形成N-埋层;
(2)如图4所示,在所述的N-埋层上生长N-外延层;
(3)如图5所示,在器件顶部之上定义有源区,并在器件内设置两个隔离区;
(4)如图6所示,形成自器件顶部至所述N-埋层的两个N-沟槽,引出所述N-埋层,作为漏极,所述的两个N-沟槽分别设置于所述的两个隔离区的外侧;
(5)如图7所示,在器件顶部形成沟槽栅,作为栅极;
(6)如图8所示,形成位于所述N-外延层中的P-埋区和N-埋区;
(7)如图9所示,在相邻两个所述沟槽栅之间进行P-体区注入,并退火,形成HVPB区域(High Voltage P-type Body);
(8)在所述的HVPB区域内沿所述的沟槽栅进行N+注入,并利用后段工艺,形成源极,完成如图10所示的器件。
在较优选的实施方式中,所述的步骤(5)具体包括以下步骤:
(51)在所述的两个隔离区之间刻蚀栅极沟槽;
(52)高温修复所述栅极沟槽的界面;
(53)淀积氧化层覆盖所述的栅极沟槽;
(54)在所述的栅极沟槽内进行多晶硅淀积;
(55)去除多余的氧化层及多晶硅,形成沟槽栅。
在更优选的实施方式中,所述的步骤(6)具体为:在所述N-外延层中,进行硼注入形成硼掺杂的P-埋区,并进行磷注入,形成磷掺杂的N-埋区。所述的P-埋区和N-埋区均位于相邻两个沟槽栅之间的N-外延层的底部,且所述的P-埋区位于所述的N-埋区下方。
本发明还提供根据上述方法制成的带有电荷平衡结构的沟槽栅场效应晶体管,如图10所示,其包括:
P-衬底;
N-埋层,形成于所述的P-衬底上方;
N-外延层,形成于所述的N-埋层上方;
有源区,位于器件顶部之上;
两个隔离区,设置于器件内;
沟槽栅,设置于器件顶部,作为栅极;
两个N-沟槽,形成自器件顶部至所述N-埋层,引出所述N-埋层,作为漏极,所述的两个N-沟槽分别设置于所述的两个隔离区的外侧;
P-埋区和N-埋区,形成于所述N-外延层中,用以实现电荷平衡;
HVPB区域,设置于相邻两个所述沟槽栅之间;
源极,利用后段工艺形成于器件顶部。
在优选的实施方式中,所述的P-埋区为硼注入形成于所述N-外延层中的硼掺杂的P-埋区;所述的N-埋区为磷注入形成于所述N-外延层中的磷掺杂的N-埋区;所述的P-埋区和N-埋区均位于相邻两个沟槽栅之间的N-外延层的底部,且所述的P-埋区位于所述的N-埋区下方。
在实际应用中,本发明的带有电荷平衡结构的沟槽栅场效应晶体管的制造方法可以包括以下步骤:
步骤1:如图3所示,在P-sub衬底上注入Phosphor形成N-type埋层(NBL);
步骤2:如图4所示,在形成NBL的wafer上生长N-type外延层;
步骤3:如图5所示,定义有源区以及器件的隔离区(STI);
步骤4:如图6所示,利用高能注入的方式形成N-sink用于NBL的引出,作为漏极;
步骤5:如图7所示,沟槽栅的形成,包含沟槽刻蚀,高温修复界面,栅氧以及多晶硅的淀积与去除;
步骤6:如图8所示,埋区的注入;
步骤7:如图9所示,HVPB注入及退火;
步骤8:如图10所示,source端的N+注入及后段工艺。
其中步骤6是本发明的关键,埋区分两次注入,分别注入硼和磷两种类型的杂质形成两层结构。其中磷的注入是为了增大电流路径上的载流子浓度,进而降低导通电阻,而硼的注入所形成的P-bury用于辅助耗尽N-bury起到电荷平衡作用。
进而本发明将纵向器件的漏极通过NBL和N-sink引至表面,形成平面器件。
本发明提出的带有电荷平衡结构的沟槽栅场效应晶体管,其开启状态下的电路路径如图11中箭头所示。该结构集纵向器件的小面积优势和横向器件的高集成特性于一身,适用范围十分广泛。
采用了该发明的带有电荷平衡结构的沟槽栅场效应晶体管及其制造方法,在N-EPI内埋下一层N-埋区和P-埋区,N-埋区主要用于降低通路电阻,P-埋区用于辅助N-埋区在关断状态下的耗尽,从而形成电荷平衡结构,进而将纵向器件的漏极通过N-埋层和N-沟槽引出至器件上表面,形成平面器件,可以更好地集成于电路中。且本发明的带有电荷平衡结构的沟槽栅场效应晶体管的生产工艺简便,成本相对低廉,应用范围也相当广泛。
在此说明书中,本发明已参照其特定的实施例作了描述。但是,很显然仍可以作出各种修改和变换而不背离本发明的精神和范围。因此,说明书和附图应被认为是说明性的而非限制性的。
Claims (8)
1.带有电荷平衡结构的沟槽栅场效应晶体管的制造方法,其特征在于,该方法包括以下步骤:
(1)在P-衬底上注入磷,形成N-埋层;
(2)在所述的N-埋层上生长N-外延层;
(3)在器件顶部之上定义有源区,并在器件内设置隔离区;
(4)形成自器件顶部至所述N-埋层的N-沟槽,引出所述N-埋层,作为漏极;
(5)在器件顶部形成沟槽栅,作为栅极;
(6)形成位于相邻两个沟槽栅之间的所述N-外延层的底部中的P-埋区和N-埋区,所述的P-埋区位于所述的N-埋区下方,且不与所述的N-埋区接触;
(7)在相邻两个所述沟槽栅之间进行P-体区注入并退火,形成HVPB区域;
(8)在所述的HVPB区域内沿所述的沟槽栅进行N+注入,并利用后段工艺,形成源极。
2.根据权利要求1所述的带有电荷平衡结构的沟槽栅场效应晶体管的制造方法,其特征在于,包括两个隔离区和两个N-沟槽,所述的两个N-沟槽分别设置于所述的两个隔离区的外侧。
3.根据权利要求2所述的带有电荷平衡结构的沟槽栅场效应晶体管的制造方法,其特征在于,所述的步骤(5)具体包括以下步骤:
(51)在所述的两个隔离区之间刻蚀栅极沟槽;
(52)高温修复所述栅极沟槽的界面;
(53)淀积氧化层覆盖所述的栅极沟槽;
(54)在所述的栅极沟槽内进行多晶硅淀积;
(55)去除多余的氧化层及多晶硅,形成沟槽栅。
4.根据权利要求1所述的带有电荷平衡结构的沟槽栅场效应晶体管的制造方法,其特征在于,所述的步骤(6)具体为:在所述N-外延层中,进行硼注入形成硼掺杂的P-埋区,并进行磷注入,形成磷掺杂的N-埋区。
5.一种带有电荷平衡结构的沟槽栅场效应晶体管,其特征在于,利用权利要求1至4中任一项所述的制造方法制成。
6.根据权利要求5所述的带有电荷平衡结构的沟槽栅场效应晶体管,其包括:
P-衬底;
N-埋层,形成于所述的P-衬底上方;
N-外延层,形成于所述的N-埋层上方;
有源区,位于器件顶部之上;
隔离区,设置于器件内;
沟槽栅,设置于器件顶部,作为栅极;
其特征在于,还包括:
N-沟槽,形成自器件顶部至所述N-埋层,引出所述N-埋层,作为漏极;
P-埋区和N-埋区,形成于相邻两个沟槽栅之间的所述N-外延层的底部中,所述的P-埋区位于所述的N-埋区下方,且不与所述的N-埋区接触,用以实现电荷平衡;
HVPB区域,设置于相邻两个所述沟槽栅之间;
源极,利用后段工艺形成于器件顶部。
7.根据权利要求6所述的带有电荷平衡结构的沟槽栅场效应晶体管,其特征在于,包括两个隔离区和两个N-沟槽,所述的两个N-沟槽分别设置于所述的两个隔离区的外侧。
8.根据权利要求6所述的带有电荷平衡结构的沟槽栅场效应晶体管,其特征在于,
所述的P-埋区为硼注入形成于所述N-外延层中的硼掺杂的P-埋区;
所述的N-埋区为磷注入形成于所述N-外延层中的磷掺杂的N-埋区。
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