CN113299558A - Floating gate structure transistor with hafnium disulfide as channel and preparation method thereof - Google Patents
Floating gate structure transistor with hafnium disulfide as channel and preparation method thereof Download PDFInfo
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- NRJVMVHUISHHQB-UHFFFAOYSA-N hafnium(4+);disulfide Chemical compound [S-2].[S-2].[Hf+4] NRJVMVHUISHHQB-UHFFFAOYSA-N 0.000 title claims abstract description 52
- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 108
- 239000000463 material Substances 0.000 claims abstract description 81
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 55
- 229910021389 graphene Inorganic materials 0.000 claims abstract description 52
- 239000002390 adhesive tape Substances 0.000 claims abstract description 37
- 229910052582 BN Inorganic materials 0.000 claims abstract description 34
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 claims abstract description 34
- 238000000034 method Methods 0.000 claims abstract description 34
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 28
- 230000003287 optical effect Effects 0.000 claims abstract description 18
- 239000011248 coating agent Substances 0.000 claims abstract description 17
- 238000000576 coating method Methods 0.000 claims abstract description 17
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 14
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 14
- 239000010703 silicon Substances 0.000 claims abstract description 13
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 12
- 238000000609 electron-beam lithography Methods 0.000 claims abstract description 11
- 229910052737 gold Inorganic materials 0.000 claims abstract description 10
- 239000010931 gold Substances 0.000 claims abstract description 10
- 238000002207 thermal evaporation Methods 0.000 claims abstract description 10
- 238000005516 engineering process Methods 0.000 claims abstract description 9
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 9
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 6
- 239000011521 glass Substances 0.000 claims description 20
- 230000005641 tunneling Effects 0.000 claims description 17
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 16
- 238000004140 cleaning Methods 0.000 claims description 16
- 229920002120 photoresistant polymer Polymers 0.000 claims description 14
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 12
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 8
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 8
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- 239000002648 laminated material Substances 0.000 claims description 5
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- 238000001125 extrusion Methods 0.000 claims description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- 238000007747 plating Methods 0.000 claims description 4
- 238000003825 pressing Methods 0.000 claims description 4
- 230000008569 process Effects 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 238000002791 soaking Methods 0.000 claims description 4
- 238000009210 therapy by ultrasound Methods 0.000 claims description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 4
- IBPNRGHKXLNFKF-UHFFFAOYSA-N bis(sulfanylidene)hafnium Chemical compound S=[Hf]=S IBPNRGHKXLNFKF-UHFFFAOYSA-N 0.000 claims description 2
- 239000002131 composite material Substances 0.000 claims description 2
- 238000003860 storage Methods 0.000 abstract description 16
- 230000000052 comparative effect Effects 0.000 description 6
- 230000005684 electric field Effects 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- BWGNESOTFCXPMA-UHFFFAOYSA-N Dihydrogen disulfide Chemical compound SS BWGNESOTFCXPMA-UHFFFAOYSA-N 0.000 description 1
- 238000005411 Van der Waals force Methods 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 229910052723 transition metal Inorganic materials 0.000 description 1
- -1 transition metal chalcogenide compounds Chemical class 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78681—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising AIIIBV or AIIBVI or AIVBVI semiconductor materials, or Se or Te
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- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
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Abstract
The invention discloses a floating gate structure transistor with hafnium disulfide as a channel and a preparation method thereof. The preparation method is a mechanical stripping method. The method comprises the steps of firstly peeling a film material from a graphene two-dimensional material block by using an England adhesive tape, aligning and adhering the adhesive tape attached with the two-dimensional film material to a special peeling heat release adhesive tape, selecting a uniform layered two-dimensional material with a proper thickness by using an optical microscope, then sequentially peeling boron nitride and hafnium disulfide by using the method, and sequentially transferring the layered two-dimensional material to a silicon/silicon dioxide substrate according to a peeling sequence. And finally, preparing nickel/gold electrodes at two ends of the hafnium sulfide by using an electron beam lithography technology and a thermal evaporation coating instrument. The transistor with the floating gate structure, which is prepared by the invention, not only realizes a two-dimensional floating gate structure, has nonvolatile storage performance, and can sensitively store optical information and electrical information at the same time, but also has high mobility and large on-off ratio.
Description
Technical Field
The invention relates to the technical field of two-dimensional thin film transistor preparation, in particular to a two-dimensional thin film transistor which is optimized by taking graphene as a floating gate layer, boron nitride as a tunneling layer and hafnium disulfide as a channel.
Background
The nonvolatile memory based on the floating gate structure has the advantages of stable and reliable stored information, but with the diversification of information, higher and higher requirements are put forward on the storage of multifunctional devices.
Floating gate-nonvolatile memory devices based on two-dimensional van der waals heterostructures are important devices for the development of digital electronics and optoelectronics in recent years. Compared with the traditional silicon three-dimensional semiconductor, the full-two-dimensional layered material and the heterostructure thereof have excellent nonvolatile storage performance, and have high carrier mobility due to the fact that the atomic plane of the material has no dangling bond. The vertically stacked layers rely on van der waals force interaction and have great potential in improving the integration degree of the device.
It is difficult for a floating gate-nonvolatile memory device based on a two-dimensional van der waals heterostructure to satisfy both sensitive storage of optical information and electrical information. Compared with other two-dimensional transition metal chalcogenide compounds, the indirect band gap layered hafnium disulfide has excellent photoelectric properties, is a good light absorption material, meets various requirements of channel materials of memory devices for storing optical information and electrical information, and can be used in the fields of optics and photoelectrons. The band gap of the layered two-dimensional material hafnium sulfide is about 1.2 eV, and the theoretical mobility can reach 1800 cm2V · s, it can therefore be a candidate material for realizing low power devices. Preparation with layered hafnium disulfide as channel, layered graphene as floating gate and layered boron nitride as tunneling layerThe floating gate structure transistor can realize sensitive storage of optical information and electrical information.
Disclosure of Invention
In view of this, the present invention provides a floating gate transistor with a channel formed by hafnium disulfide and a method for fabricating the same. The floating gate structure transistor applicable to the preparation method takes graphene as a floating gate, boron nitride as a tunneling layer and hafnium disulfide as a channel. According to the method, after the two-dimensional layered material graphene is prepared, the two-dimensional layered material boron nitride and the two-dimensional layered material hafnium sulfide are prepared through the same mechanical stripping method, then the graphene/boron nitride/hafnium disulfide heterojunction floating gate structure is formed through a transfer method, and stable storage of the floating gate-nonvolatile photoelectric storage device based on the two-dimensional van der Waals heterostructure is achieved through the method.
The specific technical scheme for realizing the invention is as follows:
a method for preparing a floating gate structure transistor with a channel made of hafnium disulfide comprises the following specific steps:
step 1: preparing graphene floating gate layer, boron nitride tunneling layer and hafnium disulfide channel layer material
A1: preparation of graphene layered materials
Stripping layered graphene from a graphene block material by using an England adhesive tape, carrying out a plurality of times of overlapping on the adhesive tape to separate the material for a plurality of times, aligning and adhering the separated layered material on a heat release adhesive tape on a glass slide, slightly pressing the heat release adhesive tape for a few seconds by using a finger, and slowly removing the England adhesive tape; observing by using an optical microscope, preliminarily judging the thickness of the graphene laminated material through color, selecting a uniform and light grey semitransparent material, cutting off redundant parts on the heat release adhesive tape by using a small knife, and only reserving the heat release adhesive tape containing the selected laminated graphene to prepare the graphene laminated material;
a2: preparation of boron nitride layered material
Preparing a uniform boron nitride layered material by using the same mechanical stripping method as the step A1;
a3: preparing hafnium disulfide layered material
Preparing a uniform hafnium sulfide layered material by the same mechanical stripping method as in step A1;
step 2: sequentially transferring the graphene floating gate layer, the boron nitride tunneling layer and the hafnium disulfide two-dimensional layered material to a silicon dioxide layer of the silicon substrate;
b1: cleaning of substrates
Selecting a silicon/silicon dioxide substrate, sequentially placing the substrate in acetone and isopropanol, respectively carrying out ultrasonic treatment for 10-15 minutes, and then placing the substrate in a thermostat to dry for 5-10 minutes;
b2: marking of substrates
Coating a layer of photoresist on a cleaned substrate by a spin-coating method, etching a cross mark array on the substrate by adopting an electron beam lithography technology according to a drawn CAD layout, plating a layer of gold on the etched substrate by a thermal evaporation coating machine, wherein the thickness is about 30-35nm, soaking the substrate in acetone for 30-40 minutes to obtain a silicon/silicon dioxide substrate only with the cross mark, and finally cleaning the marked substrate in a plasma cleaning machine to perform clear water treatment to obtain a target substrate; wherein, the power of plasma cleaning is 50-60W, and the cleaning time is 80-100 seconds;
b3: transfer of graphene layered materials
Opening a nitrogen bottle switch connected with the transfer table in an air floating manner, and adjusting the X axis and the Y axis of the transfer table to enable the sample table of the transfer table to be parallel to the plane of the micromanipulator; placing a target substrate on a sample table, and turning on a mechanical pump switch to enable the sample table to adsorb the target substrate; focusing a target substrate by using an optical microscope on a transfer table, searching for a clean part with a cross mark on the target substrate, inversely fixing the glass slide attached with the heat release adhesive tape of the layered graphene sample prepared in the step A1 on a micromanipulator, moving the sample into the visible range of an objective lens, adjusting the focal length of the microscope to focus on the layered material, and adjusting the X-Y axis of the micromanipulator to align the sample with the target substrate; adjusting the Z axis of the micromanipulator to make the glass slide attached with the two-dimensional layered material move downwards slowly, and adjusting the focal length of the microscope in real time in the process to make the microscope focus on the two-dimensional layered material all the time; observing ripples formed by mutual extrusion of the heat release adhesive tape and the substrate when the sample is about to contact with the target substrate, continuously adjusting the Z axis of the micromanipulator to move downwards slowly, indicating that the sample is in contact with the target substrate and attached to the target substrate when the ripples move slowly beyond the sample, then adjusting the Z axis of the micromanipulator to enable the glass slide to move upwards slowly, and indicating that the graphene laminar material is successfully transferred to the target substrate and serves as a floating gate layer of a transistor when the glass slide is far away from the target substrate and a blue laminar thin layer is observed to be attached to the target substrate in a microscope;
b4: transfer of boron nitride layered materials
Transferring the boron nitride layered material prepared in the step A2 to the graphene layer of the target substrate in the same transfer mode as in the step B3, so that the graphene layer is completely covered by the boron nitride layer, and the boron nitride layer is used as a tunneling layer of the transistor;
b5: transfer of hafnium disulfide layered materials
Transferring the prepared hafnium sulfide layer material obtained in the step A3 to the graphene layer/boron nitride layer of the target substrate in the same transfer manner as in the step B3 to serve as a channel material of the transistor, and ensuring that the area of the hafnium sulfide layer is smaller than that of the graphene layer;
and step 3: preparing source and drain electrodes on the surface of composite two-dimensional layered material
C1: CAD drawing tool for drawing electrode shape
Observing the transferred sample by using an optical microscope, taking a picture, placing the shot picture into a CAD drawing tool to align with the cross template, and drawing the shape of the electrode;
c1: processing electrode by electron beam lithography
Coating a layer of photoresist on a target substrate of the transferred sample by a spin-coating method, aligning the cross in the drawn CAD layout with the cross mark on the substrate, and etching an electrode shape on the photoresist by using an electron beam lithography technology;
c2: metal source and drain electrodes of evaporated metal
Putting a sample into a thermal evaporation coating instrument, and respectively evaporating 2 nm nickel and 40 nm gold as a source metal electrode and a drain metal electrode to prepare a floating gate structure transistor with the hafnium disulfide as a channel; wherein:
the thickness of the graphene layer is 8-10 nm, and the length of the graphene layer is at least 10 micrometers; the thickness of the boron nitride layer is 15-20 nm, and the length is at least 20 μm; the hafnium disulphide layer has a thickness of 15-20 nm and a length of at least 8 μm.
The floating gate structure transistor with the channel made of the hafnium disulfide prepared by the method.
Compared with the prior art, the invention has the following greatest advantages: the invention realizes the floating gate-nonvolatile memory device based on the two-dimensional van der Waals heterostructure, can be super-sensitive to light receiving signals and electric signals, and can realize the characteristics of stable storage of information, stable multi-value storage and strong data erasing and writing cycle capability.
Drawings
FIG. 1 is a schematic cross-sectional view of a floating gate transistor with a channel made of hafnium disulfide according to the method of the present invention;
FIG. 2 is a schematic cross-sectional view of a hafnium disulfide channel transistor prepared in a comparative example;
figure 3 is a graph comparing transfer characteristics of hafnium disulfide transistors of the present invention and a comparative example.
Detailed Description
The invention is further illustrated by the following figures, examples and comparative examples.
Referring to fig. 1, the floating gate transistor with the channel formed by the hafnium disulfide according to the embodiment of the present invention includes a gate electrode 6, a dielectric layer 5, a floating gate layer 4, a tunneling layer 3, a two-dimensional channel layer 2, and a metal electrode 1; wherein, the gate electrode 6 is a silicon substrate; the dielectric layer 5 is a silicon dioxide layer; the floating gate layer 4 is a graphene layer; the tunneling layer 3 is a boron nitride layer, and the channel layer 2 is a two-dimensional hafnium disulfide layer; the metal electrode 1 is a nickel/gold source/drain electrode formed by thermal evaporation. The floating gate layer 4, the tunneling layer 3 and the channel layer 2 are two-dimensional materials obtained by transfer through a mechanical stripping method.
The following invention provides preferred examples and comparative examples, but should not be construed as being limited to the examples set forth herein.
Where the reference figures are schematic illustrations of idealized embodiments of the present invention, the illustrated embodiments of the present invention should not be construed as limited to the particular shapes of regions illustrated in the figures. In the present embodiments, all are represented by rectangles, and the representation in the figures is schematic, but this should not be construed as limiting the scope of the invention.
Examples
Preparing a floating gate structure transistor with a channel made of hafnium disulfide:
(1) the method comprises the steps of peeling layered graphene from a graphene block material by using an England adhesive tape, overlapping the adhesive tape for a plurality of times to separate the material for a plurality of times, aligning and adhering the separated layered material on a heat release adhesive tape on a glass slide, slightly pressing the heat release adhesive tape for a few seconds by using a finger, and slowly removing the England adhesive tape. Observing by using an optical microscope, preliminarily judging the thickness of the graphene layered material through color, selecting a uniform and light grey semitransparent material, cutting off redundant parts on the heat release adhesive tape by using a small knife, only reserving the heat release adhesive tape containing the selected layered graphene, and preparing the uniform boron nitride layered material and the uniform hafnium sulfide layered material by using the same mechanical stripping method for later use.
(2) Selecting a silicon/silicon dioxide substrate with the size of about 1cm multiplied by 1cm, wherein the thickness of the silicon dioxide is 285 nm, respectively carrying out ultrasonic treatment on the substrate in sequence in acetone and isopropanol, and then putting the substrate into a thermostat for drying. Coating a layer of photoresist on a cleaned substrate by a spin-coating method, etching a cross mark array on the substrate by adopting an electron beam lithography technology according to a drawn CAD layout, plating a layer of gold with the thickness of about 35nm on the etched substrate by a thermal evaporation coating machine, soaking the substrate in acetone until the photoresist completely falls off to obtain a silicon/silicon dioxide substrate only with the cross mark, and finally cleaning the marked substrate in a plasma cleaning machine for water cleaning treatment.
(3) And opening a nitrogen bottle switch connected with the transfer table in an air floating manner, and adjusting the X axis and the Y axis of the transfer table to enable the sample table of the transfer table to be parallel to the plane of the micromanipulator. And placing the target substrate on a sample table, and turning on a mechanical pump switch to enable the sample table to adsorb the substrate. And (2) searching a clean part with a cross mark on a target substrate by using an optical microscope focusing substrate on a transfer table, inversely fixing the glass slide attached with the graphene sample prepared in the step (1) on a micromanipulator, moving the sample into a visible range of an objective lens, adjusting the focal length of the microscope to focus on the layered material, and adjusting an X-Y axis of the micromanipulator to align the sample with the target substrate. And adjusting the Z axis of the micromanipulator to make the glass slide attached with the two-dimensional layered material move downwards slowly, and adjusting the focal length of the microscope in real time in the process to make the microscope focus on the two-dimensional layered material all the time. When a sample is about to contact with a target substrate, the ripple formed by mutual extrusion of the heat release adhesive tape and the substrate can be observed, the Z axis of the micromanipulator is continuously adjusted to move downwards slowly, when the ripple moves slowly to exceed the sample, the sample is shown to be in contact with the target substrate and attached to the target substrate, then the Z axis of the micromanipulator is adjusted to enable the glass slide to move upwards slowly, and when the glass slide is far away from the target substrate, a blue layered thin layer is observed to be attached to the target substrate in a microscope, the graphene layered material is shown to be successfully transferred to the target substrate and can be used as a floating gate layer of a transistor. The prepared boron nitride layered material is transferred to graphene of a target substrate by the same transfer method to serve as a tunneling layer, and the boron nitride is required to be ensured to completely cover the graphene. And transferring the prepared hafnium disulfide layer material onto graphene/boron nitride of a target substrate by using the same transfer method to serve as a channel material, wherein the area of hafnium sulfide needs to be ensured to be smaller than that of graphene.
(4) The transferred sample was observed with an optical microscope and photographed, the photograph was placed in a CAD drawing tool to align with the cross template and draw the electrode shape. And coating a layer of photoresist on the substrate transferred with the sample by a spin coating method, aligning the cross in the drawn CAD layout with the cross mark on the substrate, and etching an electrode shape on the photoresist by using an electron beam lithography technology. And putting the sample into a thermal evaporation coating instrument, and respectively evaporating 2 nm nickel and 40 nm gold as a source metal electrode and a drain metal electrode until the preparation of the floating gate structure transistor is finished.
Comparative example
Preparation of a transistor with a channel made of hafnium disulfide:
(1) stripping the layered hafnium sulfide from the graphene block material by using the England adhesive tape, overlapping the adhesive tape for a plurality of times to separate the material for a plurality of times, aligning and adhering the separated layered material on the heat release adhesive tape on the glass slide, and slightly pressing the heat release adhesive tape for a plurality of seconds by using a finger to slowly remove the England adhesive tape. Observing by using an optical microscope, preliminarily judging the thickness of the graphene laminated material through color, selecting an even and light gray semitransparent material, cutting redundant parts on the heat release adhesive tape by using a small knife, and only keeping the heat release adhesive tape containing the selected laminated graphene.
(2) Selecting a silicon/silicon dioxide substrate with the area of about 1cm multiplied by 1cm, wherein the thickness of the silicon dioxide is 285 nm, respectively carrying out ultrasonic treatment on the substrate in sequence in acetone and isopropanol, and then putting the substrate into a thermostat for drying. Coating a layer of photoresist on a cleaned substrate by a spin-coating method, etching a cross mark array on the substrate by adopting an electron beam lithography technology according to a drawn CAD layout, plating a layer of gold with the thickness of about 35nm on the etched substrate by a thermal evaporation coating machine, soaking the substrate in acetone until the photoresist completely falls off to obtain a silicon/silicon dioxide substrate only with the cross mark, and finally cleaning the marked substrate in a plasma cleaning machine for water cleaning treatment.
(3) And opening a nitrogen bottle switch connected with the transfer table in an air floating manner, and adjusting the X axis and the Y axis of the transfer table to enable the sample table of the transfer table to be parallel to the plane of the micromanipulator. And placing the target substrate on a sample table, and turning on a mechanical pump switch to enable the sample table to adsorb the substrate. And (2) searching a clean part with a cross mark on a target substrate by using an optical microscope focusing substrate on a transfer table, inversely fixing the glass slide attached with the graphene sample prepared in the step (1) on a micromanipulator, moving the sample into a visible range of an objective lens, adjusting the focal length of the microscope to focus on the layered material, and adjusting an X-Y axis of the micromanipulator to align the sample with the target substrate. And adjusting the Z axis of the micromanipulator to make the glass slide attached with the two-dimensional layered material move downwards slowly, and adjusting the focal length of the microscope in real time in the process to make the microscope focus on the two-dimensional layered material all the time. When a sample is about to contact with a target substrate, the ripples formed by mutual extrusion of the heat release adhesive tape and the substrate can be observed, the Z axis of the micromanipulator is continuously adjusted to move downwards slowly, when the ripples move slowly to exceed the sample, the sample is shown to be in contact with the target substrate and attached to the target substrate, then the Z axis of the micromanipulator is adjusted to enable the glass slide to move upwards slowly, and when the glass slide is far away from the target substrate, a layer of blue layered thin layer is observed to be attached to the target substrate in a microscope, the hafnium sulfide layered material is shown to be successfully transferred to the target substrate and can be used as a channel layer of a transistor.
(4) The transferred sample was observed with an optical microscope and photographed, the photograph was placed in a CAD drawing tool to align with the cross template and draw the electrode shape. And coating a layer of photoresist on the substrate transferred with the sample by a spin coating method, aligning the cross in the drawn CAD layout with the cross mark on the substrate, and etching an electrode shape on the photoresist by using an electron beam lithography technology. And putting the sample into a thermal evaporation coating instrument, and respectively evaporating nickel and gold with certain thicknesses to be used as source and drain metal electrodes, so that the preparation of the transistor with the hafnium disulfide without the floating gate structure as a channel is finished.
The comparison of the electrical parameters of the floating gate structure hafnium disulfide transistor prepared in the example and the floating gate structure-free hafnium disulfide transistor prepared in the comparative example is as follows: table 1 shows the comparison of the electrical parameters of the floating gate structure hafnium disulfide transistor and the floating gate structure hafnium disulfide transistor; fig. 3 is a graph of transfer characteristics of a hafnium disulfide transistor with or without a floating gate structure. Comparing table 1 and fig. 3, it can be seen that, compared with the transistor without the floating gate structure, the floating gate structure transistor prepared by inserting the floating gate layer and the tunneling layer between the two-dimensional semiconductor layer and the gate electrode has the advantages of greatly increased source-drain current, obviously opened storage window, reduced threshold voltage, increased on-off ratio by about 10 times, and increased mobility from 1.27 cm2 V-1 s-1Increased to 4.03 cm2 V-1 s-1. Therefore, the floating gate structure transistor prepared by the invention optimizes the structure of the traditional two-dimensional transistor, obviously improves the electrical performance, opens the storage window and has very important significance for realizing the high-speed storage of photoelectric information in the future.
TABLE 1
| Electrical parameters of transistor | Non-floating gate structure | Floating gate structure |
| On-off ratio | 104 | 105 |
| Mobility (cm)2 V-1 S-1） | 1.27 | 4.03 |
| Threshold voltage (V) | 31.44 | -42.67 |
The tunneling layer of the floating gate structure transistor is formed by two-dimensional boron nitride, the contact of the floating gate structure transistor and the hafnium disulfide of the channel can effectively reduce the influence of an interface state, and the coulomb scattering of a current carrier in the channel is reduced, so that the mobility is improved. The tunneling of channel carriers between the channel layer and the floating gate layer needs to be realized by means of an external electric field, when positive gate voltage is applied, electrons in the channel tunnel through the boron nitride layer to enter the floating gate layer under the action of the electric field, and when negative gate voltage is applied, electrons in the floating gate layer tunnel through the boron nitride layer to enter the channel layer under the action of the electric field, so that the carriers need large energy through the tunneling layer, a transfer characteristic curve of the transistor can form a large storage window, and stable and long-time storage of information can be realized.
Therefore, the floating gate structure transistor with the channel made of the hafnium disulfide is prepared, an oversized storage window is realized, optical information and electrical information can be stored sensitively, the electrical performance of the traditional two-dimensional transistor is improved, and the method has great significance for realizing high-speed storage of photoelectric information in the future.
Claims (2)
1. A preparation method of a floating gate structure transistor with hafnium disulfide as a channel is characterized by comprising the following specific steps:
step 1: preparing graphene floating gate layer, boron nitride tunneling layer and hafnium disulfide channel layer material
A1: preparation of graphene layered materials
Stripping layered graphene from a graphene block material by using an England adhesive tape, carrying out a plurality of times of overlapping on the adhesive tape to separate the material for a plurality of times, aligning and adhering the separated layered material on a heat release adhesive tape on a glass slide, slightly pressing the heat release adhesive tape for a few seconds by using a finger, and slowly removing the England adhesive tape; observing by using an optical microscope, preliminarily judging the thickness of the graphene laminated material through color, selecting a uniform and light grey semitransparent material, cutting off redundant parts on the heat release adhesive tape by using a small knife, and only reserving the heat release adhesive tape containing the selected laminated graphene to prepare the graphene laminated material;
a2: preparation of boron nitride layered material
Preparing a uniform boron nitride layered material by using the same mechanical stripping method as the step A1;
a3: preparing hafnium disulfide layered material
Preparing a uniform hafnium sulfide layered material by the same mechanical stripping method as in step A1;
step 2: sequentially transferring the graphene floating gate layer, the boron nitride tunneling layer and the hafnium disulfide two-dimensional layered material to a silicon dioxide layer of the silicon substrate;
b1: cleaning of substrates
Selecting a silicon/silicon dioxide substrate, sequentially placing the substrate in acetone and isopropanol, respectively carrying out ultrasonic treatment for 10-15 minutes, and then placing the substrate in a thermostat to dry for 5-10 minutes;
b2: marking of substrates
Coating a layer of photoresist on a cleaned substrate by a spin-coating method, etching a cross mark array on the substrate by adopting an electron beam lithography technology according to a drawn CAD layout, plating a layer of gold on the etched substrate by a thermal evaporation coating machine, wherein the thickness is about 30-35nm, soaking the substrate in acetone for 30-40 minutes to obtain a silicon/silicon dioxide substrate only with the cross mark, and finally cleaning the marked substrate in a plasma cleaning machine to perform clear water treatment to obtain a target substrate; wherein, the power of plasma cleaning is 50-60W, and the cleaning time is 80-100 seconds;
b3: transfer of graphene layered materials
Opening a nitrogen bottle switch connected with the transfer table in an air floating manner, and adjusting the X axis and the Y axis of the transfer table to enable the sample table of the transfer table to be parallel to the plane of the micromanipulator; placing a target substrate on a sample table, and turning on a mechanical pump switch to enable the sample table to adsorb the target substrate; focusing a target substrate by using an optical microscope on a transfer table, searching for a clean part with a cross mark on the target substrate, inversely fixing the glass slide attached with the heat release adhesive tape of the layered graphene sample prepared in the step A1 on a micromanipulator, moving the sample into the visible range of an objective lens, adjusting the focal length of the microscope to focus on the layered material, and adjusting the X-Y axis of the micromanipulator to align the sample with the target substrate; adjusting the Z axis of the micromanipulator to make the glass slide attached with the two-dimensional layered material move downwards slowly, and adjusting the focal length of the microscope in real time in the process to make the microscope focus on the two-dimensional layered material all the time; observing ripples formed by mutual extrusion of the heat release adhesive tape and the substrate when the sample is about to contact with the target substrate, continuously adjusting the Z axis of the micromanipulator to move downwards slowly, indicating that the sample is in contact with the target substrate and attached to the target substrate when the ripples move slowly beyond the sample, then adjusting the Z axis of the micromanipulator to enable the glass slide to move upwards slowly, and indicating that the graphene laminar material is successfully transferred to the target substrate and serves as a floating gate layer of a transistor when the glass slide is far away from the target substrate and a blue laminar thin layer is observed to be attached to the target substrate in a microscope;
b4: transfer of boron nitride layered materials
Transferring the boron nitride layered material prepared in the step A2 to the graphene layer of the target substrate in the same transfer mode as in the step B3, so that the graphene layer is completely covered by the boron nitride layer, and the boron nitride layer is used as a tunneling layer of the transistor;
b5: transfer of hafnium disulfide layered materials
Transferring the prepared hafnium sulfide layer material obtained in the step A3 to the graphene layer/boron nitride layer of the target substrate in the same transfer manner as in the step B3 to serve as a channel material of the transistor, and ensuring that the area of the hafnium sulfide layer is smaller than that of the graphene layer;
and step 3: preparing source and drain electrodes on the surface of composite two-dimensional layered material
C1: CAD drawing tool for drawing electrode shape
Observing the transferred sample by using an optical microscope, taking a picture, placing the shot picture into a CAD drawing tool to align with the cross template, and drawing the shape of the electrode;
c1: processing electrode by electron beam lithography
Coating a layer of photoresist on a target substrate of the transferred sample by a spin-coating method, aligning the cross in the drawn CAD layout with the cross mark on the substrate, and etching an electrode shape on the photoresist by using an electron beam lithography technology;
c2: metal source and drain electrodes of evaporated metal
Putting a sample into a thermal evaporation coating instrument, and respectively evaporating 2 nm nickel and 40 nm gold as a source metal electrode and a drain metal electrode to prepare a floating gate structure transistor with the hafnium disulfide as a channel; wherein:
the thickness of the graphene layer is 8-10 nm, and the length of the graphene layer is at least 10 micrometers; the thickness of the boron nitride layer is 15-20 nm, and the length is at least 20 μm; the hafnium disulphide layer has a thickness of 15-20 nm and a length of at least 8 μm.
2. A floating gate structure transistor with a channel made of the hafnium disulfide prepared by the method of claim 1.
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