CN114597254B - MoTe 2 Floating gate transistor, ADC circuit, DAC circuit and method - Google Patents
MoTe 2 Floating gate transistor, ADC circuit, DAC circuit and method Download PDFInfo
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
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Abstract
The invention provides MoTe 2 The floating gate transistor based on molybdenum ditelluride has a nonvolatile characteristic, wherein the floating gate can store resistance information, and the information can be retained even if gate voltage is not applied after the information is written, so that the floating gate transistor has the characteristic of low power consumption. The molybdenum ditelluride used in the invention belongs to a two-dimensional material and is expected to replace a silicon-based CMOS device to become a new-generation semiconductor. In a CMOS circuit based on a silicon-based transistor, an ADC and a DAC are common signal conversion units in a chip, the molybdenum ditelluride two-dimensional material semiconductor applied to the ADC and the DAC can replace the traditional silicon-based CMOS device, and in the field of two-dimensional material semiconductors, the impedance matching problem of other circuit modules based on the two-dimensional material semiconductor and the ADC and the DAC can be effectively solved, and the compatibility problem of large-scale integration of the two-dimensional material semiconductor device is expected to be solved.
Description
Technical Field
The invention belongs to the field of two-dimensional material semiconductors, and particularly relates to MoTe 2 A floating gate transistor, an ADC circuit, a DAC circuit and a method.
Background
In the information age today, especially in the information technology based on integrated circuits, the most common information carriers comprise two types: digital signals and analog signals. The digital signal is based on 0/1 logic and is discrete signal, while the analog signal is a continuously varying signal. However, in various electronic devices, the design architecture, signal processing mode and transmission mode are different for different signal types. Therefore, in the digital circuit system and the analog circuit system, the digital signal and the analog signal cannot be commonly used. In order to address the limitations of signal transmission in different systems, an "interface" must be required to implement the signal conversion. The process of converting analog quantity into Digital quantity is referred to as AD conversion, and the circuit for completing the conversion is referred to as an analog-to-Digital converter (adc); the process of converting digital to Analog is called DA conversion, and the circuit that performs this conversion is called a digital-to-Analog converter (dac). By using the ADC and DAC circuits, the circuit system can realize the detection, operation and control of analog quantities such as temperature, pressure, flow, speed and the like, and can also convert digital quantities into analog quantities such as audio signals and the like, so that the ADC and DAC are widely applied to integrated circuit systems.
The ADC analog-to-digital conversion process includes four steps, i.e., sampling, holding, quantizing, and encoding. Since a certain time is required for the ADC to perform an analog-to-digital conversion, only a limited number of analog signals can be converted into digital signals, which requires sampling of the analog signals. In order to ensure the accuracy of the conversion, it is required that the sample value is kept constant during the conversion, which is the sample-and-hold process. The output signal of the sample-and-hold circuit is still analog, if a measurement unit is used to measure and take its integer, then this integer value is represented by a set of binary codes, which is the quantization-coding process. The commonly used ADCs include an integral type, a successive approximation type, a sigma-delta modulation type, a capacitor array successive approximation type, and a voltage-frequency conversion type. The DAC mainly comprises a digital register, an analog electronic switch, a weight resistance network, a summing operational amplifier and a reference voltage source (or constant current source). The analog electronic switches of corresponding bits are controlled by using each bit digital code of digital quantity stored in digital register, so that the bit with digital code 1 can produce current value in direct proportion to its bit weight on weight resistance network, then the current values are summed by operational amplifier and converted into voltage value.
At the present stage, since silicon-based electronic devices occupy the leading position in the semiconductor field, ADC and DAC devices are also prepared from silicon-based devices to realize their functions. However, as the two-dimensional material gradually shows the possibility of future development in the semiconductor field, this also means that more and more circuit module functions need to be implemented by the two-dimensional material semiconductor, so as to solve the problems of impedance matching, process compatibility and the like of the two-dimensional semiconductor device. However, in many two-dimensional materials, not all devices are suitable for preparing ADC/DAC, and good ohmic contact cannot be realized because of Schottky junctions existing between metal electrodes and gold half-contacts of part of two-dimensional materials; in addition, due to the bandwidth requirement of ADC/DAC, it also requires the two-dimensional material to have stable performance under high frequency signals.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide MoTe 2 A floating gate transistor, an ADC circuit, a DAC circuit and a method aim to provide an application idea of a two-dimensional material semiconductor in a peripheral circuit, promote the application of the two-dimensional material semiconductor, and have relatively good device performance.
To achieve the above object, in a first aspect, the present invention provides a MoTe 2 A floating gate transistor, comprising: substrate, back gate electrode, gate dielectric layer, floating gate electrode, tunneling layer and MoTe 2 A layer, a source electrode, and a drain electrode;
the back gate electrode, the gate dielectric layer, the floating gate electrode, the tunneling layer and the MoTe 2 The layers are sequentially stacked on the substrate; the floating gate electrodeThe area and the thickness of the floating gate electrode are respectively smaller than those of the tunneling layer, and the floating gate electrode is buried in the tunneling layer;
the MoTe 2 The source electrode and the drain electrode are prepared at two ends of the upper surface of the layer, and a channel region is formed between the source electrode and the drain electrode; the MoTe 2 The floating gate transistor is a two-dimensional material semiconductor device; MoTe 2 For bipolar materials, MoTe is controlled by controlling the polarity and magnitude of the gate voltage applied to the back gate electrode 2 The type of floating gate transistor carriers; due to the action of the floating gate electrode, when a gate voltage is applied to the back gate electrode, the carriers tunnel through the tunneling layer and are stored in the floating gate electrode, and after the gate voltage is removed, the carriers cannot tunnel back.
In an alternative example, the substrate is a silicon wafer with silicon oxide;
the back gate electrode is made of Cr and Au;
the gate dielectric layer is made of Al 2 O 3 Or HfO 2 ;
The floating gate electrode is made of Au;
the tunneling layer is made of Al 2 O 3 Or HfO 2 ;
The source and drain electrode materials include Cr and Au.
In an optional example, the thickness of the gate dielectric layer is 20nm-30 nm; the thickness of the floating gate electrode is 4nm-6 nm; the thickness of the tunneling layer is 6nm-10 nm; the thickness of the molybdenum ditelluride MoTe2 layer is 0.7nm-5 nm.
In a second aspect, the present invention provides a MoTe 2 The preparation method of the floating gate transistor comprises the following steps:
spin-coating a layer of photoresist on a silicon wafer substrate with silicon oxide, patterning the photoresist, then evaporating a metal electrode as a back gate electrode in a corresponding area by using an electron beam, and finally removing redundant photoresist;
preparation of Al on surface of back gate electrode by utilizing atomic layer deposition method 2 O 3 A grid dielectric layer, then spin-coating photoresist on the surface of the grid dielectric layer,patterning the photoresist, evaporating a gold film with a first preset thickness and a first preset area on the surface of the patterned photoresist, wherein the area of the gold film is smaller than that of the gate dielectric layer, and removing the residual photoresist to obtain a floating gate electrode; finally, depositing Al on the upper surfaces of the gate dielectric layer and the floating gate electrode by utilizing an atomic layer deposition method 2 O 3 As a tunneling layer, the upper surface of the tunneling layer is parallel to the upper surface of the substrate;
will be attached with MoTe 2 Cutting a copper foil of the material into a preset size, then spin-coating polymethyl methacrylate (PMMA) on the surface of the copper foil, heating the copper foil after the spin-coating is finished, and then utilizing FeCl 3 Etching the copper foil with the solution, and taking out the PMMA to obtain MoTe 2 Then MoTe is transferred by a transfer platform 2 The two-dimensional material is transferred to the upper surface of the tunneling layer at fixed points and patterned by a reactive ion etching method to obtain MoTe 2 A layer;
in MoTe by photoetching and electron beam evaporation process 2 And preparing a source electrode and a drain electrode on the surface of the layer, and controlling the preparation interval of the two electrodes to form a channel region between the source electrode and the drain electrode.
In an optional example, the material of the gate dielectric layer and the tunneling layer may also adopt hafnium oxide.
In a third aspect, the present invention provides a MoTe based on the first aspect 2 A DAC circuit of floating gate transistors, comprising: the device comprises a weight resistor network, an operational amplifier, a reference power supply and an analog switch;
the weight resistor network is formed by connecting a plurality of stages of resistors in parallel, the resistance values of the resistors are changed in equal proportion step by step, and the resistors are MoTe provided by the first aspect 2 Floating gate transistor acting as, the MoTe 2 The resistance value of the floating gate transistor is regulated and controlled through the grid voltage; from said MoTe 2 The DAC circuit with the floating gate transistor serving as the resistor has good current stability under high frequency and relatively wide bandwidth.
In a fourth aspect, the present invention provides an ADC circuit based on the above third aspect, including: a sampling circuit, a register and a comparator; the sampling circuit is implemented by the DAC circuit provided in the third aspect.
In a fifth aspect, the present invention provides a MoTe base on the first aspect 2 The design method of the DAC circuit of the floating gate transistor comprises the following steps: selecting MoTe provided in the first aspect 2 The floating gate transistor acts as a resistor of a weighted resistor network in the DAC circuit.
In a sixth aspect, the present invention provides a method for designing an ADC circuit of a DAC circuit based on the third aspect, including the steps of: the sampling circuit in the ADC circuit is implemented by using the DAC circuit provided in the third aspect.
Generally, compared with the prior art, the above technical solution conceived by the present invention has the following beneficial effects:
the invention provides MoTe 2 The floating gate transistor based on molybdenum ditelluride has a nonvolatile characteristic, wherein the floating gate can store resistance information, and the information can be retained even if gate voltage is not applied after the information is written, so that the floating gate transistor has the characteristic of low power consumption. The molybdenum ditelluride used in the invention belongs to a two-dimensional material, is a material with electrons capable of freely moving only on the nano-scale of two dimensions in a plane, is formed by stacking single-layer or multi-layer materials with atomic-level thickness, has extremely small size and large on-off ratio, is a new material with application prospect in the field of semiconductors, and is expected to replace silicon-based CMOS (complementary metal oxide semiconductor) devices to become a new-generation semiconductor. In a CMOS circuit based on a silicon-based transistor, an ADC and a DAC are common signal conversion units in a chip, the molybdenum ditelluride two-dimensional material semiconductor provided by the invention can be applied to the ADC and the DAC to replace the traditional silicon-based CMOS device, and because the molybdenum ditelluride two-dimensional material semiconductor is a homogeneous device, the impedance matching problem of a circuit module based on the two-dimensional material semiconductor and the ADC and the DAC can be effectively solved in the field of the two-dimensional material semiconductor, and the compatibility problem of large-scale integration of the two-dimensional material semiconductor device is expected to be solved.
The invention provides MoTe 2 Floating gate transistor, ADC circuit, DAC circuit and method, MoTe 2 Has good ohmic contact with the source and drain electrodes, and its band gap is in contact with silicon phaseCompared with zero-band-gap graphene, the graphene is more suitable for being used as a CMOS device, and the graphene is zero-band-gap and belongs to a semi-metal material, electrons can move freely and can not be turned off, so that the graphene is not suitable for being used as a CMOS device; WSe (tungsten diselenide) relative to WSe which is a bipolar material 2 The Schottky junction exists at the contact position of the source electrode and the drain electrode of the tungsten diselenide, the voltage and the current output are not linear, the resistance is not stable, and the molybdenum ditelluride can form good ohmic contact, so that the current output curve is linear; compared with the bandwidth of a floating gate transistor adopting molybdenum disulfide, the bandwidth of the molybdenum ditelluride floating gate transistor applied to the ADC/DAC circuit is wider, and the stability of current under high frequency is better. In conclusion, the two-dimensional material MoTe provided by the invention 2 The floating gate transistor is more suitable for DAC circuits and ADC circuits than other two-dimensional materials.
Drawings
FIG. 1 shows MoTe provided in the embodiments of the present invention 2 And the structure of the floating gate field effect transistor device is schematically shown.
Fig. 2 is a schematic diagram of a 6-bit DAC circuit according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of a 6-bit ADC circuit according to an embodiment of the present invention.
FIG. 4 shows MoTe provided in the embodiment of the present invention 2 And (3) a preparation flow chart of the floating gate field effect transistor.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The invention aims to provide MoTe with nonvolatile characteristic 2 And the floating gate field effect transistor is used for realizing a sampling circuit of the ADC and a weight resistance network module of the DAC based on the transistor. As shown in fig. 1, due to the action of the floating gate layer, electrons or holes tunnel through the tunneling layer under the action of the back gate voltage and are stored in the floating gate electrode, and after the back gate voltage is removed, the electrons or holes cannot tunnel back. Thus through the back gateResistance information can be written to the floating gate, and information can be erased only by applying voltages of opposite polarity. Therefore, the device has the characteristic of low power consumption because the grid voltage does not need to be continuously applied and information cannot be erased after power is off. By utilizing the characteristic, the invention utilizes MoTe 2 The floating gate field effect transistor replaces resistors in the weighting resistor network module of the DAC and the ADC sampling circuit, and the circuit schematic diagrams are shown in figures 2 and 3. In order to achieve the above purpose, the device of the present invention is prepared by the following steps as shown in fig. 4:
preparing a back gate electrode: firstly, clean Si/SiO 2 Spin-coating a layer of photoresist on the surface of a silicon wafer, patterning the photoresist by using a photoetching process, evaporating a layer of gold film on the surface of the photoresist by using Electron Beam Evaporation (EBE), and removing the photoresist and the redundant gold film by using a lift-off process to obtain a patterned back gate electrode.
Preparing a gate dielectric layer, a floating gate and a tunneling layer: preparing an alumina gate dielectric layer with the thickness of 20nm by utilizing Atomic Layer Deposition (ALD), then coating photoresist on the surface of the gate dielectric layer in a spinning mode, patterning the photoresist by utilizing a photoetching process, and evaporating a layer of gold film on the surface of the photoresist by utilizing EBE. And removing the redundant photoresist by using a lift-off process to obtain the patterned floating gate electrode. And finally, preparing aluminum oxide with the thickness of 7nm as a tunneling layer by using an atomic layer deposition process.
Transfer of MoTe 2 Materials: large area of MoTe 2 The material is prepared by growing on a copper foil substrate through chemical vapor deposition, and MoTe is transferred through a wet method 2 The material was transferred to the alumina surface and patterned using reactive ion etching.
Preparing a source drain electrode and a metal interconnection line: and finally, preparing the source and drain electrodes by using the same photoetching and electron beam evaporation process.
Preferably, in the step (1), attention is paid to selecting proper photoresist spin-coating rotation speed, photoetching time and metal type and thickness of electron beam evaporation.
Preferably, step (2) requires selecting appropriate tunneling layer and gate dielectric thickness.
Preferably, an antistatic adhesive tape is required to fix the edge of the material in the wet transfer process in the step (3), so that the material is not easy to wrinkle after the copper foil is etched.
The invention designs a method for utilizing MoTe with nonvolatile characteristic 2 A floating gate field effect transistor. The process flow of the present invention is specifically described below with reference to specific examples:
preparation of a back gate electrode: firstly, spin-coating a layer of photoresist on a silicon wafer with silicon oxide, wherein the photoresist homogenizing process is completed in two steps, the first step is to homogenize the photoresist at the rotating speed of 1500r/min for 15s, the second step is to homogenize the photoresist at the rotating speed of 4000r/min for 30s, and after the photoresist is homogenized, the photoresist is baked at the temperature of 90-100 ℃ for 60 s. The photoresist was then patterned using an MJB4 lithography machine and reticle with an exposure time of 28 s. And then evaporating the metal electrode Cr6nm/Au40nm by using Electron Beam Evaporation (EBE), removing the residual photoresist by soaking the silicon wafer in a Dimethylformamide (DMF) or acetone solution, cleaning the silicon wafer by using deionized water, and drying the silicon wafer for 30s to finish the preparation of the back gate electrode.
Preparing a gate dielectric layer, a floating gate and a tunneling layer: preparation of 20nm thick Al using Atomic Layer Deposition (ALD) 2 O 3 And (3) a grid dielectric layer, then, coating photoresist on the surface of the grid dielectric layer in a spinning mode, carrying out photoresist patterning by utilizing photoetching and a mask plate, evaporating a gold film with the thickness of 6nm on the surface of the photoresist by using EBE (electron beam lithography), and removing the residual photoresist by using DMF (dimethyl formamide) solution to obtain a floating grid electrode. Finally, ALD is used to deposit 7nm thick Al 2 O 3 As the tunneling layer, the thickness of the tunneling layer is controlled between 5-10nm, and 7nm is suitable in this case.
Transfer of MoTe 2 Materials: MoTe 2 The material is transferred to the surface of alumina by means of wet transfer, and MoTe is attached to the material firstly 2 The copper foil is cut into the size of 1cm multiplied by 1cm, then polymethyl methacrylate (PMMA) is coated on the surface of the copper foil in a spin mode, the first glue homogenizing rotating speed is 1000r/min, the glue homogenizing time is 10s, the second glue homogenizing rotating speed is 2000r/min, the glue homogenizing time is 60s, and after the spin coating is finished, the copper foil is heated on a heating table at 160 ℃ for 3.5 min. Then, a circle of antistatic adhesive tape is pasted around the copper foil for fixing PMMA, and FeCl is utilized 3 The solution etches away the copper foil and then PMThe MA was scooped up, then the two-dimensional material was transferred through the slide to the alumina surface at fixed points using a transfer platform and then patterned using reactive ion etching.
Preparing a source drain electrode: finally, the preparation process similar to that of the back gate electrode is utilized to prepare the metal oxide semiconductor on MoTe 2 And preparing Cr6nm/40nmAu source and drain electrodes on the surface to realize good ohmic contact.
Specifically, the molybdenum ditelluride is more suitable for being used as DAC/ADC compared with other two-dimensional materials, and experiments show that the tungsten diselenide WSe is a bipolar material 2 The molybdenum ditelluride has good ohmic contact with the source and drain electrodes, and the band gap of the molybdenum ditelluride is similar to that of silicon, so that the molybdenum ditelluride is more suitable for being used as a CMOS (complementary metal oxide semiconductor) device compared with zero-band-gap graphene.
The molybdenum ditelluride-based floating gate transistor has a nonvolatile characteristic in which a floating gate can store resistance information and retain information even without applying a gate voltage after information is written, thereby having a characteristic of low power consumption. The molybdenum ditelluride used in the invention belongs to a two-dimensional material, is a material with electrons capable of freely moving only on the nanometer scale of two dimensions (in a plane), is formed by stacking single-layer or multi-layer materials with atomic-level thickness, has extremely small size and large on-off ratio, is a new material with wide application prospect in the field of semiconductors, and is expected to replace silicon-based CMOS devices to become a new-generation semiconductor. In CMOS circuits based on silicon-based transistors, ADCs and DACs are common signal conversion units in the chip. The invention provides a method for realizing ADC and DAC by using a two-dimensional material semiconductor to replace the traditional silicon-based CMOS device, so that the problems of impedance matching and process compatibility of other circuit modules based on the two-dimensional material semiconductor and ADC and DAC can be effectively solved in the field of the two-dimensional material semiconductor, and the compatibility problem of large-scale integration of the two-dimensional material semiconductor device is expected to be solved.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (9)
1. MoTe 2 A floating gate transistor, comprising: substrate, back gate electrode, gate dielectric layer, floating gate electrode, tunneling layer and MoTe 2 A layer, a source electrode, and a drain electrode;
the back gate electrode, the gate dielectric layer, the floating gate electrode, the tunneling layer and the MoTe 2 The layers are sequentially stacked on the substrate; the area and the thickness of the floating gate electrode are respectively smaller than those of the tunneling layer, and the floating gate electrode is buried in the tunneling layer;
the MoTe 2 The source electrode and the drain electrode are prepared at two ends of the upper surface of the layer, and a channel region is formed between the source electrode and the drain electrode; the MoTe 2 The floating gate transistor is a two-dimensional material semiconductor device; MoTe 2 For bipolar materials, MoTe is controlled by controlling the polarity and magnitude of the gate voltage applied to the back gate electrode 2 The type of floating gate transistor carriers; due to the action of the floating gate electrode, when a gate voltage is applied to the back gate electrode, the carriers tunnel through the tunneling layer and are stored in the floating gate electrode, and after the gate voltage is removed, the carriers cannot tunnel back; the floating gate electrode is made of Au; the tunneling layer is made of Al 2 O 3 Or HfO 2 。
2. MoTe according to claim 1 2 The floating gate transistor is characterized in that the substrate is a silicon wafer with silicon oxide;
the back gate electrode is made of Cr and Au;
the gate dielectric layer is made of Al 2 O 3 Or HfO 2 ;
The source and drain electrode materials include Cr and Au.
3. MoTe according to claim 1 2 The floating gate transistor is characterized in that the thickness of the gate dielectric layer is 20nm-30 nm; the thickness of the floating gate electrode is 4nm-6 nm; the thickness of the tunneling layer is 6nm-10 nm; the thickness of the MoTe2 layer is 0.7nm-5 nm.
4. MoTe 2 The preparation method of the floating gate transistor is characterized by comprising the following steps of:
spin-coating a layer of photoresist on a silicon wafer substrate with silicon oxide, patterning the photoresist, then evaporating a metal electrode as a back gate electrode in a corresponding region by using an electron beam, and finally removing redundant photoresist;
preparing Al on the surface of a back gate electrode by utilizing an atomic layer deposition method 2 O 3 A gate dielectric layer, wherein photoresist is coated on the surface of the gate dielectric layer in a spinning mode, the photoresist is patterned, a gold film with a first preset thickness and a first preset area is evaporated on the surface of the patterned photoresist, the area of the gold film is smaller than that of the gate dielectric layer, and the residual photoresist is removed to obtain a floating gate electrode; finally, depositing Al on the upper surfaces of the gate dielectric layer and the floating gate electrode by utilizing an atomic layer deposition method 2 O 3 As a tunneling layer, the upper surface of the tunneling layer is parallel to the upper surface of the substrate;
will be attached with MoTe 2 Cutting a copper foil of the material into a preset size, then spin-coating polymethyl methacrylate (PMMA) on the surface of the copper foil, heating the copper foil after the spin-coating is finished, and then utilizing FeCl 3 Etching the copper foil with the solution, and taking out the PMMA to obtain MoTe 2 Then MoTe is transferred by a transfer platform 2 The two-dimensional material is transferred to the upper surface of the tunneling layer at fixed points and patterned by adopting a reactive ion etching method to obtain MoTe 2 A layer;
in MoTe by photoetching and electron beam evaporation process 2 And preparing a source electrode and a drain electrode on the surface of the layer, and controlling the preparation interval of the two electrodes to form a channel region between the source electrode and the drain electrode.
5. The method according to claim 4, wherein the gate dielectric layer and the tunneling layer are made of hafnium oxide.
6. A DAC circuit, comprising: the device comprises a weight resistor network, an operational amplifier, a reference power supply and an analog switch;
the weight resistor network is formed by connecting a plurality of stages of resistors in parallel, the resistance values of the resistors are changed in equal proportion step by step, and the resistors are MoTe according to any one of claims 1 to 3 2 Floating gate transistor serving as, the MoTe 2 The resistance value of the floating gate transistor is regulated and controlled through the grid voltage; from said MoTe 2 The DAC circuit with the floating gate transistor serving as the resistor has good current stability at high frequency and relatively wide bandwidth.
7. An ADC circuit, comprising: a sampling circuit, a register and a comparator; the sampling circuit is implemented by the DAC circuit of claim 6.
8. A design method of a DAC circuit is characterized by comprising the following steps: selecting MoTe according to any one of claims 1 to 3 2 The floating gate transistor acts as a resistor of a weighted resistor network in the DAC circuit.
9. A design method of an ADC circuit is characterized by comprising the following steps: a sampling circuit in an ADC circuit implemented using the DAC circuit of claim 6.
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