CN113292039A - MEMS silicon-based cavity circulator/isolator circuit film layer structure and preparation method - Google Patents
MEMS silicon-based cavity circulator/isolator circuit film layer structure and preparation method Download PDFInfo
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- CN113292039A CN113292039A CN202110599002.7A CN202110599002A CN113292039A CN 113292039 A CN113292039 A CN 113292039A CN 202110599002 A CN202110599002 A CN 202110599002A CN 113292039 A CN113292039 A CN 113292039A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 58
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 58
- 239000010703 silicon Substances 0.000 title claims abstract description 58
- 238000002360 preparation method Methods 0.000 title abstract description 6
- 239000010931 gold Substances 0.000 claims abstract description 38
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 37
- 229910052737 gold Inorganic materials 0.000 claims abstract description 37
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 33
- 239000010949 copper Substances 0.000 claims abstract description 32
- 229910052802 copper Inorganic materials 0.000 claims abstract description 31
- 230000004888 barrier function Effects 0.000 claims abstract description 22
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims abstract description 18
- 238000002955 isolation Methods 0.000 claims abstract description 17
- 230000037452 priming Effects 0.000 claims abstract description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 20
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 19
- 239000010936 titanium Substances 0.000 claims description 19
- 229910052719 titanium Inorganic materials 0.000 claims description 19
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 15
- 239000011651 chromium Substances 0.000 claims description 13
- 229910052804 chromium Inorganic materials 0.000 claims description 12
- 239000000377 silicon dioxide Substances 0.000 claims description 10
- 238000000137 annealing Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 9
- 235000012239 silicon dioxide Nutrition 0.000 claims description 9
- 238000011068 loading method Methods 0.000 claims description 7
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 230000001590 oxidative effect Effects 0.000 claims description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- 238000009713 electroplating Methods 0.000 claims description 4
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- 238000000059 patterning Methods 0.000 claims description 4
- 238000001259 photo etching Methods 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- 238000001704 evaporation Methods 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 238000003780 insertion Methods 0.000 abstract description 11
- 230000037431 insertion Effects 0.000 abstract description 11
- 239000010408 film Substances 0.000 description 115
- 238000004544 sputter deposition Methods 0.000 description 26
- 238000011056 performance test Methods 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 6
- 235000012431 wafers Nutrition 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000007731 hot pressing Methods 0.000 description 2
- QRJOYPHTNNOAOJ-UHFFFAOYSA-N copper gold Chemical compound [Cu].[Au] QRJOYPHTNNOAOJ-UHFFFAOYSA-N 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 229910000859 α-Fe Inorganic materials 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0009—Structural features, others than packages, for protecting a device against environmental influences
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
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- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
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- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
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Abstract
The invention discloses a circuit film structure of an MEMS silicon-based cavity circulator/isolator, which belongs to the field of microwave integrated devices, and comprises a gold film layer, a copper film layer, a tantalum nitride load film layer, a priming film layer, an isolation film layer and a high-resistance silicon layer from top to bottom, wherein a barrier film layer is preferably arranged between the gold film layer and the copper film layer; the invention also discloses a preparation method of the circuit film layer structure; compared with the prior art, the circuit film layer structure has the advantages that the insertion loss of the MEMS silicon-based cavity circulator/isolator device can be reduced by 0.2-0.3dB, and the low-loss requirement of the MEMS silicon-based cavity circulator/isolator device application is met.
Description
Technical Field
The invention relates to the field of microwave integrated devices, in particular to a circuit film layer structure of an MEMS silicon-based cavity circulator/isolator and a preparation method thereof.
Background
The microwave ferrite circulator/isolator is an indispensable key device of various radar systems, is mainly used for solving series problems of interstage isolation, impedance matching, antenna transceiving sharing and the like of the microwave system, and can greatly improve the tactical performance of the radar system. Circulator loss is closely related to radar system performance, and the lower the loss, the farther the detection range the radar has. At present, the MEMS silicon-based cavity circulator has the advantages of good device performance, small size and mass production. The structure of the metal thin film circuit fabricated on the high-resistance silicon wafer is closely related to the insertion loss of the circulator/isolator.
The micro-strip circuit film structure adopted by the existing MEMS silicon-based cavity circulator is generally a chromium/gold structure, the micro-strip circuit film structure adopted by the isolator is generally a chromium/tantalum nitride/gold structure, and the chromium/gold and chromium/tantalum nitride/gold structures have the advantages of simple process and easy control of adhesion with silicon, but also have the larger problems of larger insertion loss of devices and relatively higher cost. The main reason for the large loss is that the resistivity of gold is relatively high, the loss of a conductor is large, and in addition, the film layer structure has the problem that the gold layer diffuses into silicon during high-temperature hot-press bonding, so that the resistivity of high-resistance silicon is reduced, the resistive loss of silicon is increased, and the insertion loss of a device is increased.
Therefore, for the reasons mentioned above, it is urgently needed to invent a circuit film structure more suitable for the MEMS silicon-based cavity circulator/isolator, so as to further reduce the insertion loss of the MEMS silicon-based cavity circulator/isolator.
Disclosure of Invention
It is an objective of the present invention to provide a circuit film structure of a circulator/isolator of a MEMS silicon-based cavity to solve the above problems.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows: the circuit film structure of the circulator/isolator of the MEMS silicon-based cavity sequentially comprises a gold film layer, a copper film layer, a tantalum nitride loading film layer, a priming film layer, an isolation film layer and a high-resistance silicon layer from top to bottom.
As a preferred technical scheme: and a barrier film layer is also arranged between the gold film layer and the copper film layer.
As a preferred technical scheme: the priming film layer is one of chromium, titanium or tungsten, and the thickness is 10-100 nm.
As a preferred technical scheme: the isolation film layer is made of silicon dioxide and has a thickness of 180-400 nm.
As a preferred technical scheme: the isolation film layer is made of titanium or tungsten and has a thickness of 10-100 nm.
As a preferred technical scheme: the thickness of the gold film layer is 100-500 nm; the thickness of the copper film layer is 1000-4000 nm.
As a preferred technical scheme: the barrier film layer is one of chromium, titanium and nickel, and the thickness of the barrier film layer is 10-100 nm.
The second objective of the present invention is to provide a method for preparing the circuit film structure of the MEMS silicon-based cavity circulator/isolator, which adopts the technical scheme that the method comprises the following steps:
(1) uniformly oxidizing a layer of silicon dioxide film on the front side and the back side of the high-resistance silicon or evaporating a layer of metal isolation layer film; before manufacturing a device, an isolation film layer is covered on the high-resistance silicon to prevent the gold layer from diffusing into the silicon at high temperature;
(2) arranging a priming film layer;
(3) putting the silicon wafer into a box-type furnace for vacuum annealing treatment;
(4) arranging a tantalum nitride loading film layer on the priming film layer;
(5) arranging a copper film layer on the tantalum nitride load film layer;
(6) arranging a barrier film layer on the copper film layer;
(7) a gold film layer is arranged on the barrier film layer;
(8) carrying out photoetching and patterning;
(9) electroplating is carried out to thicken the gold film.
As a preferred technical scheme: the annealing temperature in the step (3) is 200-400 ℃, and the annealing time is 0.5-1.5 hours.
As a preferred technical scheme: the priming film layer, the tantalum nitride loading film layer, the copper film layer, the barrier film layer and the gold film layer are all arranged by a magnetron sputtering method.
Compared with the prior art, the invention has the advantages that: the method comprises the steps of firstly, uniformly oxidizing a silicon dioxide film or depositing a barrier layer film on the front side and the back side of the high-resistance silicon to prevent a gold layer or a copper layer from diffusing into silicon at high temperature, and then sequentially manufacturing a bottoming layer, a load, copper, a barrier layer and a gold layer structure; first, a metal copper with lower resistivity (copper 1.75X 10)-8Omega. m, gold 2.4X 10-8Omega · m) uses a copper/gold structure to replace a full-gold structure, so that the conductor loss of the whole circuit can be reduced, the loss of a device is reduced, and a barrier film layer between copper and gold can prevent the gold layer and the copper layer from mutually permeating at high temperature, so as to ensure the stability of the copper/gold structure. Compared with the prior art, the circuit film layer structure has the advantages that the insertion loss of the MEMS silicon-based cavity circulator/isolator device can be reduced by 0.2-0.3dB, and the low-loss requirement of the MEMS silicon-based cavity circulator/isolator device application is met.
Drawings
FIG. 1 is a schematic structural view of example 1 of the present invention;
FIG. 2 shows the electrical performance test results (ILMAX =0.50dB) of the 8-12GHz device of example 1;
FIG. 3 shows the results of electrical performance testing (ILMAX =0.7dB) of the 8-12GHz Cr/TaN/Cu/Au MEMS device of example 1;
FIG. 4 shows the electrical performance test results (ILMAX =0.52dB) of the 8-12GHz device of example 2;
figure 5 shows the results of the 8-12GHz cr/tan/au MEMS device electrical performance tests (ILMAX =0.75dB) of example 2.
In the figure: 1. a gold film layer; 2. a barrier film layer; 3. a copper film layer; 4. a tantalum nitride loaded film layer; 5. a priming film layer is formed; 6. an isolation film layer; 7. a high-resistance silicon layer.
Detailed Description
The invention will be further explained with reference to the drawings.
Example 1:
referring to fig. 1, the circuit film structure of the circulator/isolator of the MEMS silicon-based cavity sequentially includes, from top to bottom, a gold film layer 1, a barrier film layer 2 (titanium film), a copper film layer 3, a tantalum nitride loading film layer 4, a primer film layer 5 (chromium film), an isolation film layer 6 (silicon dioxide film), and a high-resistance silicon layer 7;
the preparation method comprises the following steps:
(1) marking and cleaning the two high-resistance silicon layers 7;
(2) uniformly oxidizing a silicon dioxide film with the thickness of 300nm on the front side and the back side of the high-resistance silicon layer 7 to be used as an isolation film layer 6;
(3) sputtering a layer of metal chromium film by magnetron sputtering as a priming film layer 5, sputtering at room temperature with the sputtering power of 180W and the thickness of the chromium film of 30 nm;
(4) putting the silicon wafer into a box-type furnace for vacuum annealing treatment, wherein the annealing temperature is 250 ℃, and the annealing time is 1 hour;
(5) sputtering a tantalum nitride load film layer 4 on the chromium layer, wherein the sputtering temperature is 300 ℃, the sputtering power is 180W, and the thickness of the tantalum nitride film is 600 nm;
(6) sputtering a copper film layer 3 on the tantalum nitride load film layer 4, wherein the sputtering temperature is 400 ℃, the sputtering power is 900W, and the thickness of the copper film layer 3 is 3000 nm;
(7) sputtering a titanium film as a barrier film layer 2 on the copper film layer 3, and sputtering at room temperature with the sputtering power of 180W and the thickness of the titanium film of 10 nm;
(8) sputtering a gold film layer 1 on the titanium film, and sputtering at room temperature with the sputtering power of 200W and the thickness of the gold film of 200 nm; (ii) a
(9) Carrying out photoetching and patterning;
(10) electroplating to thicken the gold film, wherein the thickness of the gold film is 4000 nm;
(11) and carrying out hot-pressing bonding on the two wafers, carrying out deep silicon etching after bonding, and then scribing to finish the assembly of the device.
By adopting the film structure, the electrical performance test is carried out on the assembled 8-12GHz MEMS silicon-based cavity isolator device, and the result shows that the insertion loss ILMAX =0.5dB of a single-section device is 0.2dB lower than the loss of the MEMS isolator with the same frequency band chromium/tantalum nitride/copper/gold structure, as shown in the attached figures 2 and 3.
Example 2:
a circuit film structure of an MEMS silicon-based cavity circulator/isolator sequentially comprises a gold film layer 1, a barrier film layer 2 (a titanium film), a copper film layer 3, a tantalum nitride load film layer 4, a priming film layer 5 (a titanium film), an isolation film layer 6 (a silicon dioxide film) and a high-resistance silicon layer 7 from top to bottom;
the preparation method comprises the following steps:
(1) marking and cleaning the two high-resistance silicon layers 7;
(2) uniformly oxidizing a silicon dioxide film with the thickness of 180nm on the front side and the back side of the high-resistance silicon layer 7;
(3) sputtering a layer of metal titanium film serving as a priming film layer 5 by magnetron sputtering at room temperature with the sputtering power of 180W and the thickness of the titanium film of 50 nm;
(4) sputtering a layer of copper film on the titanium film, wherein the sputtering temperature is 400 ℃, the sputtering power is 900W, and the thickness of the copper film is 4000 nm;
(5) sputtering a layer of titanium film on the copper film, and sputtering at room temperature with the sputtering power of 180W and the thickness of the titanium film of 15 nm;
(6) sputtering a layer of gold film on the titanium film, and sputtering at room temperature with the sputtering power of 200W and the thickness of the gold film of 250 nm; (ii) a
(7) Carrying out photoetching and patterning;
(8) electroplating to thicken the gold film, wherein the thickness of the gold film is 2500 nm;
(9) and carrying out hot-pressing bonding on the two wafers, carrying out deep silicon etching after bonding, and then scribing to finish the assembly of the device.
By adopting the film structure, the electrical performance test is carried out on the assembled 8-12GHz MEMS silicon-based isolator device, and as a result, the insertion loss ILMAX =0.52dB of a single-section device is 0.23dB lower than that of the MEMS isolator with the same frequency band chromium/gold structure, as shown in FIGS. 4 and 5.
Example 3
Compared with the embodiment 2, in the embodiment, only the step (2) is that a metal titanium layer with the thickness of 50nm is uniformly evaporated on the front and back surfaces of the high-resistance silicon layer 7, the rest is the same as the embodiment 1, and the prepared film layer structure is adopted to perform an electrical performance test on the assembled 8-12GHz MEMS silicon-based isolator device, so that the insertion loss ILMAX =0.58dB of a single-section device is 0.17dB lower than that of the MEMS isolator with the same frequency band chromium/gold structure.
Comparative example 1:
compared with the embodiment 2, the comparative example is the same as the embodiment 2 except that the barrier film layer 2 is not arranged between the gold film layer 1 and the copper film layer 3, and as a result, the electrical performance test is carried out on the assembled 8-12GHz MEMS silicon-based isolator device, and the insertion loss ILMAX =0.75dB of the single-section device is obtained.
The above comparative examples demonstrate that: set up barrier film layer 2 between gold rete 1 and copper rete 3, copper gold mutually oozes when can preventing the high temperature to reduce the isolator loss.
Comparative example 2
Compared with the embodiment 2, the comparative example is the same as the embodiment 2 except that the isolation film layer 6 is not arranged, and as a result, the electrical performance test is carried out on the assembled 5-13GHz MEMS silicon-based cavity circulator device, and the insertion loss ILMAX =0.72dB of the single-section device.
The above comparative examples demonstrate that: the high-resistance silicon is subjected to the covering treatment of the isolation film layer before the device is manufactured, so that the gold layer can be prevented from diffusing into the silicon at high temperature, and the loss of the isolator is reduced.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. The utility model provides a MEMS silica-based cavity circulator/isolator circuit membranous layer structure which characterized in that: the film sequentially comprises a gold film layer, a copper film layer, a tantalum nitride loading film layer, a priming film layer, an isolation film layer and a high-resistance silicon layer from top to bottom.
2. The MEMS silicon-based cavity circulator/isolator circuit film structure of claim 1, wherein: and a barrier film layer is also arranged between the gold film layer and the copper film layer.
3. The MEMS silicon-based cavity circulator/isolator circuit film structure of claim 1, wherein: the priming film layer is one of chromium, titanium or tungsten, and the thickness is 10-100 nm.
4. The MEMS silicon-based cavity circulator/isolator circuit film structure of claim 1, wherein: the isolation film layer is made of silicon dioxide and has a thickness of 180-400 nm.
5. The MEMS silicon-based cavity circulator/isolator circuit film structure of claim 1, wherein: the isolation film layer is made of titanium or tungsten and has a thickness of 10-100 nm.
6. The MEMS silicon-based cavity circulator/isolator circuit film structure of claim 2, wherein: the thickness of the gold film layer is 100-500 nm; the thickness of the copper film layer is 1000-4000 nm.
7. The MEMS silicon-based cavity circulator/isolator circuit film structure of claim 2, wherein: the barrier film layer is one of chromium, titanium and nickel, and the thickness of the barrier film layer is 10-100 nm.
8. The method for preparing the circuit film structure of the MEMS silicon-based cavity circulator/isolator as claimed in any one of claims 1 to 7, which is characterized by comprising the following steps:
(1) uniformly oxidizing a layer of silicon dioxide film on the front side and the back side of the high-resistance silicon or evaporating a layer of metal isolation layer film;
(2) arranging a priming film layer;
(3) putting the silicon wafer into a box-type furnace for vacuum annealing treatment;
(4) arranging a tantalum nitride loading film layer on the priming film layer;
(5) arranging a copper film layer on the tantalum nitride load film layer;
(6) arranging a barrier film layer on the copper film layer;
(7) a gold film layer is arranged on the barrier film layer;
(8) carrying out photoetching and patterning;
(9) electroplating is carried out to thicken the gold film.
9. The method of claim 8, wherein: the annealing temperature in the step (3) is 200-400 ℃, and the annealing time is 0.5-1.5 hours.
10. The method of claim 8, wherein: the priming film layer, the tantalum nitride loading film layer, the copper film layer, the barrier film layer and the gold film layer are all arranged by a magnetron sputtering method.
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| CN113292039B (en) * | 2021-05-31 | 2024-03-22 | 中国电子科技集团公司第九研究所 | MEMS silicon-based cavity circulator/isolator circuit film layer structure and preparation method |
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