CN102184912A - Lamination contact structure and preparation method of metallic copper and nickel-silicon compound - Google Patents
Lamination contact structure and preparation method of metallic copper and nickel-silicon compound Download PDFInfo
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- CN102184912A CN102184912A CN2011100966812A CN201110096681A CN102184912A CN 102184912 A CN102184912 A CN 102184912A CN 2011100966812 A CN2011100966812 A CN 2011100966812A CN 201110096681 A CN201110096681 A CN 201110096681A CN 102184912 A CN102184912 A CN 102184912A
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Abstract
The invention belongs to the technical field of micro-electronics, and particularly relates to a lamination contact structure used for improving the direct-contact heat stability between copper and nickel-silicon compound. Since copper has better electrical conductivity than tungsten, a copper plug can be used to replace a traditional tungsten plug between a first-layer interconnection line of an integrated circuit chip and nickel-silicon compound electrodes used by the source, drain and grid of a transistor. The lamination contact structure specifically adopts the copper/tantalum/tantalum nitride/tantalum/nickel-silicon compound, or the copper/tantalum nitride/tantalum/nickel-silicon compound. Experiments show that the direct contact between the tantalum and nickel-silicon compound can well improve the heat stability of the nickel-silicon compound, and the tantalum nitride can effectively stop the diffusion of the copper, therefore, the lamination contact structure can well improve the contact heat stability between the copper and the nickel-silicon compound, and further improve the reliability of the device, thus having good application prospect.
Description
Technical field
The invention belongs to microelectronics technology, be specifically related to a kind of laminated construction that copper and nisiloy compound directly contact and preparation method thereof that is used for.
Background technology
Current semiconductor device is constantly towards the direction progress of high efficiency, miniaturization, as the cmos device of semiconductor industry pillar especially along the direction develop rapidly of Moore's Law.Because the lifting of device integrated level, high-speed, the low-power consumption of device etc. is a cmos device major issue to be solved always, and for this reason, people constantly probe into the process of improving these problems, and wherein a lot of ripe schemes are applied in the middle of the suitability for industrialized production.
The progress of CMOS technology is embodied in the various aspects of whole technical process.For the interconnection process in the modern CMOS backend process, the aluminium interconnection process is progressively replaced by copper wiring technique, because the copper resistance rate is less, and has better electromigration resistance properties.In addition, compare with aluminum interconnecting, the parasitic capacitance of copper interconnecting line is little, have on an equal basis even stronger current carrying capacity, after this means the employing copper-connection, the power loss of the interconnecting lead in the device is littler, and what device can be done is littler, more intensive and more stable.
Through hole packing material in traditional CMOS backend process generally adopts the tungsten plug, and this is that the deposit of tungsten plug has better conformality owing to compare with the aluminium plug, and filling vias, and tungsten better has good thermal stability and electromigration resistance properties.But, in copper wiring technique increasingly mature today, the copper plug is compared with the tungsten plug but bigger superiority.At first, the electroplating technology of copper has covering power, filling vias that can be good, and copper also has high fusing point and thermal stability, so the copper plug can possess the advantage that the tungsten plug is had.Further, the copper plug is owing to its low resistance, and therefore high conductivity can reduce the power loss of through hole well, thereby reduce the power consumption of entire device, and boost device speed is for integrated level and the stability that promotes chip provides advantage.Therefore adopt the copper plug to substitute the tungsten plug and have good industrialization prospect.Yet copper-connection itself also has some limiting factors, and a very serious problem comes from the rapid diffusion ability of copper in medium, and this illustrates at the diffusion impervious layer that need at first form copper before the electro-coppering in through hole.And on the other hand, through hole for the interconnection of CMOS ground floor is filled, because this grade through hole directly links to each other with the nisiloy compound electrode of MOSFET source/leakage/grid, and the thermal stability of nisiloy compound is not good, the diffusion impervious layer that how to guarantee copper also is a quite problem of difficulty with stable contact of nisiloy compound, demands people urgently and goes to solve.Therefore, design the stable contact structures of suitable copper and nisiloy compound, will become the copper plug significant problem that application need overcomes aspect filling vias, the research and the exploration of these contact structures had profound significance.
Summary of the invention
The objective of the invention is to propose a kind ofly can promote metallic copper contacts thermal stability with the nisiloy compound lamination contact structures.
The lamination contact structures that the present invention proposes are the double-layer films structure that coincides successively; The ground floor film adopts tantalum (Ta) material, and second layer film adopts tantalum nitride (TaN) material, as the diffusion impervious layer of copper; Wherein, the tantalum material of ground floor directly contacts with nisiloy compound and dielectric layer, and the tantalum nitride of the second layer (TaN) material directly contacts with the copper metal.These lamination contact structures specifically can be described as Cu/TaN/Ta/NiSi.
The lamination contact structures that the present invention proposes can also be the three-layer thin-film structures that coincides successively, one deck tantalum (Ta) material are promptly arranged again, as three-layer thin-film on the basis of above-mentioned double-layer films; At this moment, the 3rd layer tantalum material directly contacts with the copper metal.These lamination contact structures specifically can be described as Cu/Ta/TaN/Ta/NiSi.
What the present invention proposed can promote metallic copper contacts thermal stability with the nisiloy compound lamination contact structures, its core is the direct thermal stability that can improve the nisiloy compound that contacts of ground floor tantalum and nisiloy compound, second layer diffusion impervious layer tantalum nitride can stop the diffusion of copper well, and optional the 3rd layer of tantalum then can improve the adhesion characteristics with metallic copper.Therefore, this laminated construction can improve copper and nisiloy compound stability in contact well, also can play the effect that stops the copper metal diffusing well.
The preparation method of the lamination contact structures that the present invention proposes, concrete steps are:
1, based on finishing the whole preceding road of CMOS device technology, need carrying out the metal interconnected CMOS sample of ground floor.Finished the etching of through hole, through hole live width 50nm ~ 5um, the filling of through hole is carried out in preparation, and the through hole bottom is exposed (source/leakage/grid) nisiloy compound, and the through hole side is generally phosphorosilicate glass commonly used or boron-phosphorosilicate glass;
2, utilize the PVD technology in through hole the deposit tantalum material as ground floor;
3, utilize the PVD technology in through hole the deposit tantalum-nitride material as the second layer;
4, utilize the PVD technology in through hole the deposit tantalum material as the 3rd layer (according to the design of two kinds of laminated construction of Cu/Ta/TaN/NiSi and Cu/TaN/Ta/NiSi different, this step process is an optional step);
5, utilize PVD technology cement copper inculating crystal layer in through hole;
6, utilize electroplating technology in through hole, to fill metallic copper.
In the inventive method, the tantalum material thickness that the ground floor diffusion impervious layer adopts is 1 ~ 10nm;
In the inventive method, tantalum-nitride material thickness 3 ~ 10nm that second layer diffusion impervious layer adopts;
In the inventive method, the tantalum material thickness of the 3rd layer of diffusion impervious layer employing is 1 ~ 10nm, and this layer is an optional layer.
Experiment shows, is directly contacted with the nisiloy compound as the ground floor diffusion impervious layer by tantalum, can make the nisiloy compound still keep the stable structure characteristic under 500 ~ 600 ℃ of high-temperature conditions.Tantalum nitride can play the effect that stops the copper diffusion well as traditional copper diffusion barrier layer material.Tantalum can improve the adhesiveness of copper and diffusion impervious layer as traditional adhesive layer material.Therefore this laminated construction can be as the contact structures of good copper and nisiloy compound.
Description of drawings
Fig. 1-Fig. 5 is the schematic diagram (end view) of technological process.Wherein, Fig. 5 is the device-side view of last process step formation.
Number in the figure: 1 is NiSi, and 2 is dielectric layer, as SiO
2, 3 is phosphorosilicate glass or boron-phosphorosilicate glass, and 4 is Ta, and 5 is TaN, and 6 is Ta, 7 is Cu.
Embodiment
Further describe the present invention below by concrete processing step:
1, adopts the CMOS sample of having finished standard CMOS front end device technology, need having carried out the filling of ground floor through-hole interconnection.Sample has been finished the etching of through hole, through hole live width 500nm, and the through hole bottom is exposed (source/leakage/grid) nisiloy compound, the through hole side is generally phosphorosilicate glass commonly used or boron-phosphorosilicate glass, as shown in Figure 1;
2, utilize vacuum PVD technology deposit Ta in through hole, vacuum degree 10
-5Pa, deposit power 150W, deposition time 200s.Film thickness 3nm, as shown in Figure 2;
3, utilize the PVD technology at N
2Thereby with sputter Ta deposit TaN in the Ar atmosphere, operating air pressure 0.42Pa, N
2With the Ar volume ratio be 3:17, deposit power 150W, deposition time 300s.Film thickness 5nm, as shown in Figure 3;
4, (this step is an optional step) utilizes vacuum PVD technology deposit Ta in through hole, vacuum degree 10
-5Pa, deposit power 150W, deposition time 200s.Film thickness 3nm, as shown in Figure 4;
5, utilize vacuum PVD technology, deposit 5nm seed copper layer utilizes electroplating technology to fill metallic copper then in through hole, the plating of beginning copper after the pickling, CuSO in the electroplating solution
45H
2O concentration 80g/L, H
2SO
4Concentration 200g/L, Cl
-Concentration 50ml/L adopts the GT-100 additive, 25 ℃ of tank liquor temperatures, electroplating time 2min.Copper is full of through hole, as shown in Figure 5.
Claims (6)
1. a metallic copper contacts junction structure with the lamination of nisiloy compound, it is characterized in that the double-layer films structure that comprises that following first, second layer film coincides successively, the three-layer thin-film structure that perhaps following first, second, third layer film coincides successively; Wherein, the ground floor film adopts tantalum (Ta) material, and second layer film adopts tantalum nitride (TaN) material, is the diffusion impervious layer of copper (Cu), and the 3rd layer is adopted tantalum (Ta) material; The tantalum material of ground floor directly contacts with nisiloy compound and dielectric layer; This lamination touches that junction structure is designated as or Cu/TaN/Ta/NiSi or Cu/Ta/TaN/Ta/NiSi.
2. the preparation method of the lamination contact structures of metallic copper and nisiloy compound is characterized in that concrete steps are:
(1), provides the CMOS sample of finishing CMOS leading portion device technology, need carrying out the filling of ground floor through-hole interconnection, this sample has been finished the etching of through hole, the filling of through hole is carried out in preparation, and the through hole bottom is exposed nisiloy compound, and the through hole side is phosphorosilicate glass or boron-phosphorosilicate glass;
(2), utilize PVD technology deposit tantalum in through hole, as the ground floor diffusion impervious layer; This tantalum layer directly contacts with the nisiloy compound;
(3), utilize PVD technology deposit tantalum nitride in through hole, as second layer diffusion impervious layer;
(4), utilize PVD technology cement copper inculating crystal layer in through hole;
(5), utilize electroplating technology in through hole, to fill metallic copper.
3. preparation method according to claim 2, it is characterized in that step (3) afterwards, step (4) before, utilize PVD technology deposit tantalum in through hole, as the 3rd layer of diffusion impervious layer.
4. according to claim 2 or 3 described preparation methods, it is characterized in that the tantalum layer thickness described in the step (2) is 1 ~ 10nm.
5. according to claim 2 or 3 described preparation methods, it is characterized in that the tantalum nitride thickness described in the step (3) is 3 ~ 10nm.
6. preparation method according to claim 3 is characterized in that described tantalum layer thickness as the 3rd layer of diffusion impervious layer is 1 ~ 10nm.
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CN103545292A (en) * | 2013-11-11 | 2014-01-29 | 华进半导体封装先导技术研发中心有限公司 | TSV structure and manufacturing method thereof |
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CN105006467A (en) * | 2014-04-25 | 2015-10-28 | 台湾积体电路制造股份有限公司 | Metal contact structure and method of forming the same |
CN113292039A (en) * | 2021-05-31 | 2021-08-24 | 中国电子科技集团公司第九研究所 | MEMS silicon-based cavity circulator/isolator circuit film layer structure and preparation method |
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Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103545292A (en) * | 2013-11-11 | 2014-01-29 | 华进半导体封装先导技术研发中心有限公司 | TSV structure and manufacturing method thereof |
CN103560124A (en) * | 2013-11-11 | 2014-02-05 | 华进半导体封装先导技术研发中心有限公司 | Through silicon via (TSV) structure and manufacture method thereof |
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CN113292039A (en) * | 2021-05-31 | 2021-08-24 | 中国电子科技集团公司第九研究所 | MEMS silicon-based cavity circulator/isolator circuit film layer structure and preparation method |
CN113292039B (en) * | 2021-05-31 | 2024-03-22 | 中国电子科技集团公司第九研究所 | MEMS silicon-based cavity circulator/isolator circuit film layer structure and preparation method |
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Application publication date: 20110914 |