CN113257713B - Integrated circuit deburring device, integrated circuit deburring auxiliary device and integrated circuit deburring method - Google Patents
Integrated circuit deburring device, integrated circuit deburring auxiliary device and integrated circuit deburring method Download PDFInfo
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- CN113257713B CN113257713B CN202110513214.9A CN202110513214A CN113257713B CN 113257713 B CN113257713 B CN 113257713B CN 202110513214 A CN202110513214 A CN 202110513214A CN 113257713 B CN113257713 B CN 113257713B
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- integrated circuit
- deburring
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- strip
- film
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- 238000000034 method Methods 0.000 title claims description 16
- 238000004140 cleaning Methods 0.000 claims abstract description 29
- 239000007921 spray Substances 0.000 claims abstract description 17
- 239000000463 material Substances 0.000 claims abstract description 12
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 22
- 238000010276 construction Methods 0.000 claims description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 3
- 238000003486 chemical etching Methods 0.000 description 2
- 239000002894 chemical waste Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 239000002216 antistatic agent Substances 0.000 description 1
- 239000013043 chemical agent Substances 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67028—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
- H01L21/6704—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing
- H01L21/67051—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing using mainly spraying means, e.g. nozzles
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B08—CLEANING
- B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
- B08B3/00—Cleaning by methods involving the use or presence of liquid or steam
- B08B3/02—Cleaning by the force of jets or sprays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
An integrated circuit deburring device. The integrated circuit deburring device comprises a base, an integrated circuit deburring auxiliary device and a cleaning device. The base is used for bearing an integrated circuit strip placed on the UV film. When the integrated circuit deburring aid is combined with the base, the integrated circuit deburring aid covers the UV film and exposes the integrated circuit strip. The spray head is arranged above the base and is used for cleaning the integrated circuit material strip in a physical cleaning mode.
Description
Technical Field
The present application relates to an apparatus, and more particularly, to an integrated circuit deburring apparatus, an integrated circuit deburring auxiliary apparatus, and an integrated circuit deburring method.
Background
Traditionally, integrated circuits have been cleaned by chemical etching to remove copper burrs on the integrated circuits. However, chemical etching may be poor in chemical waste, and may also cause side etching to the integrated circuit product, which may affect the product performance and reduce the product yield.
Disclosure of Invention
In view of the above, the present application provides an integrated circuit deburring device, an integrated circuit deburring auxiliary device and an integrated circuit deburring method for solving the above-mentioned problems.
According to an embodiment of the present application, an integrated circuit deburring apparatus is provided. The integrated circuit deburring device comprises a base, an integrated circuit deburring auxiliary device and a cleaning device. The base is used for bearing an integrated circuit strip placed on the UV film. When the integrated circuit deburring aid is combined with the base, the integrated circuit deburring aid covers the UV film and exposes the integrated circuit strip. The spray head is arranged above the base and is used for cleaning the integrated circuit material strip in a physical cleaning mode.
According to an embodiment of the application, the integrated circuit deburring auxiliary apparatus presents a circular plate structure.
According to an embodiment of the present application, the outer circumference of the circular plate structure includes a positioning structure, and the position and shape of the positioning structure correspond to those of the positioning structure on the base.
According to an embodiment of the application, the integrated circuit deburring assistance device comprises positioning means for assisting the connection of the integrated circuit deburring assistance device to the base.
According to an embodiment of the present application, the positioning device includes one or a combination of a magnet, a lock catch, a screw, and a latch.
According to an embodiment of the present application, the integrated circuit deburring auxiliary apparatus includes a hollow structure, and when the integrated circuit deburring auxiliary apparatus is combined with the base, the hollow structure exposes the integrated circuit strip.
According to an embodiment of the present application, the size of the hollowed-out structure is larger than the size of the integrated circuit strip.
According to an embodiment of the present application, the shape of the hollowed-out structure corresponds to the shape of the integrated circuit strip.
According to an embodiment of the application, the cleaning device comprises a spray head for providing a spray of water to clean the integrated circuit.
According to an embodiment of the application, the height of the ejection head above the base is in the range of 10 mm to 20 mm.
According to an embodiment of the application, the height of the spray head above the base is 15 mm.
According to an embodiment of the application, the water pressure of the water jet is in the range of 280 kg per square centimeter to 320 kg per square centimeter.
According to an embodiment of the application, the water pressure of the water jet is 300 kg per square centimeter.
According to an embodiment of the application, the velocity of the water jet is in the range of 0.1 meter per minute to 0.3 meter per minute.
According to an embodiment of the application, the velocity of the water jet is 0.2 meter per minute.
According to an embodiment of the present application, an integrated circuit deburring auxiliary apparatus is provided. The integrated circuit deburring auxiliary device is used for assisting the integrated circuit deburring device to clean an integrated circuit material strip placed on the UV film, and when the integrated circuit deburring auxiliary device is combined with a base of the integrated circuit deburring device, the integrated circuit deburring auxiliary device covers the UV film and exposes the integrated circuit material strip
According to an embodiment of the application, the integrated circuit deburring auxiliary apparatus presents a circular plate structure.
According to an embodiment of the present application, the outer circumference of the circular plate structure includes a positioning structure, and the position and shape of the positioning structure correspond to those of the positioning structure on the base.
According to an embodiment of the application, the integrated circuit deburring assistance device comprises positioning means for assisting the connection of the integrated circuit deburring assistance device to the base.
According to an embodiment of the present application, the positioning device includes one or a combination of a magnet, a lock catch, a screw, and a latch.
According to an embodiment of the present application, the integrated circuit deburring auxiliary apparatus includes a hollow structure, and when the integrated circuit deburring auxiliary apparatus is combined with the base, the hollow structure exposes the integrated circuit strip.
According to an embodiment of the present application, the size of the hollowed-out structure is larger than the size of the integrated circuit strip.
According to an embodiment of the present application, the shape of the hollowed-out structure corresponds to the shape of the integrated circuit strip.
According to an embodiment of the present application, an integrated circuit deburring method is provided. The method comprises the following steps: carrying an integrated circuit strip placed on the UV film by a base; combining an integrated circuit deburring aid with the base to cover the UV film and expose the integrated circuit strip; and starting the cleaning device to clean the integrated circuit material strip in a physical cleaning mode.
Drawings
The accompanying drawings are included to provide a further understanding of the application, and are incorporated in and constitute a part of this specification, illustrate the application and together with the description serve to explain, without limitation, the application. In the drawings:
fig. 1 illustrates a schematic diagram of an integrated circuit deburring apparatus according to one embodiment of the present application.
Fig. 2A and 2B illustrate a top view and a bottom view, respectively, of an integrated circuit deburring assistance device according to an embodiment of the present application.
FIG. 3 illustrates a top view of a base in accordance with one embodiment of the present application.
Fig. 4 illustrates a top view of a base and integrated circuit deburring assist apparatus in accordance with an embodiment of the present application.
Fig. 5 illustrates a flow chart of a method for deburring an integrated circuit according to one embodiment of the present application.
Detailed Description
The following disclosure provides various embodiments or examples that can be used to implement the various features of the present disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. It is to be understood that these descriptions are merely exemplary and are not intended to limit the present disclosure. For example, in the following description, forming a first feature on or over a second feature may include certain embodiments in which the first and second features are in direct contact with each other; and may include embodiments in which additional components are formed between the first and second features such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. Such reuse is for brevity and clarity purposes and does not itself represent a relationship between the different embodiments and/or configurations discussed.
Moreover, spatially relative terms, such as "under," "below," "lower," "upper," and the like, may be used herein to facilitate a description of the relationship between one element or feature to another element or feature as illustrated in the figures. These spatially relative terms are intended to encompass a variety of different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be placed in other orientations (e.g., rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein interpreted accordingly.
Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the application are approximations, the numerical values set forth in the specific examples are reported as precisely as possible. However, any numerical value inherently contains certain standard deviations found in their respective testing measurements. As used herein, "about" generally means that the actual value is within plus or minus 10%, 5%, 1% or 0.5% of a particular value or range. Alternatively, the term "about" means that the actual value falls within an acceptable standard error of the average value, depending on the consideration of the person having ordinary skill in the art to which the present application pertains. It is to be understood that all ranges, amounts, values, and percentages used herein (e.g., to describe amounts of materials, lengths of time, temperatures, operating conditions, ratios of amounts, and the like) are modified by the word "about" unless otherwise specifically indicated. Accordingly, unless indicated to the contrary, the numerical parameters set forth in the present specification and attached claims are approximations that may vary depending upon the desired properties. At least these numerical parameters should be construed as the number of significant digits and by applying ordinary rounding techniques. Herein, a numerical range is expressed as from one end point to another end point or between two end points; unless otherwise indicated, all numerical ranges recited herein include endpoints.
Fig. 1 illustrates a schematic diagram of an integrated circuit deburring apparatus 1 according to an embodiment of the present application. In some embodiments, the integrated circuit deburring apparatus 1 comprises a base 11, an integrated circuit deburring auxiliary apparatus 12 and a cleaning apparatus 13. In some embodiments, the integrated circuit deburring apparatus 1 is used to clean copper burrs on integrated circuit strips. In some embodiments, the integrated circuit deburring apparatus 1 performs a copper burr cleaning operation on the integrated circuit strip placed on the UV film after the UV film is sawed. In some embodiments, the base 11 is used to carry integrated circuit strips that are placed on a UV film. In some embodiments, the integrated circuit deburring aid 12 is used in combination with a base 11 carrying a strip of integrated circuits. In certain embodiments, when the integrated circuit deburring aid 12 is combined with the base 11 carrying the integrated circuit strip, the integrated circuit deburring aid 12 covers the UV film and exposes the integrated circuit strip.
In some embodiments, the integrated circuit deburring device 1 implements the integrated circuit deburring assistance device 12 in combination with the base 11 by a braking mechanism (not shown). In certain embodiments, the combination of the integrated circuit deburring assistance device 12 and the base 11 may be manually implemented by a user of the integrated circuit deburring device 1. This is not a limitation of the present application.
In some embodiments, the cleaning device 13 cleans the integrated circuit strips by physical cleaning means. In certain embodiments, cleaning device 13 includes a spray head 131. In some embodiments, spray heads 131 are used to provide a spray of water to clean the integrated circuit strip. In some embodiments, the water pressure of the water jet provided by the jet head 131 is in the range of 280 kg per square centimeter to 320 kg per square centimeter. Preferably, the water pressure of the water jet provided by the jet head 131 is 300 kg per square centimeter. In certain embodiments, the jet head 131 provides a jet of water at a velocity in the range of 0.1 meters per minute to 0.3 meters per minute. Preferably, the jet head 131 provides a jet of water at a velocity of 0.2 meters per minute. In some embodiments, the cleaning device 13 and the spray head 131 are disposed above the base 11. In some embodiments, the height of the injector head 131 from above the base 11 is in the range of 10 millimeters to 20 millimeters. Preferably, the height of the ejection head 131 from above the base 11 is 15 mm. It should be noted that the present application is not limited to the ejection head 131 being disposed above the base 11. In some embodiments, spray head 131 may be disposed in a lateral direction of base 11. The present application is not limited to the arrangement positions of the cleaning device 13 and the spray head 131, as long as the spray water supplied from the spray head 131 can perform cleaning work on the copper burrs on the integrated circuit strip.
Fig. 2A and 2B illustrate a top view and a bottom view, respectively, of an integrated circuit deburring assistance device 12 according to an embodiment of the present application. In some embodiments, the integrated circuit deburring aid 12 presents a circular plate structure. In certain embodiments, the outer circumference of the circular plate structure includes a positioning structure 121. In certain embodiments, the positioning structure 121 presents a notched structure on the outer circumference of the integrated circuit deburring aid 12. In some embodiments, the location and shape of the positioning structure 121 of the integrated circuit deburring assistance device 12 corresponds to the location and shape of the positioning structure of the base 11. In some embodiments, when the positioning structure 121 of the integrated circuit deburring assistance device 12 is aligned with the positioning structure of the base 11, the integrated circuit deburring assistance device 12 is combined with the base 11, avoiding erroneous installation of the integrated circuit deburring assistance device 12.
In some embodiments, the back side of the integrated circuit deburring assistance device 12 includes a positioning means 122. In some embodiments, the positioning device 122 is used to facilitate the connection of the integrated circuit deburring assistance device 12 to the base 11. In some embodiments, the positioning device 122 includes one or a combination of a magnet, a lock, a screw, and a latch, and the base 11 also includes one or a combination of a magnet, a lock, a screw, and a latch corresponding to the positioning device 122. In some embodiments, integrated circuit deburring assist device 12 may be coupled to base 11 by positioning device 122 when positioning structure 121 of integrated circuit deburring assist device 12 is aligned with the positioning structure of base 11. It should be noted that the number and arrangement positions of the positioning structure 121 and the positioning device 122 are not limited in the present application.
In some embodiments, the integrated circuit deburring aid 12 includes a hollowed-out structure 123. In some embodiments, the hollowed-out structure 123 exposes the integrated circuit strip when the integrated circuit deburring auxiliary apparatus 12 is combined with the base 11. In some embodiments, the size of the hollowed-out structure 123 is larger than the size of the integrated circuit strip. In some embodiments, the hollowed-out structure 123 has a shape corresponding to the shape of the integrated circuit strip. When the integrated circuit deburring aid 12 is combined with the base 11, the integrated circuit strip is fully exposed.
In some embodiments, the integrated circuit deburring aid 12 is made of an antistatic material. In some embodiments, the integrated circuit deburring aid 12 is made of stainless steel having a thickness greater than 1 mm to prevent deformation of the integrated circuit deburring aid 12 when the cleaning apparatus 13 physically cleans the integrated circuit strip.
Fig. 3 illustrates a top view of the base 11 according to an embodiment of the present application. In some embodiments, the integrated circuit strip 20 is placed over the UV film 21, and the base 11 carries the integrated circuit strip 20 placed on the UV film 21. In some embodiments, the base 11 is substantially the same shape as the integrated circuit deburring aid 12, exhibiting a circular plate structure. In certain embodiments, the outer perimeter of the base 11 includes a locating feature 111. In some embodiments, the positioning structure 111 of the base is substantially the same shape, location, use as the positioning structure 121 of the integrated circuit deburring assistance device 12. As described in the preceding paragraphs, the integrated circuit deburring aid 12 is combined with the base 11 when the positioning structures 111 and 121 are aligned, so that erroneous mounting is avoided. It should be noted that in the embodiment of fig. 3, the number of integrated circuit strips 20 placed on the UV film 21 is only exemplary and not a limitation of the present application.
Fig. 4 illustrates a top view of the base 11 and integrated circuit deburring aid 12 in combination in accordance with one embodiment of the present application. In some embodiments, when the base 11 is combined with the integrated circuit deburring aid 12, the integrated circuit deburring aid 12 covers the UV film 21 and the hollowed out structure 123 exposes the integrated circuit strip 20. In this way, the UV film 21 will not be damaged when the cleaning device 13 physically cleans the integrated circuit strip 20.
The integrated circuit deburring device 1 provided by the application cleans the integrated circuit strips in a physical way to remove copper burrs, can avoid chemical wastes generated by chemical cleaning, such as etching with chemical agents, can avoid lateral etching on the integrated circuit strips, and improves the product yield. In addition, the integrated circuit deburring auxiliary device 12 provided by the application can cover the UV film and expose only the integrated circuit strips after being combined with the base 11, so that the damage to the UV film caused by a physical cleaning mode can be avoided.
Fig. 5 illustrates a flow chart of an integrated circuit deburring method 50 according to one embodiment of the present application. The present application is not limited to performing the integrated circuit deburring method 50 entirely in accordance with the process flow shown in fig. 5, provided that substantially the same results are obtained. In certain embodiments, the integrated circuit deburring method 50 may be applied to the integrated circuit deburring apparatus 1. The integrated circuit deburring method 50 is generally summarized as follows:
Step 52: the integrated circuit strip placed on the UV film is carried by the base.
Step 54: an integrated circuit deburring aid is combined with the base to cover the UV film and expose the integrated circuit strip.
Step 56: and starting a cleaning device to clean the integrated circuit material strip in a physical cleaning mode.
The detailed operation of the integrated circuit deburring method 50 will be readily understood by those skilled in the art after reading the above embodiments. The detailed description is omitted here for brevity.
As used herein, the terms "approximately," "substantially," and "about" are used to describe and account for minor variations. When used in connection with an event or circumstance, the terms can refer to instances where the event or circumstance occurs precisely and instances where it occurs to the close approximation. As used herein with respect to a given value or range, the term "about" generally means within ±10%, ±5%, ±1% or ±0.5% of the given value or range. Ranges can be expressed herein as from one endpoint to the other endpoint, or between two endpoints. Unless otherwise specified, all ranges disclosed herein include endpoints. The term "substantially coplanar" may refer to two surfaces within a few micrometers (μm) positioned along a same plane, for example, within 10 μm, within 5 μm, within 1 μm, or within 0.5 μm positioned along the same plane. When referring to "substantially" the same value or property, the term may refer to a value that is within ±10%, 5%, 1% or 0.5% of the average value of the values.
As used herein, the terms "approximately," "substantially," and "about" are used to describe and explain minor variations. When used in connection with an event or circumstance, the terms can refer to instances where the event or circumstance occurs precisely and instances where it occurs to the close approximation. For example, when used in conjunction with a numerical value, the term can refer to a range of variation of less than or equal to ±10% of the numerical value, e.g., less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, two values may be considered to be "substantially" or "about" the same if the difference between the two values is less than or equal to ±10% (e.g., less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%) of the average value of the values. For example, "substantially" parallel may refer to a range of angular variation of less than or equal to ±10° relative to 0 °, for example, less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°. For example, "substantially" perpendicular may refer to a range of angular variation of less than or equal to ±10° relative to 90 °, for example, less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.
For example, two surfaces may be considered to be coplanar or substantially coplanar if the displacement between the two surfaces is equal to or less than 5 μm, equal to or less than 2 μm, equal to or less than 1 μm, or equal to or less than 0.5 μm. A surface may be considered planar or substantially planar if the displacement of the surface relative to the plane between any two points on the surface is equal to or less than 5 μm, equal to or less than 2 μm, equal to or less than 1 μm, or equal to or less than 0.5 μm.
As used herein, the terms "conductive," "conductive (ELECTRICALLY CONDUCTIVE)" and "conductivity" refer to the ability to transfer current. Conductive materials generally indicate those materials that are little or zero opposing to current flow. One measure of conductivity is Siemens per meter (S/m). Typically, the conductive material is one having a conductivity greater than approximately 104S/m (e.g., at least 105S/m or at least 106S/m). The conductivity of a material can sometimes vary with temperature. Unless otherwise specified, the conductivity of a material is measured at room temperature.
As used herein, the singular terms "a" and "an" may include plural referents unless the context clearly dictates otherwise. In the description of some embodiments, a component provided "on" or "over" another component may encompass the case where the former component is directly on (e.g., in physical contact with) the latter component, as well as the case where one or more intermediate components are located between the former component and the latter component.
As used herein, spatially relative terms such as "below," "lower," "above," "upper," "lower," "left," "right," and the like may be used herein for ease of description to describe one component or feature's relationship to another component or feature as illustrated in the figures. In addition to the orientations depicted in the figures, the spatially relative terms are intended to encompass different orientations of the device in use or operation. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present.
The foregoing has outlined features of several embodiments and detailed aspects of the present disclosure. The embodiments described in this disclosure may be readily used as a basis for designing or modifying other processes and structures for carrying out the same or similar purposes and/or obtaining the same or similar advantages of the embodiments introduced herein. Such equivalent constructions do not depart from the spirit and scope of the present disclosure and are susceptible to various changes, substitutions and alterations without departing from the spirit and scope of the present disclosure.
Claims (24)
1. An integrated circuit deburring apparatus comprising:
a base for carrying an integrated circuit strip placed on the UV film;
An integrated circuit deburring aid, wherein when the integrated circuit deburring aid is combined with the base, the integrated circuit deburring aid covers the UV film and exposes the integrated circuit strip; and
The cleaning device is arranged above the base and is used for cleaning the integrated circuit material strip in a physical cleaning mode and avoiding damage to the UV film.
2. The integrated circuit deburring device of claim 1, wherein said integrated circuit deburring assist means is of circular plate construction.
3. The integrated circuit deburring device of claim 2, wherein the outer circumference of said circular plate structure includes locating structures positioned and shaped to correspond to locating structures on said base.
4. The integrated circuit deburring device of claim 3, wherein said integrated circuit deburring assist means includes positioning means for assisting connection of said integrated circuit deburring assist means to said base.
5. The integrated circuit deburring device of claim 4, wherein said locating means comprises one or a combination of magnets, latches, screws and tenons.
6. The integrated circuit deburring apparatus of claim 1, wherein said integrated circuit deburring assist apparatus comprises a hollowed out structure exposing said integrated circuit strip when said integrated circuit deburring assist apparatus is combined with said base.
7. The integrated circuit deburring apparatus of claim 6, wherein said hollowed-out structure is larger in size than said integrated circuit strip.
8. The integrated circuit deburring device of claim 6, wherein said hollowed-out structure has a shape corresponding to a shape of said integrated circuit strip.
9. The integrated circuit deburring apparatus of claim 1, wherein said cleaning apparatus comprises a spray head for providing a spray of water to clean said integrated circuit.
10. The integrated circuit deburring device of claim 9, wherein said spray head is at a height in the range of 10 mm to 20 mm from above said base.
11. The integrated circuit deburring device of claim 9, wherein said spray head is 15 mm high above said base.
12. The integrated circuit deburring device of claim 9, wherein the water pressure of said injected water stream is in the range of 280 kg per square centimeter to 320 kg per square centimeter.
13. The integrated circuit deburring device of claim 9, wherein said water jet has a water pressure of 300 kg per square centimeter.
14. The integrated circuit deburring device of claim 9, wherein the velocity of said water jet is in the range of 0.1 meters per minute to 0.3 meters per minute.
15. The integrated circuit deburring device of claim 9, wherein said jet of water is at a velocity of 0.2 meters per minute.
16. The integrated circuit deburring auxiliary device is used for assisting the integrated circuit deburring device to clean an integrated circuit strip placed on a UV film, wherein the UV film is borne on a base of the integrated circuit deburring device, and when the integrated circuit deburring auxiliary device is combined with the base, the integrated circuit deburring auxiliary device covers the UV film and exposes the integrated circuit strip.
17. The integrated circuit deburring assist apparatus of claim 16, wherein said integrated circuit deburring assist apparatus is of a circular plate structure.
18. The integrated circuit deburring assist apparatus of claim 17, wherein an outer circumference of said circular plate structure includes a locating structure positioned and shaped to correspond to a locating structure on said base.
19. The integrated circuit deburring assist apparatus of claim 16, comprising positioning means for assisting connection of said integrated circuit deburring assist apparatus to said base.
20. The integrated circuit deburring assist apparatus of claim 19, wherein said positioning means comprises one or a combination of magnets, latches, screws and tenons.
21. The integrated circuit deburring assist apparatus of claim 16, comprising a hollowed out structure exposing said integrated circuit strip when said integrated circuit deburring assist apparatus is combined with said base.
22. The integrated circuit deburring assist apparatus of claim 21, wherein said hollowed-out structure is larger in size than said integrated circuit strip.
23. The integrated circuit deburring assist apparatus of claim 21, wherein said hollowed-out structure has a shape corresponding to a shape of said integrated circuit strip.
24. An integrated circuit deburring method comprising:
carrying an integrated circuit strip placed on the UV film by a base;
combining an integrated circuit deburring aid with the base to cover the UV film and expose the integrated circuit strip; and
The cleaning device is started to clean the integrated circuit material strip in a physical cleaning mode and avoid damaging the UV film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110513214.9A CN113257713B (en) | 2021-05-11 | 2021-05-11 | Integrated circuit deburring device, integrated circuit deburring auxiliary device and integrated circuit deburring method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110513214.9A CN113257713B (en) | 2021-05-11 | 2021-05-11 | Integrated circuit deburring device, integrated circuit deburring auxiliary device and integrated circuit deburring method |
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| Publication Number | Publication Date |
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| CN113257713A CN113257713A (en) | 2021-08-13 |
| CN113257713B true CN113257713B (en) | 2024-05-17 |
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Citations (12)
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| CN113257713A (en) | 2021-08-13 |
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