CN113088912A - 改善TaOx基阻变存储器可靠性的硅掺杂磁控溅射工艺 - Google Patents

改善TaOx基阻变存储器可靠性的硅掺杂磁控溅射工艺 Download PDF

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CN113088912A
CN113088912A CN202110364458.5A CN202110364458A CN113088912A CN 113088912 A CN113088912 A CN 113088912A CN 202110364458 A CN202110364458 A CN 202110364458A CN 113088912 A CN113088912 A CN 113088912A
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王德君
谢威威
周大雨
白娇
蔡承轩
李苏洋
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Dalian University of Technology
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Abstract

本发明属于微电子和半导体加工技术领域，一种改善TaOx基阻变存储器可靠性的硅掺杂磁控溅射工艺，包括以下步骤：(1)清洗SiO2/Si衬底，(2)在SiO2/Si衬底上采用磁控溅射方法镀制下电极TiN薄膜，(3)在下电极TiN薄膜上采用磁控溅射沉积TaOx薄膜并掺杂Si，(4)把经步骤3溅射沉积的Si掺杂TaOx薄膜进行退火，(5)磁控溅射镀制上电极。本发明在TaOx薄膜中掺杂Si，能有效的调节TaOx薄膜中缺陷结构，增加了氧空位浓度，降低了器件的操作电压，增大了记忆窗口，提高器件的可靠性，且工艺流程简单，薄膜沉积速度快，可以为阻变存储器的大规模推广应用提供技术支持。

Description

改善TaOx基阻变存储器可靠性的硅掺杂磁控溅射工艺
技术领域
本发明涉及一种改善TaOx基阻变存储器可靠性的硅掺杂磁控溅射工艺，属于微电子和半导体加工技术领域。
技术背景
自从进入信息时代，人们对存储和计算的要求极速增加，传统形式的存储器受到小尺寸效应限制，已经不能满足人们的需求。阻变存储器(RRAM)由于其快速的写入/擦除速度和简单的结构而成为下一代非易失性存储器最有希望的候选者之一。Ta2O5是一种被广泛应用的阻变材料，制备方法有很多，如热氧化、化学气相沉积、磁控溅射、电子束蒸发与原子层沉积等。其中磁控溅射因其工艺简单，长膜速率快，被广泛的应用到TaOx基RRAM阻变层的制备过程。
尽管RRAM器件被广泛研究，但是器件高的操作电压和耐久性一直制约着器件的商业化应用。有人通过金属掺杂的方法改善了TaOx基RRAM的切换均一性，但是存在读写次数少的问题。而与其他金属掺杂方法相比，Kim,B.Y.and K.J.Lee等人在文章中提到原子层沉积制备硅掺杂TaOx基RRAM能够降低操作电流，但是操作电压比较大(期刊：JapaneseJournal of Applied Physics，2016，55(4s))。通常掺杂工艺一般采用离子注入，如公开号为CN102881824B的中国专利公开了阻变存储器及其制备方法，制备过程中，需要薄膜制备好后再掺杂，相比较而言，磁控溅射过程中同时进行Si掺杂的工艺流程更简单方便。因此，研究基于磁控溅射的Si掺杂工艺对改善TaOx基RRAM的可靠性是一个有意义的课题。
发明内容
为了克服现有技术中存在的不足，本发明是一种改善TaOx基阻变存储器可靠性的硅掺杂磁控溅射工艺，采用基于磁控溅射的Si掺杂改变薄膜中的缺陷结构，降低氧空位的形成能，调节器件的操作电压和记忆窗口。
为了实现上述发明目的，解决现有技术存在的问题，本发明采取的技术方案是：一种改善TaOx基阻变存储器可靠性的硅掺杂磁控溅射工艺，包括以下步骤：
步骤1、清洗SiO2/Si衬底，具体包括以下子步骤：
(a)将SiO2/Si衬底放入去离子水中超声清洗3-10min；
(b)将经过子步骤(a)清洗的SiO2/Si衬底放入丙酮中超声清洗3-10min；
(c)将经过子步骤(b)清洗的SiO2/Si衬底放入无水乙醇中超声清洗3-10min；
(d)将经过子步骤(c)清洗的SiO2/Si衬底用去离子水冲洗后，再用N2气吹干；
步骤2、在SiO2/Si衬底上采用磁控溅射方法镀制下电极TiN薄膜，具体包括以下子步骤：
(a)将经过步骤1清洗过的SiO2/Si衬底放入磁控溅射设备的真空腔室中，真空抽至3×10-3-5×10-4Pa，衬底温度为200-400℃，接入-100至-200V偏压；
(b)向真空腔室中通入氩气，流量为5-30sccm，调节功率为30-100W，预溅射时间为5-10min；
(c)向真空腔室中通入氮气，流量为1-10sccm，调节抽气阀至真空腔室压强为0.3-2Pa；
(d)调节Ti靶溅射功率为50-150W，溅射时间15-60min，沉积TiN薄膜厚度为75-300nm；
步骤3、在下电极TiN薄膜上采用磁控溅射沉积TaOx薄膜并掺杂Si，具体包括以下子步骤：
(a)将经过步骤2镀制下电极TiN薄膜放入设置有Ta和Si靶材的磁控溅射的真空腔室中；
(b)将真空腔室的真空抽至3×10-3-5×10-4Pa，接入-100至-200V偏压，温度设置为200-500℃；
(c)向真空腔室中通入氩气，流量为20-40sccm，调节Ta靶溅射功率为50-100W，Si靶溅射功率为50-100W，预溅射时间为5-10min；
(d)向真空腔室中通入氧气，流量为5-20sccm，腔内压强为0.5-5Pa；
(e)调节Ta靶和Si靶的溅射功率分别为80-180W和50-150W，Ta靶材和Si靶材交替溅射，Si靶材溅射时间为1-3min，Si靶材与Ta靶材溅射时间比为1：2-6，Si掺杂TaOx薄膜厚度为10-40nm；
步骤4、把经步骤3溅射沉积的Si掺杂TaOx薄膜放入N2氛围中快速退火30-60s,温度设置为500-750℃；
步骤5、磁控溅射镀制上电极，具体包括以下子步骤：
(a)把经过步骤4退火的Si掺杂TaOx薄膜放入磁控溅射真空腔室中；
(b)若溅射镀制上电极选自TiN，其磁控溅射过程与步骤2相同，若溅射镀制上电极选自Pt、Al或Ti中的一种，将真空腔室抽至3×10-3-5×10-4Pa，衬底温度为室温，向真空腔室中通入氩气，流量为5-20sccm，调节功率至5-40W，预溅射5-10min后正式溅射20-80min，沉积上电极厚度为75-300nm。
本发明有益效果是：一种改善TaOx基阻变存储器可靠性的硅掺杂磁控溅射工艺，包括以下步骤：(1)清洗SiO2/Si衬底，(2)在SiO2/Si衬底上采用磁控溅射方法镀制下电极TiN薄膜，(3)在下电极TiN薄膜上采用磁控溅射沉积TaOx薄膜并掺杂Si，(4)把经步骤3溅射沉积的Si掺杂TaOx薄膜进行退火，(5)磁控溅射镀制上电极。与已有的技术相比，本发明在TaOx薄膜中掺杂Si，能有效的调节TaOx薄膜中缺陷结构，增加了氧空位浓度，降低了器件的操作电压，增大了记忆窗口，提高器件的可靠性，且工艺流程简单，薄膜沉积速度快，可以为阻变存储器的大规模推广应用提供技术支持。
附图说明
图1是本发明工艺步骤流程图。
图2是本发明结构示意图。
图中：1、上电极，2、Si掺杂TaOx薄膜，3、下电极，4、SiO2/Si衬底。
图3是本发明掺杂工艺示意图。
图4是本发明实施例1的电流-电压测试曲线图。
图5是本发明实施例2的电流-电压测试曲线图。
图6是本发明实施例3的电流-电压测试曲线图。
图7是本发明实施例4的电流-电压测试曲线图。
具体实施方式
下面结合实施例对本发明作进一步说明。
实施例1
如图1所示，一种改善TaOx基阻变存储器可靠性的硅掺杂磁控溅射工艺，包括以下步骤：
步骤1、清洗SiO2/Si衬底，具体包括以下子步骤：
(a)将SiO2/Si衬底放入去离子水中超声清洗5min；
(b)将经过子步骤(a)清洗的SiO2/Si衬底放入丙酮中超声清洗5min；
(c)将经过子步骤(b)清洗的SiO2/Si衬底放入无水乙醇中超声清洗5min；
(d)将经过子步骤(c)清洗的SiO2/Si衬底用去离子水冲洗后，再用N2气吹干；
步骤2、在SiO2/Si衬底上采用磁控溅射方法镀制下电极TiN薄膜，具体包括以下子步骤：
(a)将经过步骤1清洗过的SiO2/Si衬底放入磁控溅射设备的真空腔室中，真空抽至5×10-4Pa，衬底温度为300℃，接入-150V偏压；
(b)向真空腔室中通入氩气，流量为30sccm，调节功率为50W，预溅射时间为10min；
(c)向真空腔室中通入氮气，流量为4sccm，调节抽气阀至真空腔室压强为0.5Pa；
(d)调节Ti靶溅射功率为120W，溅射时间30min，TiN薄膜厚度为150nm；
步骤3、在下电极TiN薄膜上采用磁控溅射沉积TaOx薄膜并掺杂Si，具体包括以下子步骤：
(a)将经过步骤2镀制下电极TiN薄膜放入设置有Ta和Si靶材的磁控溅射的真空腔室中；
(b)将真空腔室的真空抽至5×10-4Pa，接入-150V偏压，衬底温度为400℃；
(c)向真空腔室中通入氩气，流量为40sccm，调节Ta靶溅射功率为80W，Si靶溅射功率为50W，预溅射时间为10min；
(d)向真空腔室中通入氧气，流量为20sccm，腔内压强为1Pa；
(e)调节Ta靶和Si靶的溅射功率分别为100W，Ta靶材和Si靶材交替溅射，Si靶材溅射时间为1min，Ta靶材溅射时间为4min，Si掺杂TaOx薄膜厚度为20nm；
步骤4、把经步骤3溅射沉积的Si掺杂TaOx薄膜放入N2氛围中快速退火40s,温度设置为600℃；
步骤5、磁控溅射镀制TiN上电极，具体包括以下子步骤：
(a)把经过步骤4退火的Si掺杂TaOx薄膜放入磁控溅射真空腔室中；
(b)磁控溅射过程与步骤2相同，沉积TiN上电极厚度为150nm，电流-电压测试曲线如图4所示。
实施例2
本实施例中的步骤1至步骤4与实施例1中的步骤1至步骤4相同；
步骤5、磁控溅射镀制Pt上电极，具体包括以下子步骤：
(a)把经过步骤4退火的Si掺杂TaOx薄膜放入磁控溅射真空腔室中；
(b)将真空腔室抽至5×10-4Pa，衬底温度为室温，向真空腔室中通入氩气，流量为10sccm，调节功率至18W，预溅射10min后正式溅射40min，沉积Pt上电极厚度为150nm，电流-电压测试曲线如图5所示。
实施例3
本实施例中的步骤1至步骤4与实施例1中的步骤1至步骤4相同；
步骤5、磁控溅射镀制Al上电极，具体包括以下子步骤：
(a)把经过步骤4退火的Si掺杂TaOx薄膜放入磁控溅射真空腔室中；
(b)将真空腔室抽至5×10-4Pa，衬底温度为室温，向真空腔室中通入氩气，流量为12sccm，调节功率至18W，预溅射10min后正式溅射42min，沉积Al上电极厚度为150nm，电流-电压测试曲线如图6所示。
实施例4
本实施例中的步骤1至步骤4与实施例1中的步骤1至步骤4相同；
步骤5、磁控溅射镀制Ti上电极，具体包括以下子步骤：
(a)把经过步骤4退火的Si掺杂TaOx薄膜放入磁控溅射真空腔室中；
(b)将真空腔室抽至5×10-4Pa，衬底温度为室温，向真空腔室中通入氩气，流量为10sccm，调节功率至20W，预溅射10min后正式溅射44min，沉积Ti上电极厚度为150nm，电流-电压测试曲线如图7所示。

Claims (1)

1.一种改善TaOx基阻变存储器可靠性的硅掺杂磁控溅射工艺，其特征在于包括以下步骤：
步骤1、清洗SiO2/Si衬底，具体包括以下子步骤：
(a)将SiO2/Si衬底放入去离子水中超声清洗3-10min；
(b)将经过子步骤(a)清洗的SiO2/Si衬底放入丙酮中超声清洗3-10min；
(c)将经过子步骤(b)清洗的SiO2/Si衬底放入无水乙醇中超声清洗3-10min；
(d)将经过子步骤(c)清洗的SiO2/Si衬底用去离子水冲洗后，再用N2气吹干；
步骤2、在SiO2/Si衬底上采用磁控溅射方法镀制下电极TiN薄膜，具体包括以下子步骤：
(a)将经过步骤1清洗过的SiO2/Si衬底放入磁控溅射设备的真空腔室中，真空抽至3×10-3-5×10-4Pa，衬底温度为200-400℃，接入-100至-200V偏压；
(b)向真空腔室中通入氩气，流量为5-30sccm，调节功率为30-100W，预溅射时间为5-10min；
(c)向真空腔室中通入氮气，流量为1-10sccm，调节抽气阀至真空腔室压强为0.3-2Pa；
(d)调节Ti靶溅射功率为50-150W，溅射时间15-60min，沉积TiN薄膜厚度为75-300nm；
步骤3、在下电极TiN薄膜上采用磁控溅射沉积TaOx薄膜并掺杂Si，具体包括以下子步骤：
(a)将经过步骤2镀制下电极TiN薄膜放入设置有Ta和Si靶材的磁控溅射的真空腔室中；
(b)将真空腔室的真空抽至3×10-3-5×10-4Pa，接入-100至-200V偏压，温度设置为200-500℃；
(c)向真空腔室中通入氩气，流量为20-40sccm，调节Ta靶溅射功率为50-100W，Si靶溅射功率为50-100W，预溅射时间为5-10min；
(d)向真空腔室中通入氧气，流量为5-20sccm，腔内压强为0.5-5Pa；
(e)调节Ta靶和Si靶的溅射功率分别为80-180W和50-150W，Ta靶材和Si靶材交替溅射，Si靶材溅射时间为1-3min，Si靶材与Ta靶材溅射时间比为1：2-6，Si掺杂TaOx薄膜厚度为10-40nm；
步骤4、把经步骤3溅射沉积的Si掺杂TaOx薄膜放入N2氛围中快速退火30-60s,温度设置为500-750℃；
步骤5、磁控溅射镀制上电极，具体包括以下子步骤：
(a)把经过步骤4退火的Si掺杂TaOx薄膜放入磁控溅射真空腔室中；
(b)若溅射镀制上电极选自TiN，其磁控溅射过程与步骤2相同，若溅射镀制上电极选自Pt、Al或Ti中的一种，将真空腔室抽至3×10-3-5×10-4Pa，衬底温度为室温，向真空腔室中通入氩气，流量为5-20sccm，调节功率至5-40W，预溅射5-10min后正式溅射20-80min，沉积上电极厚度为75-300nm。
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