CN112782548A

CN112782548A - Antistatic test board of charging device model and test board applied to antistatic test board

Info

Publication number: CN112782548A
Application number: CN202011561893.9A
Authority: CN
Inventors: 毕寒; 尹彬锋; 周柯; 高金德
Original assignee: Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Current assignee: Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority date: 2020-12-25
Filing date: 2020-12-25
Publication date: 2021-05-11
Anticipated expiration: 2040-12-25
Also published as: CN112782548B

Abstract

The invention relates to a charging device model antistatic test machine of an LQFP packaging level chip, which relates to the manufacturing technology of a semiconductor integrated circuit.A plurality of LQFP packaging chip sockets are simultaneously arranged on a test board, and one LQFP packaging chip socket is arranged in a slot of each socket, so that a plurality of LQFP packaging chip sockets can be simultaneously carried on one test board, the test time is saved during the antistatic test of the charging device model, in addition, each LQFP packaging chip socket comprises a chip slot and a slot side wall formed by surrounding the slot, when the LQFP packaging chip is arranged in the chip slot, pins of the chip extend out of a body of the chip and are carried on the first surface of the slot side wall to support the pins of the chip, and the pins of the chip are supported during the test, namely the pins of the LQFP packaging chip are not suspended any more, thereby ensuring the accurate and nondestructive antistatic performance test and the subsequent functional and parameter test during the test, the accuracy and the test efficiency of the chip-level test are improved.

Description

Antistatic test board of charging device model and test board applied to antistatic test board

Technical Field

The invention relates to a semiconductor integrated circuit manufacturing technology, in particular to an antistatic testing machine platform of a charging device model of an LQFP (low-profile quad flat package) packaged chip.

Background

The antistatic performance test is a link in the reliability test and is used for representing the capability of a chip product for bearing static striking in actual use, and the charging device model is a project which must be tested in the antistatic test.

With the development of semiconductor technology, the packaging form of a chip is diversified, wherein a small-profile Quad Flat Package (LQFP), that is, an LQFP packaging form is one of the Low-profile Quad Flat Package (LQFP) packaging forms, specifically, referring to the chip schematic diagram of the typical LQFP packaging form shown in fig. 1, the thickness of the body 101 of the LQFP packaging chip 100 is generally 1.4mm, the leads 102 are suspended at four sides of the body 101, and the leads 102 are generally thin and the number of the leads can reach more than 200.

Currently, a plan view of a general test machine is shown in fig. 2a, a cross-sectional view of the general test machine along a suction hole of a charging plate is shown in fig. 2b, and the test machine includes: the charging board 110, the charging board 110 includes two fixing posts 111, and the fixing posts 111 are used for fixing the caliper 120; a caliper 120 including a plurality of fixing holes 121, two of which fixing posts 111 are inserted into the fixing holes 121 to fix the caliper 120 to the charging plate 110; a chip 100 clamped on the caliper 120 to fix the relative positions of the chip 100 and the caliper 120, and a suction hole 112 located below the chip 100 to suck and fix the chip 100; and a discharge needle 130 for discharging the pin 102 of the chip 100.

In the testing process, the testing machine platform charges the chip through the charging plate, the discharge needle presses any pin 102 downwards to complete one-time contact discharge, and then the discharge needle moves among different pins 102 to complete the antistatic performance test of all pins of the whole chip.

However, as shown in fig. 2b, the pin 102 is suspended, and in the antistatic testing process of the charging device model, the discharge needle 130 is in contact with the pin 102 of the suspended chip by physical pressing, so that the suspended pin 102 is easily bent and damaged by an external force in the whole testing process, and the current charging and discharging test on the pin 102 is interfered, and meanwhile, the pin 102 is in poor contact with the machine in the subsequent functional test and parameter test of the chip, so as to cause deviation or error of the test result.

Disclosure of Invention

The invention provides an antistatic test machine table of a charging device model of an LQFP packaging level chip, which comprises: the charging plate comprises at least two fixing columns and at least one suction hole, and the suction hole is used for sucking the LQFP packaged chip to the charging plate; the testing board comprises a plurality of LQFP packaged chip sockets, each LQFP packaged chip socket comprises a chip slot and a slot side wall formed by surrounding the slot, the slot side wall comprises a first surface and a second surface, the second surface further comprises at least two fixing holes, and the at least two fixing holes are used for enabling the at least two fixing columns to be inserted into the slot side walls so as to fix the testing board on the charging board and enable the suction holes to be located in the chip slot; and the LQFP packaging chip is arranged in the chip slot, so that the body of the LQFP packaging chip is positioned on the suction hole of the charging plate, the pins of the LQFP packaging chip extend out of the body of the LQFP packaging chip and are partially loaded on the first surface of the side wall of the slot, and the pins of the LQFP packaging chip are supported by the first surface of the side wall of the slot.

Furthermore, the width of the first surface is smaller than that of the second surface, so that one side of the side wall of the slot, which is close to the chip slot, forms a slope from the second surface to the first surface.

Furthermore, the pins of the LQFP packaged chip comprise a protruding part, a bent part and an extending part, the protruding part extends out from the body of the LQFP packaged chip in parallel, the extending part and the protruding part are arranged in parallel, the extending part is higher than the protruding part, and the bent part is connected with the extending part so that the bent part forms an obliquely upward outward mode and extends out from the chip slot.

Furthermore, the chip slot penetrates through the first face and the second face to form the LQFP package chip socket with a hollow structure.

Furthermore, two fixing holes on the second surface are positioned on the oblique opposite corners of the LQFP package chip socket so as to fix the test board on the charging board through the combination of the fixing columns and the fixing holes.

Furthermore, the side wall of the slot is made of an insulating material.

The invention also provides a test board for the antistatic test machine platform of the charging device model of the LQFP packaging level chip, which comprises the following components: each LQFP package chip socket comprises a chip slot and a slot side wall formed by surrounding the slot, the slot side wall comprises a first face and a second face, the second face comprises at least two fixing holes, the at least two fixing holes are used for enabling fixing columns on the charging plate to be inserted into the fixing holes, and the first face is used for bearing pins of the LQFP package chips.

Drawings

Fig. 1 is a schematic diagram of a chip in a typical LQFP package format.

FIG. 2a is a schematic plan view of a general testing machine.

FIG. 2b is a schematic cross-sectional view of a universal test machine along a suction hole of a charging plate.

FIG. 3 is a cross-sectional view of a test stand along a suction hole of a charging plate according to an embodiment of the present invention.

FIG. 4 is a schematic plan view of a test board according to an embodiment of the invention.

Fig. 5 is a cross-sectional view of an LQFP package chip socket according to an embodiment of the present invention.

Detailed Description

The technical solutions in the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.

It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity, and the same reference numerals denote the same elements throughout. It will be understood that when an element or layer is referred to as being "on" …, "adjacent to …," "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on …," "directly adjacent to …," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

Spatial relationship terms such as "under …", "under …", "below", "under …", "above …", "above", and the like, may be used herein for ease of description to describe the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "below …" and "below …" can encompass both an orientation of up and down. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.

In an embodiment of the present invention, an antistatic test machine for a charging device model of an LQFP package-level chip is provided, and specifically, refer to fig. 3, fig. 4 and fig. 5, where fig. 3 is a schematic cross-sectional view of a test machine along a suction hole of a charging board according to an embodiment of the present invention, and fig. 4 is a schematic plan view of the test board according to an embodiment of the present invention. Fig. 5 is a cross-sectional view of an LQFP package chip socket according to an embodiment of the present invention. The antistatic test machine for the charging device model of the LQFP package-level chip in one embodiment of the invention comprises:

a charging plate 210, wherein the charging plate 210 comprises at least two fixing posts (not shown) and at least one suction hole 212, and the suction hole 212 is used for sucking the LQFP packaged chip 200 to the charging plate 210;

the testing board 300, the testing board 300 includes a plurality of LQFP package chip sockets 310, each LQFP package chip socket 310 includes a chip slot 312 and a slot sidewall 311 formed around the slot 312, the slot sidewall 311 includes a first side 3111 and a second side 3112, the second side 3112 further includes at least two fixing holes (not shown in the figure) for inserting therein the at least two fixing posts to fix the testing board 300 on the charging board 210, and the suction holes 212 are located in the chip slot 312;

the LQFP packaged chip 200 is disposed in the chip socket 312, such that the body of the LQFP packaged chip 200 is located on the suction hole 212 of the charging plate 210, the leads 202 of the LQFP packaged chip 200 extend from the body of the LQFP packaged chip 200 and are partially carried on the first face 3111 of the socket sidewall 311, and the leads 202 of the LQFP packaged chip 200 are supported by the first face 3111 of the socket sidewall 311.

Thus, by disposing a plurality of LQFP packaged chip sockets 310 on the test board 300 at the same time, and disposing one LQFP packaged chip socket 310 in the socket 312 of each socket 310, one test board 300 can simultaneously carry a plurality of LQFP packaged chip sockets 310, and testing time can be saved during the antistatic testing of the charging device model, and by making each LQFP packaged chip socket include the chip socket 312 and the socket sidewall 311 formed around the socket 312, when the LQFP packaged chip 200 is disposed in the chip socket 312, the leads 202 of the LQFP packaged chip 200 protrude from the body of the LQFP packaged chip 200 and are carried on the first surface of the socket sidewall 311 to support the leads 202 of the LQFP packaged chip 200, and support is provided for the leads 202 of the LQFP packaged chip 200 during the testing, i.e. the leads 202 of the LQFP packaged chip 200 are not suspended any more, thereby ensuring accurate and nondestructive testing and subsequent functionality and parameter testing during the testing, the accuracy and the test efficiency of the chip-level test are improved.

As shown in fig. 3 and 5, the LQFP package chip socket 310 includes a chip socket 312 and a socket sidewall 311 formed around the socket 312, the socket sidewall 311 including a first face 3111 and a second face 3112. Specifically, the width of the first surface 3111 is smaller than that of the second surface 3112, so that a slope 3113 is formed from the second surface 3112 to the first surface 3111 on the side of the slot sidewall 311 near the chip slot 312. More specifically, referring to fig. 3, the leads 202 of the LQFP packaged chip 200 include an extending portion 2021, a bending portion 2022 and an extending portion 2023, the extending portion 2021 extends from the body of the LQFP packaged chip 200 in parallel, the extending portion 2023 is disposed in parallel with the extending portion 2021, the extending portion 2023 is higher than the extending portion 2021, the bending portion 2022 connects the extending portion 2023 and the extending portion 2021, so that the bending portion 2022 extends from the chip socket 312 in an obliquely upward and outward manner, the leads 202 of the LQFP packaged chip 200 extend from the chip socket 312 without touching the chip socket 312, and the extending portion 2023 can be carried on the first surface 3111 of the socket sidewall 311.

In an embodiment of the invention, the chip socket 312 penetrates the first face 3111 and the second face 3112 to form the LQFP package chip socket 310 with a hollow structure.

In an embodiment of the invention, two fixing holes on the second surface are located on the diagonal corners of the LQFP package chip socket to fix the test board 300 on the charging board 210 through the combination of the fixing posts and the fixing holes.

In an embodiment of the present invention, the slot sidewall 311 is made of an insulating material.

In an embodiment of the present invention, there is further provided a test board for a charged device model antistatic test machine of an LQFP package-level chip, as shown in fig. 4 and 5, the test board 300 includes: each of the LQFP package chip sockets 310 includes a chip socket 312 and a socket sidewall 311 formed around the socket 312, the socket sidewall 311 includes a first surface 3111 and a second surface 3112, the second surface 3112 further includes at least two fixing holes (not shown in the figure) for inserting therein fixing posts on the charging board, and the first surface 3111 is used for carrying pins of the LQFP package chip 200.

As shown in fig. 3 and 5, the LQFP package chip socket 310 includes a chip socket 312 and a socket sidewall 311 formed around the socket 312, the socket sidewall 311 including a first face 3111 and a second face 3112. Specifically, the width of the first surface 3111 is smaller than the width of the second surface 3112, so that a slope 3113 is formed from the second surface 3112 to the first surface 3111 on a side of the socket sidewall 311 close to the chip socket 312, the leads 202 of the LQFP packaged chip 200 extend from the chip socket 312 without touching the chip socket 312, and the extension portion 2023 can be carried on the first surface 3111 of the socket sidewall 311.

In the testing process, the testing machine platform charges the LQFP packaged chip through the charging plate, the discharge needle 410 presses any pin 202 downwards to complete one-time contact discharge, and then the discharge needle 410 moves among different pins 202 to complete the antistatic performance test of all pins of the whole chip. Because the pins 202 are carried by the side walls of the slots, the pins 202 are not bent or damaged due to physical pressing of the discharge needles 410 in the antistatic testing process of the charging device model, so that the accuracy of the current and subsequent testing results is ensured.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. The utility model provides an antistatic test board of device model that charges of LQFP encapsulation level chip which characterized in that includes:

the charging plate comprises at least two fixing columns and at least one suction hole, and the suction hole is used for sucking the LQFP packaged chip to the charging plate;

the testing board comprises a plurality of LQFP packaged chip sockets, each LQFP packaged chip socket comprises a chip slot and a slot side wall formed by surrounding the slot, the slot side wall comprises a first surface and a second surface, the second surface further comprises at least two fixing holes, and the at least two fixing holes are used for enabling the at least two fixing columns to be inserted into the slot side walls so as to fix the testing board on the charging board and enable the suction holes to be located in the chip slot; and

and the LQFP packaging chip is arranged in the chip slot, so that the body of the LQFP packaging chip is positioned on the suction hole of the charging plate, the pins of the LQFP packaging chip extend out of the body of the LQFP packaging chip and are partially loaded on the first surface of the side wall of the slot, and the pins of the LQFP packaging chip are supported by the first surface of the side wall of the slot.

2. A charged device model antistatic test machine of LQFP package level chip as claimed in claim 1, wherein the width of the first face is smaller than the width of the second face, such that the side of the slot sidewall near the chip slot forms a slope from the second face to the first face.

3. The platform of claim 2, wherein the leads of the LQFP package chip comprise a protrusion extending parallel to the body of the LQFP package chip, a bending portion extending parallel to the protrusion and higher than the protrusion, and an extension portion connecting the extension portion and the protrusion such that the bending portion extends from the chip socket in a direction obliquely upward and outward.

4. A charging device model antistatic test machine platform of LQFP package level chips as claimed in claim 1, wherein the chip slot penetrates through the first and second faces to form a hollow LQFP package chip socket.

5. A charged device model antistatic test bench for LQFP package level chips as claimed in claim 1, wherein two fixing holes on the second face are located on diagonal corners of the LQFP package chip socket to fix the test board on the charging board by the combination of the fixing posts and the fixing holes.

6. The LQFP package-level chip charging device model antistatic test board of claim 1, wherein the slot side walls are made of an insulating material.

7. A kind of testing plate used for antistatic testing machine platform of charged device model of LQFP capsulates the chip, characterized by that, including: each LQFP package chip socket comprises a chip slot and a slot side wall formed by surrounding the slot, the slot side wall comprises a first face and a second face, the second face comprises at least two fixing holes, the at least two fixing holes are used for enabling fixing columns on the charging plate to be inserted into the fixing holes, and the first face is used for bearing pins of the LQFP package chips.

8. The testing board of the charged device model antistatic testing machine for the LQFP package-level chip of claim 7, wherein the width of the first side is smaller than the width of the second side, such that a side of the slot sidewall near the chip slot forms a slope from the second side to the first side.

9. A test board of a charging device model antistatic test machine for LQFP package level chip as claimed in claim 7, wherein the chip slot penetrates through the first and second faces to form a hollow LQFP package chip socket.

10. A test board of a charged device model antistatic test machine for LQFP package-level chips as claimed in claim 7, wherein two fixing holes on the second face are located on the diagonal corners of the socket of the LQFP package chip so as to fix the test board on the charging board by the combination of the fixing posts and the fixing holes.