CN112782548B - Antistatic test machine of charging device model and test board applied to antistatic test machine - Google Patents
Antistatic test machine of charging device model and test board applied to antistatic test machine Download PDFInfo
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- CN112782548B CN112782548B CN202011561893.9A CN202011561893A CN112782548B CN 112782548 B CN112782548 B CN 112782548B CN 202011561893 A CN202011561893 A CN 202011561893A CN 112782548 B CN112782548 B CN 112782548B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
Abstract
The invention relates to a charging device model antistatic test machine for LQFP package level chips, which relates to a semiconductor integrated circuit manufacturing technology, wherein a plurality of LQFP package chip sockets are simultaneously arranged on a test board, one LQFP package chip socket is arranged in a slot of each socket, so that a plurality of LQFP package chip sockets can be simultaneously borne on one test board, the test time is saved during antistatic test of the charging device model, and in addition, each LQFP package chip socket comprises a chip slot and a slot side wall formed by encircling the slot, when the LQFP package chip is arranged in the chip slot, pins of the chip extend out from a body of the chip and are borne on a first surface of the slot side wall to support pins of the chip, and in the test process, the pins of the chip are not suspended any more, thereby ensuring accurate nondestructive antistatic performance test and subsequent functional and parameter test, and improving the accuracy and the test efficiency of the chip level test.
Description
Technical Field
The invention relates to a semiconductor integrated circuit manufacturing technology, in particular to an antistatic test machine for a charging device model of an LQFP package-level chip.
Background
The antistatic performance test is a link in the reliability test and is used for representing the capability of a chip product to bear static striking in actual use, and the charging device model is an item which is necessary to be tested in the antistatic test.
With the development of semiconductor technology, the packaging forms of chips are diversified, wherein a small quad flat package (Low-profile Quad Flat Package, LQFP), that is, an LQFP packaging form is one of them, specifically, referring to a chip schematic diagram of a typical LQFP packaging form in fig. 1, the thickness of a body 101 of an LQFP packaging chip 100 is generally 1.4mm, and pins 102 are suspended on four sides of the body 101, and the number of pins 102 is generally very thin and can reach more than 200.
At present, a schematic plan view of a general test machine is shown in fig. 2a, a schematic section view of a general test machine along a suction hole of a charging plate is shown in fig. 2b, and the test machine includes: the charging plate 110, the charging plate 110 includes two fixing columns 111, the fixing columns 111 are used for fixing the caliper 120; a caliper 120 including a plurality of fixing holes 121, the fixing posts 111 being inserted into two of the fixing holes 121 to fix the caliper 120 to the charging plate 110; the chip 100 is clamped on the caliper 120, so that the relative positions of the chip 100 and the caliper 120 are fixed, and the suction hole 112 is positioned below the chip 100 to adsorb and fix the chip 100; and a discharge needle 130 for discharging the pins 102 of the chip 100.
In the testing process, the testing machine charges the chip through the charging plate, the discharging needle presses down any pin 102 to finish one-time contact discharging, and then the discharging needle moves among different pins 102 to finish the antistatic performance test of all pins of the whole chip.
However, as shown in fig. 2b, the pin 102 is suspended, and in the antistatic test process of the charging device model, the discharge needle 130 is in contact with the suspended pin 102 of the chip by physical pressing, so that the suspended pin 102 is easily damaged by bending caused by external force in the whole test process, and the current charge and discharge test of the pin 102 is interfered, and meanwhile, the poor contact between the pin 102 and the machine in the subsequent functional test and parameter test of the chip is caused, so that the test result is deviated or wrong.
Disclosure of Invention
The invention provides an antistatic test machine for a charging device model of an LQFP package-level chip, which comprises: the charging plate comprises at least two fixing columns and at least one suction hole, and the suction hole is used for adsorbing the LQFP packaging chip to the charging plate; the test board comprises a plurality of LQFP packaging chip sockets, each LQFP packaging chip socket comprises a chip slot and a slot side wall formed by encircling the slot, the slot side wall comprises a first surface and a second surface, the second surface also comprises at least two fixing holes, and the at least two fixing holes are used for enabling the at least two fixing columns to be inserted into the fixing holes so as to fix the test board on the charging board, and enabling the suction holes to be positioned in the chip slot; and the LQFP package chip is arranged in the chip slot, so that the body of the LQFP package chip is positioned on the suction hole of the charging plate, pins of the LQFP package chip extend out of the body of the LQFP package chip and are partially borne on the first surface of the side wall of the slot, and the pins of the LQFP package chip are supported by the first surface of the side wall of the slot.
Further, the width of the first surface is smaller than that of the second surface, so that a slope is formed from the second surface to the first surface on one side of the side wall of the slot, which is close to the chip slot.
Further, the pins of the LQFP package chip comprise extending parts, bending parts and extending parts, the extending parts extend out of the body of the LQFP package chip in parallel, the extending parts are arranged in parallel with the extending parts and higher than the extending parts, and the bending parts are connected with the extending parts and the extending parts so that the bending parts extend out of the chip slot in an inclined upward and outward mode.
Furthermore, the chip slot penetrates through the first surface and the second surface to form the LQFP packaging chip socket with a hollow structure.
Further, the two fixing holes on the second surface are positioned on the diagonal corner of the LQFP packaging chip socket, so that the test board is fixed on the charging board through the combination of the fixing columns and the fixing holes.
Further, the side wall of the slot is made of insulating materials.
The invention also provides a test board of the antistatic test machine of the charging device model for the LQFP package-level chip, which comprises: each LQFP packaging chip socket comprises a chip slot and a slot side wall formed by encircling the slot, the slot side wall comprises a first surface and a second surface, the second surface comprises at least two fixing holes, the at least two fixing holes are used for enabling fixing columns on a charging plate to be inserted into the fixing holes, and the first surface is used for bearing pins of the LQFP packaging chips.
Further, the width of the first surface is smaller than that of the second surface, so that a slope is formed from the second surface to the first surface on one side of the side wall of the slot, which is close to the chip slot.
Furthermore, the chip slot penetrates through the first surface and the second surface to form the LQFP packaging chip socket with a hollow structure.
Further, the two fixing holes on the second surface are positioned on the diagonal corner of the LQFP packaging chip socket, so that the test board is fixed on the charging board through the combination of the fixing columns and the fixing holes.
Drawings
Fig. 1 is a schematic diagram of a chip in a typical LQFP package.
FIG. 2a is a schematic plan view of a generic test station.
Fig. 2b is a schematic cross-sectional view of the universal test station along the suction hole of the charging plate.
Fig. 3 is a schematic cross-sectional view of a test station along a suction hole of a charging plate according to an embodiment of the invention.
Fig. 4 is a schematic plan view of a test board according to an embodiment of the invention.
Fig. 5 is a schematic cross-sectional view of an LQFP packaged chip socket according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made more apparent and fully hereinafter with reference to the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be understood that the present invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size of layers and regions, as well as the relative sizes, may be exaggerated for the same elements throughout. It will be understood that when an element or layer is referred to as being "on" …, "" adjacent to "…," "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected to or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on" …, "" directly adjacent to "…," "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
Spatially relative terms, such as "under …," "under …," "below," "under …," "above …," "above," and the like, may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "under" or "beneath" other elements would then be oriented "on" the other elements or features. Thus, the exemplary terms "under …" and "under …" may include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
The following description of the embodiments of the present invention will be made more apparent and fully hereinafter with reference to the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In an embodiment of the invention, an antistatic testing machine for a charging device model of an LQFP package-level chip is provided, and in particular, reference may be made to fig. 3, fig. 4 and fig. 5, fig. 3 is a schematic drawing Kong Poumian of the testing machine along a charging board according to an embodiment of the invention, and fig. 4 is a schematic plan view of the testing board according to an embodiment of the invention. Fig. 5 is a schematic cross-sectional view of an LQFP packaged chip socket according to an embodiment of the present invention. The charging device model antistatic test machine of the LQFP package level chip of the embodiment of the invention comprises:
a charging board 210, the charging board 210 includes at least two fixing posts (not shown in the figure) and at least one suction hole 212, and the suction hole 212 is used for adsorbing the LQFP package chip 200 to the charging board 210;
the test board 300, the test board 300 includes a plurality of LQFP package chip sockets 310, each LQFP package chip socket 310 includes a chip socket 312 and a socket sidewall 311 formed around the socket 312, the socket sidewall 311 includes a first surface 3111 and a second surface 3112, the second surface 3112 further includes at least two fixing holes (not shown) for inserting the at least two fixing posts therein to fix the test board 300 on the charging board 210, and the suction holes 212 are located in the chip socket 312;
the LQFP package chip 200 is placed in the chip socket 312 such that the body of the LQFP package chip 200 is located on the suction hole 212 of the charging board 210, and the leads 202 of the LQFP package chip 200 extend from the body of the LQFP package chip 200 and are partially carried on the first face 3111 of the socket side wall 311, and the leads 202 of the LQFP package chip 200 are supported by the first face 3111 of the socket side wall 311.
Thus, by simultaneously disposing a plurality of LQFP package chip sockets 310 on the test board 300, one LQFP package chip socket 310 is disposed in the slot 312 of each socket 310, so that a plurality of LQFP package chip sockets 310 are simultaneously supported on one test board 300, and test time is saved during antistatic test of the charging device model, and by disposing each LQFP package chip socket including the chip slot 312 and the slot side wall 311 formed around the slot 312, when the LQFP package chip 200 is disposed in the chip slot 312, the pins 202 of the LQFP package chip 200 extend from the body of the LQFP package chip 200 and are supported on the first surface of the slot side wall 311 to support the pins 202 of the LQFP package chip 200, and support is provided for the pins 202 of the LQFP package chip 200 during test, i.e., the pins 202 of the LQFP package chip 200 are not suspended any more, thereby ensuring accurate and nondestructive antistatic performance test and subsequent functional and parametric test during test, and improving accuracy and test efficiency of chip level test.
As shown in fig. 3 and 5, the LQFP packaged chip socket 310 includes a chip socket 312 and a socket side wall 311 formed around the socket 312, the socket side wall 311 including a first face 3111 and a second face 3112. Specifically, the width of the first surface 3111 is smaller than the width of the second surface 3112, so that a slope 3113 is formed from the second surface 3112 to the first surface 3111 on a side of the slot sidewall 311 near the chip slot 312. More specifically, referring to fig. 3, the leads 202 of the LQFP package chip 200 include an extension portion 2021, a bending portion 2022 and an extension portion 2023, the extension portion 2021 extends from the body of the LQFP package chip 200 in parallel, the extension portion 2023 is disposed parallel to the extension portion 2021, the extension portion 2023 is higher than the extension portion 2021, the bending portion 2022 connects the extension portion 2023 and the extension portion 2021, such that the bending portion 2022 extends from the chip socket 312 in a manner of forming an oblique upward and outward direction, and such that the leads 202 of the LQFP package chip 200 extend from the chip socket 312 without touching the chip socket 312, and the extension portion 2023 may be carried on the first surface 3111 of the socket sidewall 311.
In one embodiment of the present invention, the chip socket 312 penetrates the first surface 3111 and the second surface 3112 to form the LQFP package chip socket 310 with a hollow structure.
In an embodiment of the present invention, two fixing holes on the second surface are located on diagonal corners of the LQFP package chip socket, so as to fix the test board 300 to the charging board 210 through the combination of the fixing posts and the fixing holes.
In an embodiment of the present invention, the slot sidewall 311 is made of an insulating material.
In an embodiment of the present invention, there is also provided a test board for a charging device model antistatic test machine for LQFP package-level chips, as shown in fig. 4 and 5, the test board 300 includes: a plurality of LQFP package chip sockets 310, each LQFP package chip socket 310 includes a chip socket 312 and a socket side wall 311 formed around the socket 312, the socket side wall 311 includes a first surface 3111 and a second surface 3112, and the second surface 3112 further includes at least two fixing holes (not shown) for fixing posts on a charging board to be inserted therein, and the first surface 3111 is for carrying pins of the LQFP package chip 200.
As shown in fig. 3 and 5, the LQFP packaged chip socket 310 includes a chip socket 312 and a socket side wall 311 formed around the socket 312, the socket side wall 311 including a first face 3111 and a second face 3112. Specifically, the width of the first surface 3111 is smaller than that of the second surface 3112, such that a slope 3113 is formed between the second surface 3112 and the first surface 3111 on a side of the slot sidewall 311 near the chip slot 312, such that the leads 202 of the LQFP package chip 200 protrude from the chip slot 312 without touching the chip slot 312, and the extension 2023 may be carried on the first surface 3111 of the slot sidewall 311.
In one embodiment of the present invention, the chip socket 312 penetrates the first surface 3111 and the second surface 3112 to form the LQFP package chip socket 310 with a hollow structure.
In an embodiment of the present invention, two fixing holes on the second surface are located on diagonal corners of the LQFP package chip socket, so as to fix the test board 300 to the charging board 210 through the combination of the fixing posts and the fixing holes.
In an embodiment of the present invention, the slot sidewall 311 is made of an insulating material.
In the testing process, the testing machine charges the LQFP packaging chip through the charging plate, the discharging needle 410 presses down any pin 202 to finish one-time contact discharging, and then the discharging needle 410 moves among different pins 202 to finish the antistatic performance test of all pins of the whole chip. Since the pins 202 are carried by the side walls of the slots, the pins 202 cannot be bent and damaged due to the physical pressing of the discharge needles 410 in the antistatic test process of the charging device model, and the accurate and correct test results of the current and subsequent tests are ensured.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.
Claims (3)
1. An antistatic test machine for a charging device model of an LQFP package-level chip is characterized by comprising:
the charging plate comprises at least two fixing columns and at least one suction hole, and the suction hole is used for adsorbing the LQFP packaging chip to the charging plate;
the test board comprises a plurality of LQFP package chip sockets, each LQFP package chip socket comprises a chip slot and a slot side wall formed by encircling the slot, the slot side wall comprises a first surface and a second surface, the width of the first surface is smaller than that of the second surface, one side, close to the chip slot, of the slot side wall forms a slope from the second surface to the first surface, the second surface also comprises at least two fixing holes, the at least two fixing holes are used for enabling the at least two fixing columns to be inserted into the fixing holes so as to fix the test board on the charging board, the suction holes are arranged in the chip slot, and the chip slot penetrates through the first surface and the second surface to form the LQFP package chip socket with a hollow structure; and
the LQFP package chip is arranged in the chip slot so that the body of the LQFP package chip is positioned on the suction hole of the charging plate, pins of the LQFP package chip extend out from the body of the LQFP package chip and are partially borne on the first surface of the side wall of the slot, the first surface of the side wall of the slot is used for supporting the pins of the LQFP package chip, the pins of the LQFP package chip comprise an extending part, a bending part and an extending part, the extending part extends out from the body of the LQFP package chip in parallel, the extending part is arranged in parallel with the extending part and is higher than the extending part, and the bending part is connected with the extending part and the extending part so that the bending part extends out from the inside of the chip slot in an inclined upward and outward mode.
2. The LQFP package level chip charging device model static electricity resistance test machine according to claim 1, wherein the two fixing holes on the second surface are located on diagonal corners of the LQFP package chip socket, so that the test board is fixed on the charging board by the combination of the fixing posts and the fixing holes.
3. The LQFP package level chip of claim 1, wherein the socket sidewalls are made of an insulating material.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011561893.9A CN112782548B (en) | 2020-12-25 | 2020-12-25 | Antistatic test machine of charging device model and test board applied to antistatic test machine |
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| CN202011561893.9A CN112782548B (en) | 2020-12-25 | 2020-12-25 | Antistatic test machine of charging device model and test board applied to antistatic test machine |
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Families Citing this family (2)
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| CN114019195A (en) * | 2021-10-29 | 2022-02-08 | 上海华力集成电路制造有限公司 | Chip antistatic performance test board |
| CN114545211A (en) * | 2022-04-25 | 2022-05-27 | 江铃汽车股份有限公司 | Packaged chip antistatic capability detection system |
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