CN112670165A

CN112670165A - Growth method of silicon carbide epitaxial bottom layer

Info

Publication number: CN112670165A
Application number: CN202011547217.6A
Authority: CN
Inventors: 陈威佑; 胡智威; 蔡长祐; 蔡清富
Original assignee: Nanjing Baishi Electronic Technology Co ltd
Current assignee: Nanjing Baishi Electronic Technology Co ltd
Priority date: 2020-12-24
Filing date: 2020-12-24
Publication date: 2021-04-16
Anticipated expiration: 2040-12-24
Also published as: CN112670165B

Abstract

The invention discloses a growth method of a silicon carbide epitaxial bottom layer, which is characterized in that in the process of growing a buffer layer, a layer of thin barrier layers with different carbon-silicon ratios are stacked, vertical dislocation of a substrate is effectively prevented from extending upwards to an epitaxial layer, the growth of dislocation is further stopped by regulating the carbon-silicon ratio in the growth process of the epitaxial bottom layer, the number of micro-holes on the surface of the epitaxial layer is effectively reduced by 1-2 levels, the surface quality of the epitaxial layer is improved, and in the subsequent application of triode devices, the electrical defect rate caused by the micro-holes on the surface is reduced, so that the stability and performance of device products are improved.

Description

Growth method of silicon carbide epitaxial bottom layer

Technical Field

The invention relates to the field of silicon carbide materials, in particular to a growth method of a silicon carbide epitaxial bottom layer.

Background

The silicon carbide material is suitable for manufacturing electronic devices with high temperature, high frequency, high power, radiation resistance, corrosion resistance and the like, has wide application prospect in the aspects of communication, automobiles, aviation, spaceflight, oil exploitation, national defense and the like, and belongs to international high-end advanced materials. In order to realize the development of silicon carbide electronic devices, homoepitaxy must be carried out on a silicon carbide substrate to grow an epitaxial structure required by the devices.

The silicon carbide epitaxial layer produced in the prior art has a structure that a concentration buffer layer is stacked on a high-concentration doped silicon carbide substrate, and epitaxial layers with different thicknesses and doping concentrations grow on the buffer layer according to the design of pressure resistance. Generally, the thickness, concentration, and number of surface defects of the epitaxial layer affect device characteristics. The existing epitaxial technology can effectively control the defects with larger surface size, such as triangular defects, carrot defects, linear defects, comet defects and the like, and the quantity of the defects is less than 1/cm². But the number of the surface micro-pits is up to more than 50000 per chip.

The current epitaxy technology focuses on improving the uniformity of thickness and doping concentration and reducing the number of large surface defects, but does not provide a systematic and effective method for reducing the number of small surface micro-cavities.

Disclosure of Invention

The purpose of the invention is as follows: in order to solve the problems in the prior art, the invention provides a growth method of a silicon carbide epitaxial bottom layer, which reduces the number of surface defects and micro pits and produces a high-quality silicon carbide epitaxial layer.

The technical scheme is as follows: in order to achieve the purpose, the invention can adopt the following technical scheme:

a growth method of a silicon carbide epitaxial bottom layer comprises the following steps:

1) growing a first buffer layer on an n-type silicon carbide substrate at 1600-1650 ℃; the carbon-silicon ratio is 1.2-1.0, and the thickness is 0.5-1.5 μm;

2) raising the temperature to 1680-1700 ℃; growing a second thin barrier layer on the first buffer layer, wherein the thickness of the second thin barrier layer is 0.1-0.3 um, the carbon-silicon ratio is 1.0-0.9, and the length of the second thin barrier layer is increased to 1.3-1.5 times of that of the first thin barrier layer in the step 1);

3) when the temperature is reduced to below 1600 ℃, the epitaxial layer part is grown, and the carbon-silicon ratio is 1.0-0.9.

Furthermore, the n-type silicon carbide substrate in the step 1) is a silicon surface silicon carbide substrate deviated from the <11-20> direction by 0-8 degrees.

Furthermore, the pressure in the step 1) is set to be 5-7 KPa; maintaining the reaction temperature for 1-15 min.

Further, the pressure in the step 2) is set to be 3-5 KPa; maintaining the reaction temperature for 1-10 min.

Furthermore, the pressure in the step 3) is set to be 8-10 KPa; maintaining the reaction temperature for 5-60 min.

Has the advantages that: the invention has the following advantages:

1) the buffer layers grown under different conditions can generate slight lattice distortion displacement, so that the Berger vector of the vertical dislocation of the substrate is changed, and the driving force of the vertical dislocation extending upwards to the epitaxial layer is reduced; effectively controlling the number of surface micro-holes to be 10⁴The following, and at the same time, has the advantages of high uniformity and low surface defects;

2) the growth of dislocation is further stopped by regulating the proportion of carbon and silicon in the growth process of the epitaxial bottom layer, and the number of surface micro-holes of the epitaxial layer is reduced.

3) In the process of growing the buffer layer, a layer of thin barrier layers with different carbon-silicon ratios is stacked, vertical dislocation of the substrate is effectively prevented from extending upwards to the epitaxial layer, the number of the micro-holes on the surface of the epitaxial layer is effectively reduced by 1-2 levels, the surface quality of the epitaxial layer is improved, the electrical reject ratio caused by the micro-holes on the surface is reduced in the subsequent application of a triode device, and the stability and performance of the device product are further improved.

Drawings

FIG. 1 is a schematic view of a silicon carbide epitaxial structure according to example 1 of the present invention;

FIG. 2 is a schematic electron microscope comparison of the barrier layer of the conventional SiC epitaxial structure of comparative example 1 and the barrier layer of the SiC epitaxial structure prepared in example 1 in accordance with the present invention.

Detailed Description

Example 1:

referring to fig. 1, a method for growing a silicon carbide epitaxial bottom layer disclosed by the present invention includes the following steps:

1) placing a silicon carbide substrate with an n-type (0001) crystal face being off-axis by 4 degrees towards the <11-20> direction into a SiC epitaxial reaction chamber carrying inner base;

2) introducing hydrogen, setting the pressure to be 15KPa, heating to 1600 ℃ in the hydrogen environment, maintaining the temperature of the reaction chamber for 10min, and etching the surface of the substrate;

3) introducing carbon-silicon gas and nitrogen as a doping gas in a mode that the flow rate is gradually increased along with the set time, and growing a first buffer layer with the thickness of 0.5um under the conditions that the reaction temperature is increased to 1650 ℃ along with the set time, the flow rate ratio of the carbon-silicon gas is 1.2, the flow rate of the nitrogen is 75sccm, and the reaction pressure is 5 KPa; the reaction temperature was maintained for 10 min.

4) Raising the temperature to 1680-700 ℃; growing a second thin barrier layer with the thickness of 0.1-0.3 um on the first buffer layer, and drawing the second thin barrier layer at the speed of 1.5 times that of the step 1) at the flow ratio of carbon to silicon of 0.95; the pressure drops to 5 kpa; the reaction temperature was maintained for 1 min.

5) Reducing the reaction temperature to 1600 ℃, growing a silicon carbide epitaxial layer, wherein the flow rate ratio range of the carbon-silicon gas is 0.98, and the flow rate range of the nitrogen gas of the doping gas is 30 sccm; the pressure was set at 10KPa and the reaction temperature was maintained for 60 min.

6) And (3) keeping the reaction chamber in a hydrogen environment, stopping introducing carbon-silicon gas and nitrogen, stopping introducing hydrogen when the temperature is reduced to below 600 ℃, vacuumizing the reaction chamber to below 1KPa, introducing argon to one atmosphere, circulating for 5 times, opening the reaction chamber, taking out the epitaxial wafer, and detecting the surface of the epitaxial wafer by using a SICA88 surface defect detector of Lasertec company.

Comparative example 1:

conventional silicon carbide epitaxial structures do not include a thin barrier layer as the second layer.

Taking the silicon carbide epitaxial structures prepared in the embodiment 1 and the comparative example 1 to carry out surface electron microscope analysis, as shown in fig. 2, it can be seen that the invention effectively prevents the vertical dislocation of the substrate from extending upwards to the epitaxial layer, effectively reduces the number of micro-holes on the surface of the epitaxial layer and improves the surface quality of the epitaxial layer.

Claims

1. A growth method of a silicon carbide epitaxial bottom layer is characterized by comprising the following steps:

2. The method of growing a silicon carbide epitaxial underlayer of claim 1, wherein: the n-type silicon carbide substrate in the step 1) is a silicon surface silicon carbide substrate which deviates from the <11-20> direction by 0-8 degrees.

3. The method of growing a silicon carbide epitaxial underlayer of claim 1, wherein: setting the pressure to be 5-7 KPa in the step 1); maintaining the reaction temperature for 1-15 min.

4. The method of growing a silicon carbide epitaxial underlayer of claim 1, wherein: setting the pressure to be 3-5 KPa in the step 2); maintaining the reaction temperature for 1-10 min.

5. The method of growing a silicon carbide epitaxial underlayer of claim 1, wherein: setting the pressure to be 8-10 KPa in the step 3); maintaining the reaction temperature for 5-60 min.