CN112670165B - Growth method of silicon carbide epitaxial bottom layer - Google Patents

Growth method of silicon carbide epitaxial bottom layer Download PDF

Info

Publication number
CN112670165B
CN112670165B CN202011547217.6A CN202011547217A CN112670165B CN 112670165 B CN112670165 B CN 112670165B CN 202011547217 A CN202011547217 A CN 202011547217A CN 112670165 B CN112670165 B CN 112670165B
Authority
CN
China
Prior art keywords
silicon carbide
layer
epitaxial
silicon
growing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202011547217.6A
Other languages
Chinese (zh)
Other versions
CN112670165A (en
Inventor
陈威佑
胡智威
蔡长祐
蔡清富
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nanjing Baishi Electronic Technology Co ltd
Original Assignee
Nanjing Baishi Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanjing Baishi Electronic Technology Co ltd filed Critical Nanjing Baishi Electronic Technology Co ltd
Priority to CN202011547217.6A priority Critical patent/CN112670165B/en
Publication of CN112670165A publication Critical patent/CN112670165A/en
Application granted granted Critical
Publication of CN112670165B publication Critical patent/CN112670165B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

The invention discloses a growth method of a silicon carbide epitaxial bottom layer, which is characterized in that in the process of growing a buffer layer, a layer of thin barrier layers with different carbon-silicon ratios are stacked, vertical dislocation of a substrate is effectively prevented from extending upwards to an epitaxial layer, the growth of dislocation is further stopped by regulating the carbon-silicon ratio in the growth process of the epitaxial bottom layer, the number of micro-holes on the surface of the epitaxial layer is effectively reduced by 1-2 levels, the surface quality of the epitaxial layer is improved, and in the subsequent application of triode devices, the electrical defect rate caused by the micro-holes on the surface is reduced, so that the stability and performance of device products are improved.

Description

Growth method of silicon carbide epitaxial bottom layer
Technical Field
The invention relates to the field of silicon carbide materials, in particular to a growth method of a silicon carbide epitaxial bottom layer.
Background
The silicon carbide material is suitable for manufacturing electronic devices with high temperature, high frequency, high power, radiation resistance, corrosion resistance and the like, has wide application prospect in the aspects of communication, automobiles, aviation, spaceflight, oil exploitation, national defense and the like, and belongs to international high-end advanced materials. In order to realize the development of silicon carbide electronic devices, homoepitaxy must be carried out on a silicon carbide substrate to grow an epitaxial structure required by the devices.
The silicon carbide epitaxial layer produced in the prior art has a structure that a concentration buffer layer is stacked on a high-concentration doped silicon carbide substrate, and epitaxial layers with different thicknesses and doping concentrations grow on the buffer layer according to the design of pressure resistance. Generally, the thickness, concentration, and number of surface defects of the epitaxial layer affect device characteristics. The existing epitaxial technology can effectively control the defects with larger surface size, such as triangular defects, carrot defects, linear defects, comet defects and the like, and the quantity of the defects is less than 1/cm2. But the number of the surface micro pits is as high as more than 50000 per chip.
The current epitaxy technology focuses on improving the uniformity of thickness and doping concentration and reducing the number of large surface defects, but does not provide a method for systematically and effectively reducing the number of small surface micro-cavities.
Disclosure of Invention
The invention aims to: in order to solve the problems in the prior art, the invention provides a growth method of a silicon carbide epitaxial bottom layer, which reduces the number of surface defects and micro pits and produces a high-quality silicon carbide epitaxial layer.
The technical scheme is as follows: in order to achieve the purpose, the invention can adopt the following technical scheme:
a growth method of a silicon carbide epitaxial bottom layer comprises the following steps:
1) Growing a first buffer layer on an n-type silicon carbide substrate at 1600-1650 ℃; the carbon-silicon ratio is 1.2-1.0, and the thickness is 0.5-1.5 mu m;
2) Raising the temperature to 1680-1700 ℃; growing a second thin barrier layer on the first buffer layer, wherein the thickness of the second thin barrier layer is 0.1-0.3 um, the carbon-silicon ratio is 1.0-0.9, and the length of the second thin barrier layer is increased to 1.3-1.5 times of that of the first thin barrier layer in the step 1);
3) When the temperature is reduced to below 1600 ℃, the epitaxial layer part is grown, and the carbon-silicon ratio is 1.0-0.9.
Furthermore, the n-type silicon carbide substrate in the step 1) is a silicon surface silicon carbide substrate deflected to the <11-20> direction by 0-8 degrees.
Further, the pressure in the step 1) is set to be 5-7 KPa; the reaction temperature is maintained for 1-15 min.
Further, the pressure in the step 2) is set to be 3-5 KPa; the reaction temperature is maintained for 1-10 min.
Further, the pressure in the step 3) is set to be 8-10 KPa; the reaction temperature is maintained for 5-60 min.
Has the advantages that: the invention has the following advantages:
1) The buffer layers grown under different conditions can generate slight lattice distortion displacement, so that the Berger vectors of the vertical dislocation of the substrate are changed, and the driving force of the vertical dislocation extending upwards to the epitaxial layer is reduced; the number of surface micro-holes is effectively controlled to be 104The following, and at the same time, has the advantages of high uniformity and low surface defects;
2) The growth of dislocation is further stopped by regulating the proportion of carbon and silicon in the growth process of the epitaxial bottom layer, and the number of surface micro-holes of the epitaxial layer is reduced.
3) In the process of growing the buffer layer, a layer of thin barrier layers with different carbon-silicon ratios is stacked, so that vertical dislocation of the substrate is effectively prevented from extending upwards to the epitaxial layer, the number of the micro-holes on the surface of the epitaxial layer is effectively reduced by 1-2 levels, the surface quality of the epitaxial layer is improved, the electrical defect rate caused by the micro-holes on the surface is reduced in the subsequent application of a triode device, and the stability and performance of the device product are further improved.
Drawings
FIG. 1 is a schematic view of a silicon carbide epitaxial structure according to example 1 of the present invention;
fig. 2 is a schematic electron microscope comparison of the present invention with no barrier layer for the conventional silicon carbide epitaxial structure of comparative example 1 and a barrier layer for the silicon carbide epitaxial structure prepared in example 1.
Detailed Description
Example 1:
referring to fig. 1, the present invention discloses a method for growing a silicon carbide epitaxial bottom layer, which comprises the following steps:
1) Placing a silicon carbide substrate with an n-type (0001) crystal face being off-axis by 4 degrees towards the <11-20> direction into a SiC epitaxial reaction chamber carrying inner base;
2) Introducing hydrogen, setting the pressure to be 15KPa, heating to 1600 ℃ in the hydrogen environment, maintaining the temperature of the reaction chamber for 10min, and etching the surface of the substrate;
3) Introducing carbon-silicon gas and doped gas nitrogen in a mode that the flow rate is gradually increased along with the set time, simultaneously increasing the reaction temperature to 1650 ℃ along with the set time, wherein the flow rate ratio of the carbon-silicon gas is 1.2, the flow rate of the nitrogen is 75sccm, the reaction pressure is 5KPa, growing a first buffer layer with the thickness of 0.5um, and maintaining the reaction temperature for 10min.
4) Raising the temperature to 1680-700 ℃; growing a second thin barrier layer with the thickness of 0.1-0.3 um on the first buffer layer, and drawing the second thin barrier layer at the speed of 1.5 times that of the step 1) at the flow ratio of carbon to silicon gas of 0.95; the pressure drops to 5kpa; the reaction temperature was maintained for 1min.
5) Reducing the reaction temperature to 1600 ℃, growing a silicon carbide epitaxial layer, wherein the flow rate ratio range of the carbon-silicon gas is 0.98, and the flow rate range of the nitrogen gas of the doping gas is 30sccm; the pressure was set at 10KPa and the reaction temperature was maintained for 60min.
6) And (3) keeping in a hydrogen environment, stopping introducing carbon-silicon gas and nitrogen, stopping introducing hydrogen when the temperature is reduced to below 600 ℃, vacuumizing the reaction chamber to below 1KPa, introducing argon to one atmosphere, circulating for 5 times, opening the reaction chamber, taking out the epitaxial wafer, and detecting the surface of the epitaxial wafer by adopting a SICA88 surface defect detector of Lasertec company.
Comparative example 1:
conventional silicon carbide epitaxial structures do not include a thin barrier layer as the second layer.
Taking the silicon carbide epitaxial structures prepared in the embodiment 1 and the comparative example 1 to carry out surface electron microscope analysis, as shown in fig. 2, it can be seen that the invention effectively prevents the vertical dislocation of the substrate from extending upwards to the epitaxial layer, effectively reduces the number of micro-holes on the surface of the epitaxial layer and improves the surface quality of the epitaxial layer.

Claims (5)

1. A growth method of a silicon carbide epitaxial bottom layer is characterized by comprising the following steps:
1) Growing a first buffer layer on an n-type silicon carbide substrate at 1600-1650 ℃; the carbon-silicon ratio is 1.2-1.0, and the thickness is 0.5-1.5 mu m;
2) Raising the temperature to 1680-1700 ℃; growing a second thin barrier layer on the first buffer layer, wherein the thickness of the second thin barrier layer is 0.1-0.3 um, the carbon-silicon ratio is 1.0-0.9, and the length is increased to 1.3-1.5 times of that of the step 1);
3) When the temperature is reduced to below 1600 ℃, the epitaxial layer part is grown, and the carbon-silicon ratio is 1.0-0.9.
2. The method of growing a silicon carbide epitaxial underlayer of claim 1, wherein: the n-type silicon carbide substrate in the step 1) is a silicon surface silicon carbide substrate which deviates from the <11-20> direction by 0-8 degrees.
3. The method of growing a silicon carbide epitaxial bottom layer according to claim 1, wherein: setting the pressure to be 5-7 KPa in the step 1); the reaction temperature is maintained for 1-15 min.
4. The method of growing a silicon carbide epitaxial bottom layer according to claim 1, wherein: setting the pressure to be 3-5 KPa in the step 2); the reaction temperature is maintained for 1-10 min.
5. The method of growing a silicon carbide epitaxial bottom layer according to claim 1, wherein: setting the pressure to be 8-10 KPa in the step 3); the reaction temperature is maintained for 5-60 min.
CN202011547217.6A 2020-12-24 2020-12-24 Growth method of silicon carbide epitaxial bottom layer Active CN112670165B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011547217.6A CN112670165B (en) 2020-12-24 2020-12-24 Growth method of silicon carbide epitaxial bottom layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011547217.6A CN112670165B (en) 2020-12-24 2020-12-24 Growth method of silicon carbide epitaxial bottom layer

Publications (2)

Publication Number Publication Date
CN112670165A CN112670165A (en) 2021-04-16
CN112670165B true CN112670165B (en) 2022-11-01

Family

ID=75408249

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011547217.6A Active CN112670165B (en) 2020-12-24 2020-12-24 Growth method of silicon carbide epitaxial bottom layer

Country Status (1)

Country Link
CN (1) CN112670165B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114883175B (en) * 2022-02-22 2023-08-18 南京百识电子科技有限公司 Defect barrier structure and method for silicon carbide epitaxial layer
CN115074825B (en) * 2022-06-10 2024-07-05 厦门紫硅半导体科技有限公司 Silicon carbide epitaxial structure, pulse type growth method and application thereof
CN114775046B (en) * 2022-06-22 2022-11-29 浙江大学杭州国际科创中心 Silicon carbide epitaxial layer growth method
CN117913124B (en) * 2024-03-20 2024-06-14 江苏鑫华半导体科技股份有限公司 Substrate and method for producing the same

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105826186A (en) * 2015-11-12 2016-08-03 中国电子科技集团公司第五十五研究所 Growing method for high-surface-quality silicon carbide epitaxial layer
WO2016133089A1 (en) * 2015-02-18 2016-08-25 新日鐵住金株式会社 Method for producing silicon carbide single crystal epitaxial wafer and silicon carbide single crystal epitaxial wafer
JP2016183087A (en) * 2015-03-27 2016-10-20 パナソニック株式会社 Manufacturing method for silicon carbide epitaxial substrate
CN106711022A (en) * 2016-12-26 2017-05-24 中国电子科技集团公司第五十五研究所 Preparation method for growing silicon carbide epitaxial film with clear doping interface
CN106803479A (en) * 2016-12-26 2017-06-06 中国电子科技集团公司第五十五研究所 A kind of preparation method of the silicon carbide epitaxial wafer for improving effective area
CN107829135A (en) * 2017-10-24 2018-03-23 瀚天天成电子科技(厦门)有限公司 A kind of high quality silicon carbide epitaxial growth technique
CN111029246A (en) * 2019-12-09 2020-04-17 中国电子科技集团公司第五十五研究所 Method for reducing triangular defects in SiC epitaxial layer

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201417150A (en) * 2012-10-31 2014-05-01 Lg Innotek Co Ltd Epitaxial wafer

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016133089A1 (en) * 2015-02-18 2016-08-25 新日鐵住金株式会社 Method for producing silicon carbide single crystal epitaxial wafer and silicon carbide single crystal epitaxial wafer
JP2016183087A (en) * 2015-03-27 2016-10-20 パナソニック株式会社 Manufacturing method for silicon carbide epitaxial substrate
CN105826186A (en) * 2015-11-12 2016-08-03 中国电子科技集团公司第五十五研究所 Growing method for high-surface-quality silicon carbide epitaxial layer
CN106711022A (en) * 2016-12-26 2017-05-24 中国电子科技集团公司第五十五研究所 Preparation method for growing silicon carbide epitaxial film with clear doping interface
CN106803479A (en) * 2016-12-26 2017-06-06 中国电子科技集团公司第五十五研究所 A kind of preparation method of the silicon carbide epitaxial wafer for improving effective area
CN107829135A (en) * 2017-10-24 2018-03-23 瀚天天成电子科技(厦门)有限公司 A kind of high quality silicon carbide epitaxial growth technique
CN111029246A (en) * 2019-12-09 2020-04-17 中国电子科技集团公司第五十五研究所 Method for reducing triangular defects in SiC epitaxial layer

Also Published As

Publication number Publication date
CN112670165A (en) 2021-04-16

Similar Documents

Publication Publication Date Title
CN112670165B (en) Growth method of silicon carbide epitaxial bottom layer
EP3547350B1 (en) Method for reducing impact of basal plane dislocation on silicon carbide epitaxial layer
CN100497760C (en) High doping concentration silicon carbide epitaxial growth method
EP2230332A1 (en) Silicon carbide single crystal ingot, and substrate and epitaxial wafer obtained from the silicon carbide single crystal ingot
KR20160070743A (en) N-type aluminum nitride single-crystal substrate and vertical nitride semiconductor device
JP2007230823A (en) Method for manufacturing silicon carbide single crystal ingot, and silicon carbide single crystal ingot
CN102610500A (en) Method for preparing N-type heavily-doping silicon carbide film epitaxy
CN113668052B (en) SiC step flow rapid growth method for chemical potential regulation growth monomer under non-equilibrium condition
CN112366130B (en) Method for reducing defect density of silicon carbide epitaxial material
CN112701031A (en) Buffer layer growth method of silicon carbide epitaxial material
CN114883175B (en) Defect barrier structure and method for silicon carbide epitaxial layer
EP1549787A1 (en) Method and apparatus for forming epitaxial layers
CN116825620A (en) Method for reducing surface defects of silicon carbide epitaxial wafer
CN116613056A (en) Method for reducing surface defects of silicon carbide epitaxial film
CN113078205B (en) SiC epitaxial structure based on Al-N codoping and preparation method thereof
CN114032616B (en) SiC step flow low-speed growth method for chemical potential regulation growth monomer under non-equilibrium condition
CN113089091A (en) Boron nitride template and preparation method thereof
CN112750689A (en) Gallium nitride material with gallium polar surface and homoepitaxial growth method
CN111769034B (en) Preparation method of gradient PN junction material
CN111293037B (en) P-type SiC epitaxy and growth method thereof
CN1326208C (en) Structure and making method of gallium nitride high electron mobility transistor
CN112725895B (en) Method for growing silicon carbide single crystal
CN114438595B (en) Gallium nitride epitaxial growth method beneficial to improving heat dissipation
CN111029245B (en) SiC epitaxial rate switching method
CN116516485A (en) Variable-temperature silicon carbide epitaxial method and silicon carbide epitaxial wafer

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant