JP2016183087A - Manufacturing method for silicon carbide epitaxial substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce surface defect density of a silicon carbide epitaxial film in a silicon carbide epitaxial substrate, and to improve in-plane uniformity of impurity concentration.SOLUTION: A manufacturing method for a silicon carbide epitaxial substrate has: a step of depositing a first silicon carbide epitaxial layer by a first growth pressure by supplying a first raw material gas and a first carrier gas to a principal surface of a semiconductor substrate installed in a CVD device; and a step of depositing a second silicon carbide epitaxial layer by a second growth pressure by supplying a second raw material gas and a second carrier gas to the surface of the first silicon carbide epitaxial layer. The C/Si ratio of the second raw material gas is smaller than the C/Si ratio of the first raw material gas, the second growth pressure is lower than the first growth pressure, or the flow rate of the second carrier gas is larger than the flow rate of the first carrier gas, and a deposit step of the silicon carbide epitaxial layer is not included after the deposit step of the second silicon carbide epitaxial layer.SELECTED DRAWING: Figure 11

Description

  The present application relates to a method for manufacturing a silicon carbide epitaxial substrate.

  Wide band gap semiconductors are applied to various semiconductor devices such as power elements (also referred to as power devices), environment-resistant elements, high-temperature operating elements, and high-frequency elements. Among these, application to power devices such as switching elements or rectifying elements has attracted attention.

Among wide band gap semiconductors, silicon carbide (silicon carbide: SiC) is relatively easy to manufacture, and a silicon oxide (SiO ₂ ) film, which is a high-quality gate insulating film, is formed by thermal oxidation. It is a semiconductor material that can be used. For this reason, development of power devices using SiC has been actively conducted (for example, see Patent Document 1).

  Typical switching elements of power devices using SiC include Schottky barrier diodes (SBD) and metal-insulator semiconductor field effect transistors (hereinafter “MISFETs”).

  Since SiC has a higher dielectric breakdown electric field and thermal conductivity than Si, a power device using SiC (SiC power device) can easily achieve higher breakdown voltage and lower loss than a Si power device. For this reason, when realizing the same performance as the Si power device, the area and thickness can be greatly reduced as compared with the Si power device.

  SiC power devices are generally formed using a silicon carbide epitaxial substrate (hereinafter, “SiC epitaxial substrate”). The SiC epitaxial substrate is a substrate having a SiC epitaxial film on the surface of a semiconductor substrate. The SiC epitaxial film is formed by crystal growth (epitaxial growth) of SiC on the surface of the semiconductor substrate, for example, by chemical vapor deposition (CVD).

JP 2001-151400 A Japanese Patent No. 4956544 JP 2009-256138 A JP2013-121898A JP 2013-102106 A

IEEE Transactions on Electron Devices, Vol.46, No.3, (1999) pp.471-477 Appl. Phys. Lett. 100 (2012), 242102

  It is known that various surface defects formed on the surface of the SiC epitaxial film can cause deterioration of device characteristics. For example, Non-Patent Document 2 describes that the SBD leakage current increases due to surface defects called pits formed on the surface of the SiC epitaxial film. For this reason, it is required to reduce the density of surface defects in the SiC epitaxial film.

  On the other hand, in the SiC epitaxial film, it is required to further improve the uniformity of the impurity doping density (hereinafter referred to as “impurity concentration”) within the substrate surface. In this specification, when forming an SiC epitaxial film on the surface of a substrate, the fact that the SiC epitaxial film has uniformity in a plane parallel to the surface of the substrate is referred to as “uniform in the substrate surface” or simply “surface”. It is said to be “uniform within”.

  One aspect of the present disclosure provides a method for manufacturing a silicon carbide epitaxial substrate that can reduce the surface defect density of the silicon carbide epitaxial layer and improve the in-plane uniformity of the impurity concentration.

  One aspect of the present disclosure includes a step of placing the semiconductor substrate in a CVD apparatus with the main surface of the semiconductor substrate as a surface, and a first source gas containing carbon atoms and silicon atoms on the main surface of the semiconductor substrate; Supplying a first carrier gas and depositing a first silicon carbide epitaxial layer containing impurities at a first growth pressure; and on the surface of the first silicon carbide epitaxial layer, carbon atoms and Depositing a second silicon carbide epitaxial layer containing impurities at a second growth pressure by supplying a second source gas containing silicon atoms and a second carrier gas, The C / Si ratio, which is the ratio of the number of carbon atoms to the number of silicon atoms contained in the two source gases, is greater than the C / Si ratio, which is the ratio of the number of carbon atoms to the number of silicon atoms contained in the first source gas. The second growth pressure is smaller than the first growth pressure, or the flow rate of the second carrier gas is greater than the flow rate of the first carrier gas, and the first silicon carbide epitaxial layer is smaller. A step of ion-implanting the first silicon carbide epitaxial layer between the step of depositing a layer and the step of depositing the second silicon carbide epitaxial layer; a surface of the first silicon carbide epitaxial layer; And the step of heat-treating the semiconductor substrate having the first silicon carbide epitaxial layer at a temperature of 900 ° C. or higher, and after the step of depositing the second silicon carbide epitaxial layer. A method for manufacturing a silicon carbide epitaxial substrate is included, which does not include a step of depositing a silicon carbide epitaxial layer.

  According to the method for manufacturing a silicon carbide epitaxial substrate according to one embodiment of the present disclosure, the surface defect density of the silicon carbide epitaxial layer can be reduced, and the in-plane uniformity of the impurity concentration can be improved.

It is an example of the wafer surface inspection result using the conventional optical surface inspection apparatus. It is an example of a wafer surface inspection result using confocal differential interference type surface inspection. It is the schematic of the horizontal type | mold CVD apparatus used in embodiment. It is the schematic which illustrates arrangement | positioning of the wafer in a horizontal type | mold CVD apparatus. It is a figure which shows the impurity concentration distribution of the SiC epitaxial film in a sample board | substrate. It is a figure which shows the C / Si ratio dependence of the pit density of a SiC epitaxial film, and impurity concentration dispersion | variation. It is a figure which shows the growth pressure dependence of the pit density of a SiC epitaxial film, and impurity concentration dispersion | variation. It is a figure which shows the hydrogen flow rate dependence of the pit density of a SiC epitaxial film, and impurity concentration dispersion | variation. It is a flowchart which shows the preparation method of the sample of an Example and a comparative example. It is a figure which shows the growth condition dependence of the pit density of a SiC epitaxial film. It is a figure which shows the thickness dependence of the surface layer of the pit density of a SiC epitaxial film. It is a cross-sectional schematic diagram of a MISFET structure. It is a flowchart which shows an example of the silicon carbide epitaxial method of one Embodiment. It is typical sectional drawing which illustrates the silicon carbide epitaxial substrate of one embodiment.

  The knowledge underlying this disclosure is as follows.

  Conventionally, it is known that various surface defects are formed on the surface of the SiC epitaxial film. Examples of surface defects include micropipes, carrot defects, and triangular defects. A micropipe is a defect that accepts a micropipe of a semiconductor substrate. The problems with micropipes are being reduced as a result of the progress in crystal technology that has led to the provision of micropipeless substrates. Carrot defects and triangular defects are known to cause characteristic deterioration such as breakdown voltage degradation of devices (Non-Patent Document 1), and efforts are being made to reduce these defects (Patent Document 2).

  Furthermore, it is known that a small shallow recess called a pit is formed on the surface of the SiC epitaxial film. The pit depth is, for example, about 10 nm to 100 nm, and the pit diameter is, for example, about 7 μm to 10 μm. Non-Patent Document 2 reports that pits can cause an increase in leakage current of SBD. However, it is difficult for the conventional inspection apparatus to accurately determine the number of pits. For this reason, efforts to suppress the formation of pits have not been sufficient.

  On the other hand, when forming a device using an SiC epitaxial film, in order to stably manufacture a device having the designed characteristics, it is required to make the impurity concentration of the SiC epitaxial film more uniform in the plane. Yes. In particular, in recent years, as the diameter of wafers has increased and the area of devices has increased, in order to improve device yield, it is required to further improve the in-plane uniformity of impurity concentration.

  Therefore, in order to produce a device having good characteristics with a high yield, it is required to reduce the surface defect density of the SiC epitaxial film and to reduce the in-plane variation in the impurity concentration of the SiC epitaxial film. However, as a result of studies by the present inventors, the sensitivity of the surface defect density and the in-plane variation of the impurity concentration to the SiC epitaxial growth conditions are different from each other. For this reason, it is difficult to achieve both reduction in the surface defect density of the SiC epitaxial film and improvement in the in-plane uniformity of the impurity concentration.

  Therefore, the present inventor diligently studied the relationship between the surface defect density and impurity concentration uniformity and the epitaxial growth conditions. The examination method and results are described below.

<Examination of surface defect measurement method of SiC epitaxial film>
The present inventor first examined a method for measuring the pit density in order to examine a method capable of reducing surface defects, particularly pits, of the SiC epitaxial film.

  Conventionally, for example, an optical surface inspection apparatus is used for measuring surface defects. However, when the surface of the SiC epitaxial film is inspected using an optical surface inspection apparatus, the SiC epitaxial substrate is a semi-transparent substrate, so that light used for inspection is reflected on both the front and back surfaces of the SiC epitaxial substrate. As a result of sensing information on the back surface of the substrate, the inspection sensitivity of the surface of the SiC epitaxial film cannot be sufficiently increased, and it is difficult to detect pits having a shallow depth with high sensitivity.

  Therefore, the present inventor conducted an inspection of the surface of the SiC epitaxial film using an optical microscope using a confocal differential interferometer. SICA manufactured by Lasertec Corporation was used as an optical microscope. In addition, the same sample was inspected using an optical surface inspection apparatus, and compared with the inspection result using an optical microscope. As an optical surface inspection apparatus, Candela manufactured by KLA-Tencor was used. Here, “sample substrate A” formed by a method described later was used as a sample to be subjected to surface inspection.

  FIG. 1A is a diagram showing a result of inspecting the surface of a sample substrate using Candela, and FIG. 1B is a diagram showing a result of inspecting the surface of the same sample substrate using SICA. In Candela, 82 pits were detected, whereas when SICA was used, 2523 pits were detected. From this, it was confirmed that SICA has a sensitivity about 30 times that of Candela, and that the number of pits can be detected in more detail by using SICA.

<Measurement of impurity concentration distribution>
Next, in-plane variation of the impurity concentration of the SiC epitaxial film was examined.

  First, a method for manufacturing the sample substrate used in this study will be described.

  For the production of the sample substrate, Probus-SiC manufactured by Tokyo Electron Co., Ltd., which is a horizontal CVD apparatus, was used as the CVD apparatus 1. FIG. 2A is a schematic cross-sectional view of the reaction chamber of the CVD apparatus 1, and FIG. 2B is a plan view illustrating an arrangement example of a wafer (semiconductor substrate) on a holder in the CVD apparatus 1.

  In the CVD apparatus 1, by applying high frequency power to the heating coil 7, the fixed susceptor 2 made of graphite is induction-heated, and the holder 5 is heated to about 1650 ° C. The fixed susceptor 2 is covered with a heat insulating material 3. The wafer 6 is disposed on the holder 5, and the holder 5 is disposed on the rotating susceptor 4. The holder 5 is rotated by rotating the rotating susceptor 4 at 60 rpm. Thereby, the temperature uniformity of the surface of the wafer 6 disposed on the upper part of the holder 5 is improved. The source gas is introduced onto the holder 5 along the direction of the arrow shown in FIG. 2A from the left side of the cross-sectional view shown in FIG. 2A and discharged from the right side.

  In this examination, a 150 mm diameter SiC wafer was used. As shown in FIG. 2B, three wafers 6 were evenly arranged between the center and the periphery of the holder 5. Thereby, an epitaxial layer can be simultaneously formed on three wafers 6 having a diameter of 150 mm. In this way, a SiC epitaxial film was formed on the wafer 6 to prepare a sample substrate A.

The epitaxial conditions of the sample substrate A are as follows.
Growth temperature: 1700 ° C
Growth pressure: 7kPa
Flow rate of hydrogen as a carrier gas: 156 liters / min Flow rates of silane and propane as source gases: 75 cc / min and 25 cc / min respectively C / Si ratio calculated from the flow rate of source gas supplied to the CVD apparatus 1: 1.0
The C / Si ratio is the ratio of the number of carbon atoms to the number of silicon atoms contained in the source gas.

  In addition, sample substrates B and C were manufactured by changing the C / Si ratio in the source gas. In sample substrate B, the flow rates of silane and propane, which are raw material gases, were 50 cc / min and 13 cc / min, respectively, and the C / Si ratio was 0.8. In the sample substrate C, the flow rates of silane and propane, which are raw material gases, were 50 cc / min and 20 cc / min, respectively, and the C / Si ratio was 1.2. Other epitaxial conditions were the same as those of the sample substrate A.

  Subsequently, the in-plane distribution of the impurity concentration of the SiC epitaxial film of the sample substrates A to C was examined.

  FIG. 3 is a diagram showing the distribution of impurity concentration with respect to the distance from the center of the holder 5 in each sample substrate. The impurity concentration on the vertical axis is a value normalized with the impurity concentration at the end of the SiC epitaxial film closest to the center of the holder 5 as 1.

  From the results shown in FIG. 3, it can be seen that the impurity concentration of the SiC epitaxial film increases or decreases from the center of the holder 5 toward the periphery.

  As an index of the in-plane uniformity of the impurity concentration, for example, a value that is expressed in the form of a standard deviation ratio σ / mean with respect to the average value and indicates the magnitude of the in-plane variation of the impurity concentration is used. The value of σ / mean generally has only a positive value. However, in this study, if the in-plane variation of the impurity concentration (hereinafter referred to as “impurity concentration variation”) is expressed only by a positive value, the above-described tendency of the impurity concentration cannot be expressed. Therefore, in this specification, the impurity concentration variation when the impurity concentration on the peripheral side is higher than the center side of the holder 5 is indicated by a “positive” value, and conversely, the impurity concentration variation when the impurity concentration is low is indicated by a “negative” value. . Regardless of whether it is positive or negative, the smaller the absolute value of the impurity concentration variation, the higher the in-plane uniformity of the impurity concentration.

<Relationship between pit density and impurity concentration uniformity>
Next, the present inventor examined the relationship between the pit density of the SiC epitaxial film and the impurity concentration uniformity. “Pit density” is the number of pits / wafer area. Here, the sample was measured by SICA, and the pit density was calculated based on the obtained number of pits.

  First, SiC epitaxial substrates were produced with different C / Si ratios, and the C / Si ratio dependence of pit density and impurity concentration uniformity was examined. The growth conditions other than the C / Si ratio were the same as those for the sample substrate A.

  FIG. 4 is a diagram showing the relationship between the pit density and the impurity concentration variation and the C / Si ratio calculated from the gas introduced into the CVD apparatus 1.

  As can be seen from FIG. 4, the pit density changes greatly when the C / Si ratio is around 1.0. Specifically, the C / Si ratio is small at less than 1.0 and increases when it exceeds 1.0. On the other hand, the impurity concentration variation changes linearly. In order to keep the pit density small, the C / Si ratio may be made smaller than 1.0. On the other hand, the C / Si ratio that minimizes the absolute value of the impurity concentration variation is about 1.06. From this result, it can be seen that the pit density increases when priority is given to improving the uniformity of the impurity concentration, and the impurity concentration variation increases when priority is given to reduction of the pit density.

  Subsequently, SiC epitaxial substrates were produced with different growth pressures, and the growth pressure dependence of pit density and impurity concentration uniformity was investigated. “Growth pressure” refers to the pressure in the chamber during epitaxial growth when, for example, epitaxial growth of SiC is performed in the chamber of the CVD apparatus. The epitaxial growth conditions other than the growth pressure were the same as those of the sample substrate A described above.

  Furthermore, SiC epitaxial substrates were produced by changing the flow rate of hydrogen as a carrier gas, and the dependency of pit density and impurity concentration uniformity on the hydrogen flow rate was investigated. The epitaxial growth conditions other than the hydrogen flow rate were the same as those of the sample substrate A described above.

  FIG. 5 is a graph showing the relationship between pit density and impurity concentration variation and the growth pressure during epitaxial growth. FIG. 6 is a diagram showing the relationship between pit density and impurity concentration variation and the hydrogen flow rate during epitaxial growth. On the horizontal axis of FIG. 6, the hydrogen flow rate decreases toward the right side.

  From the results shown in FIG. 5, it can be seen that when the growth pressure exceeds a predetermined value, the pit density increases, and the impurity concentration variation changes substantially linearly as the growth pressure increases. From the results shown in FIG. 6, it can be seen that as the hydrogen flow rate becomes smaller than a predetermined value, the pit density increases, and the impurity concentration variation changes substantially linearly as the hydrogen flow rate decreases. Thus, it can be seen that the pit density and the impurity concentration uniformity greatly depend not only on the C / Si ratio but also on the growth pressure and the carrier gas flow rate. Further, it is confirmed that any result does not match the condition for reducing the pit density with the condition for reducing the absolute value of the impurity concentration variation.

  From the examination results shown in FIGS. 4 to 6, it can be seen that it is difficult to reduce the pit density and improve the impurity concentration uniformity in one epitaxial growth step. The term “one epitaxial growth step” as used herein means a step that is performed under the same growth conditions. For example, a case where two epitaxial growths are performed with the same growth conditions at intervals. Including.

  The inventor has further studied based on the above results, and found that by performing a plurality of epitaxial growth steps with different growth conditions, it is possible to achieve both reduction in pit density and improvement in impurity concentration uniformity. The technology disclosed in the specification has been realized.

  The outline | summary of 1 aspect of this indication is as follows.

  A method for manufacturing a silicon carbide epitaxial substrate according to one aspect of the present disclosure includes a step of placing the semiconductor substrate in a CVD apparatus with the main surface of the semiconductor substrate as a surface, and carbon atoms and silicon on the main surface of the semiconductor substrate. Depositing a first silicon carbide epitaxial layer containing impurities at a first growth pressure by supplying a first source gas containing atoms and a first carrier gas; and the first silicon carbide A second silicon carbide epitaxial layer containing impurities is deposited at a second growth pressure by supplying a second source gas containing carbon atoms and silicon atoms and a second carrier gas to the surface of the epitaxial layer. The C / Si ratio, which is the ratio of the number of carbon atoms to the number of silicon atoms contained in the second source gas, is the number of silicon atoms contained in the first source gas The second growth pressure is lower than the first growth pressure or the flow rate of the second carrier gas is smaller than the C / Si ratio, which is the ratio of the number of carbon atoms to the first carrier. Ion implantation is performed on the first silicon carbide epitaxial layer between the step of depositing the first silicon carbide epitaxial layer and the step of depositing the second silicon carbide epitaxial layer, which is greater than the flow rate of the gas. And the step of oxidizing the surface of the first silicon carbide epitaxial layer, and the step of heat-treating the semiconductor substrate having the first silicon carbide epitaxial layer at a temperature of 900 ° C. or higher, The step of depositing the silicon carbide epitaxial layer is not included after the step of depositing the second silicon carbide epitaxial layer.

In the second silicon carbide epitaxial layer, for example, the variation in impurity concentration in a plane parallel to the main surface of the semiconductor substrate may be larger than that in the first silicon carbide epitaxial layer. The pit density on the surface of the silicon carbide epitaxial layer may be, for example, 1.0 cm ⁻² or less.

  The ratio of the standard deviation with respect to the average value of the impurity concentration in the plane of the first silicon carbide epitaxial layer is, for example, 5% or less, and the average impurity concentration in the plane of the second silicon carbide epitaxial layer is, for example, The ratio of the standard deviation to the value may be 10% or more, for example.

  For example, the average value of the impurity concentration of the second silicon carbide epitaxial layer may be equal to or less than the average value of the impurity concentration of the first silicon carbide epitaxial layer.

  The thickness of the second silicon carbide epitaxial layer may be, for example, 0.5 μm or more.

  A silicon carbide semiconductor device which is one embodiment of the present disclosure includes a silicon carbide epitaxial substrate manufactured by the above method and an electrode disposed on the silicon carbide epitaxial substrate.

(Embodiment)
In the present embodiment, a plurality of epitaxial growth steps with different growth conditions are performed. Thereby, an SiC epitaxial film having a structure in which a plurality of epitaxial layers having different growth conditions are stacked is obtained. At this time, for example, the epitaxial layer that is the uppermost layer (surface layer) of the SiC epitaxial film is grown under conditions that can reduce the pit density as compared with other epitaxial layers. Specifically, the surface layer is formed under the condition that the C / Si ratio is lower, the growth pressure is lower, or the flow rate of the carrier gas such as hydrogen gas is higher than that of the other epitaxial layers. The growth condition of the surface layer may be set so as to satisfy at least one of these conditions. This makes it possible to reduce the pit density while ensuring in-plane uniformity of the impurity concentration of the SiC epitaxial film.

  For example, a first silicon carbide epitaxial layer formed under a first condition is first formed on a semiconductor substrate, and then laminated with a second silicon carbide epitaxial layer formed under a second condition, thereby forming an SiC epitaxial layer. A film may be formed. Here, the first silicon carbide epitaxial layer is deposited at the first growth pressure by supplying the first source gas containing carbon atoms and silicon atoms and the first carrier gas to the main surface of the semiconductor substrate. Then, by supplying a second source gas containing a carbon atom and a silicon atom and a second carrier gas to the surface of the first silicon carbide epitaxial layer, the second silicon carbide is grown at the second growth pressure. Deposit an epitaxial layer. The step of depositing the second silicon carbide epitaxial layer does not include a step of depositing another silicon carbide epitaxial layer. Therefore, the second silicon carbide epitaxial layer becomes the surface layer of the SiC epitaxial film. In this case, the condition for depositing the first silicon carbide epitaxial layer is a condition that can reduce the absolute value of the impurity concentration variation more than the condition for depositing the second silicon carbide epitaxial layer. The condition for depositing the layer may be a condition capable of reducing the pit density as compared with the condition for depositing the first silicon carbide epitaxial layer. For example, the C / Si ratio in the second source gas when depositing the second silicon carbide epitaxial layer is higher than the C / Si ratio in the first source gas when depositing the first silicon carbide epitaxial layer. You may set so that it may become small. Note that the types of the second source gas and the second carrier gas used when forming the second silicon carbide epitaxial layer are the same as the first source gas and the second carrier gas used when forming the first silicon carbide epitaxial layer. It may be the same as or different from the type of one carrier gas.

<Examination of effect>
In order to confirm the effect of the present embodiment, the inventor produced SiC epitaxial substrate samples 1 to 4 and compared the surface characteristics thereof. Sample 3 is an example, and the other samples are comparative examples.

  FIG. 7 is a diagram for explaining a method of manufacturing samples 1 to 4. Under condition a, the C / Si ratio was set to 1.06 in order to reduce the absolute value of the impurity concentration variation, and under condition b, the C / Si ratio was set to 0.8 to reduce the pit density.

  As shown in FIG. 7, when samples 1 and 2 were produced, epitaxial growth was performed under certain conditions. Specifically, the SiC epitaxial film of Sample 1 was formed on the wafer by performing only epitaxial growth under the condition a. Similarly, the SiC epitaxial film of Sample 2 was formed on the wafer by performing only the epitaxial growth under the condition b. The thicknesses of the SiC epitaxial films of Samples 1 and 2 were 5 μm.

  Further, when preparing Samples 3 and 4, epitaxial growth was performed a plurality of times with different growth conditions, and a SiC epitaxial including a plurality of epitaxial layers with different growth conditions was formed. The SiC epitaxial film of Sample 3 was formed by epitaxially growing SiC on the wafer under the condition a and then further epitaxially growing it on the condition b. The SiC epitaxial film of Sample 4 was formed by epitaxially growing SiC on the wafer under condition b and then epitaxially growing it on condition a. The surface of the SiC epitaxial film of sample 3 is the surface of the epitaxial layer formed under condition b, and the surface of the SiC epitaxial film of sample 4 is the surface of the epitaxial layer formed under condition a. In any sample, the thickness of the epitaxial layer formed under conditions a and b was 5 μm. Moreover, in the manufacturing process of the sample 3, the epitaxial growth under the condition a and the epitaxial growth under the condition b were continuously performed. Similarly, in the manufacturing process of the sample 4, the epitaxial growth under the condition b and the epitaxial growth under the condition a were continuously performed.

  FIG. 8 is a diagram showing the pit density on the surface of the SiC epitaxial film of Samples 1 to 4. Similar to the examination results described above with reference to FIG. 4, the sample 1 formed under the condition a where the C / Si ratio is 1.06 is the sample 2 formed under the condition b where the C / Si ratio is 0.8. More pit density. On the other hand, the pit density of sample 3 substantially coincided with the pit density of sample 2, and the pit density of sample 4 substantially coincided with the pit density of sample 1. From this, the present inventors have found that the pit density on the surface of the SiC epitaxial film does not depend on the growth conditions during the formation of the SiC epitaxial growth layer, but is determined by the growth conditions when depositing the vicinity of the surface of the SiC epitaxial film. It was. Therefore, it has been found that if the surface layer of the SiC epitaxial film is formed under conditions that can reduce the pit density, the pit density of the SiC epitaxial film can be reduced. In this specification, as in samples 3 and 4, when the SiC epitaxial film has a laminated structure including a plurality of epitaxial layers formed under different conditions, the epitaxial layer including the surface of the SiC epitaxial film is referred to as “surface layer”. The epitaxial layer located on the substrate side with respect to the surface layer is referred to as a “lower layer”. The lower layer may include a plurality of epitaxial layers.

  As a result of further repeating the experiment, the present inventor has, for example, temporarily stopped the supply of the source gas or epitaxially grown under the condition a without performing the epitaxial growth under the condition a and the epitaxial growth under the condition b continuously. It has also been found that the same effect can be obtained even when epitaxial growth is performed under the condition b after unloading from the apparatus and before performing other processes.

  Next, in the SiC epitaxial film having the epitaxial layer formed under the condition a serving as the lower layer and the epitaxial layer formed under the condition b serving as the surface layer on the wafer, the thickness of the surface layer and the pit density of the SiC epitaxial film I investigated the relationship.

  FIG. 9 is a diagram showing the relationship between the thickness of the epitaxial layer formed under condition b, which is a surface layer, and the pit density. Here, the thickness of the epitaxial layer formed under the condition a which is the lower layer was set to 5 μm.

  From the results shown in FIG. 9, it can be seen that the pit density can be more effectively reduced if the thickness of the surface layer is 0.5 μm or more, for example. It can also be seen that the pit density can be further reduced if the thickness of the surface layer is 1.5 μm or more. Here, the thickness of the lower layer is considered to be constant, but the same pit density reduction effect can be obtained if the thickness of the surface layer is in the above range regardless of the thickness of the lower layer.

  On the other hand, when the present inventor examined, the characteristics of the SiC device are greatly affected by the in-plane variation of the impurity concentration in the lower layer than the surface layer.

  In the sample 3, the variation in the impurity concentration of the surface layer formed under the condition b is larger than the variation in the impurity concentration of the condition a formed under the condition a. However, when forming a SiC device, the region of the SiC epitaxial film in which the impurity concentration affects the device characteristics is limited. For example, a region having a high impurity concentration is formed near the surface of the SiC epitaxial film by ion implantation. This region has a sufficiently higher impurity concentration than the SiC epitaxial film formed by the CVD doping method. Since the impurity concentration in this region and its distribution are determined by the ion implantation method and subsequent impurity activation, it is hardly affected by the impurity concentration distribution during the deposition of the SiC epitaxial film. Hereinafter, description will be given with reference to the drawings.

  FIG. 10 is a cross-sectional view illustrating a general configuration of the MISFET 10. The MISFET 10 is disposed on the substrate 11, a plurality of body regions 12 having a depth D disposed on the main surface of the substrate 11, a gate insulating film 14 disposed on the body region 12, and the gate insulating film 14. Gate electrode 15 and drain electrode 17 disposed on the surface opposite to the main surface of substrate 11. A source region 13 is formed inside each body region 12. The plurality of body regions 12 are spaced apart, and the region between the separated body regions 12 functions as a JFET region 16. The gate insulating film 14 is disposed so as to straddle the separated body region 12 and source region 13.

  The MISFET 10 is formed using a SiC epitaxial substrate. In general, body region 12 and source region 13 are formed in a SiC epitaxial film of a SiC epitaxial substrate by ion implantation and activation annealing. Also in the JFET region 16, the impurity concentration is adjusted by ion implantation and activation annealing in order to achieve both high breakdown voltage and low on-resistance. When the MISFET 10 is turned on, a voltage is applied between the source region 13 and the drain electrode 17, and a voltage is applied to the gate electrode 15, whereby a current flows from the source region 13 to the drain electrode 17 as indicated by an arrow. Flowing.

  In the MISFET 10 as shown in FIG. 10, the impurity concentrations of the body region 12, the source region 13, and the JFET region 16 formed on the surface of the substrate 11 are determined by an ion implantation method. Further, the surface portion of the SiC epitaxial film disappears due to oxidation or the like during the manufacturing process. Therefore, it is considered that the impurity concentration of the epitaxial layer in a portion shallower than the bottom surface of the body region 12 hardly affects the device characteristics.

  In a general MISFET manufacturing process, the surface portion of the SiC epitaxial film is reduced by about 0.1 μm due to oxidation of the surface of the SiC epitaxial film before the body region 12 and the like are formed. In general, the thickness of the source region 13 is, for example, about 1.5 μm. Therefore, in the SiC epitaxial substrate, for example, in a region where the depth from the surface of the SiC epitaxial film is at least 2.0 μm or 1.5 μm or less, even if the impurity concentration uniformity is low, the device characteristics are not greatly affected. Conceivable. On the other hand, when the lower layer of the SiC epitaxial film has high impurity concentration uniformity, it is possible to suppress deterioration of device characteristics due to a decrease in impurity concentration uniformity. Therefore, if the thickness of the epitaxial layer serving as the surface layer is suppressed to a depth equal to or less than the depth of the ion implantation region, for example, 2.0 μm or less, it is possible to suppress deterioration in device characteristics due to impurity concentration nonuniformity in the surface layer. The pit density can be further reduced.

  The in-plane uniformity of the impurity concentration of SiC epitaxial films formed on 3 inch wafers and 4 inch wafers, which are the current mainstream, is about 5 to 10% in terms of standard deviation / mean value (σ / mean). is there. In order to improve device yield, it is required to further suppress in-plane variations in impurity concentration. According to the present embodiment, the in-plane uniformity of the impurity concentration in the portion where the ions are not implanted in the SiC epitaxial film can be suppressed to, for example, less than 5%, so that the device yield can be further improved.

  Patent Documents 3 and 4 disclose that the epitaxial growth of SiC is repeated by changing the size of the C / Si ratio. However, in any document, the uppermost epitaxial layer is different from the technique of the present disclosure in that it is formed under a condition that the C / Si ratio is larger than that of the lower layer.

Patent Document 5 discloses that after forming an n ⁻ -type epitaxial layer with a C / Si ratio of 1.3, a p ⁻ -type epitaxial layer is formed as a channel region with a C / Si ratio of 0.6. However, since Patent Document 5 includes a step of ion-implanting Al after forming an n ⁻ type epitaxial layer and before forming a p ⁻ type epitaxial layer, it is considered that the pit density cannot be reduced. . For example, if the ion implantation process is performed on the substrate on which the lower epitaxial layer is formed, the shape of the pits on the lower layer surface increases, so that the pit density can be sufficiently increased even if the surface layer is formed under predetermined conditions. It cannot be reduced. Similarly, when the lower layer surface is oxidized after the lower epitaxial layer is formed, the surface state of the epitaxial layer changes. Further, when a heat treatment step of 900 ° C. or higher is performed on the substrate on which the lower epitaxial layer is formed, Si is detached from the surface of the epitaxial layer. For this reason, if an ion implantation process, an oxidation process, or a heat treatment process at 900 ° C. or higher is performed on the substrate on which the lower epitaxial layer is formed, interface dislocations can be reduced even if epitaxial growth is further performed thereafter. Therefore, a SiC epitaxial film having a low pit density cannot be obtained.

  Hereinafter, the method for manufacturing the silicon carbide epitaxial substrate according to the embodiment of the present disclosure will be described more specifically with reference to FIGS. 11 and 12. The embodiment of the present disclosure is not limited to the method described below and a SiC epitaxial substrate manufactured by this method. It should be noted that the following embodiments are merely examples that can be used to easily understand the technology of the present disclosure.

  FIG. 11 is a flowchart illustrating an example of a method for manufacturing a SiC epitaxial substrate according to the present disclosure. FIG. 12 is a schematic cross-sectional view illustrating the SiC epitaxial substrate 100 manufactured by the method shown in FIG.

  In this example, for example, a SiC wafer is used as the semiconductor substrate. First, in step 1, a wafer 6 is placed in a CVD apparatus. Thereafter, in step 2, epitaxial growth is performed under the first condition to form first silicon carbide epitaxial layer 31. Next, in step 3, epitaxial growth is performed on first silicon carbide epitaxial layer 31 under the second condition to form second silicon carbide epitaxial layer 32. In this way, SiC epitaxial film 30 including first and second silicon carbide epitaxial layers 31 and 32 is obtained. Second silicon carbide epitaxial layer 32 is a surface layer of SiC epitaxial film 30. Thereafter, as step 4, the wafer 6 on which the SiC epitaxial film 30 is formed is taken out from the CVD apparatus.

  Between the step 2 and the step 3, the step of ion-implanting the first silicon carbide epitaxial layer, the step of oxidizing the surface of the first silicon carbide epitaxial layer, and the first silicon carbide epitaxial layer None of the steps of heat-treating the silicon carbide substrate having the temperature of 900 ° C. or higher is performed. Further, the step of depositing the silicon carbide epitaxial layer is not performed after the step of depositing the second silicon carbide epitaxial layer.

  Here, the first and second conditions will be described more specifically. Under these conditions, at least one of (a) C / Si ratio, (b) growth pressure, and (c) hydrogen flow rate is varied. For example, the C / Si ratio of the second condition may be set to be smaller than the first condition. Moreover, you may select so that the growth pressure of 2nd conditions may become lower than 1st conditions. Furthermore, the flow rate of the carrier gas under the second condition may be set to be larger than the first condition. The impurity concentration and thickness of first silicon carbide epitaxial layer 31 formed under the first condition are determined according to the breakdown voltage, on-resistance, etc. of the target device.

  The thickness of second silicon carbide epitaxial layer 32 formed under the second condition may be smaller than the thickness of first silicon carbide epitaxial layer 31. First silicon carbide epitaxial layer 31 and second silicon carbide epitaxial layer 32 may have the same conductivity type. First silicon carbide epitaxial layer 31 and second silicon carbide epitaxial layer 32 may contain the same impurity. The average value of the impurity concentration of second silicon carbide epitaxial layer 32 may substantially match the average value of the impurity concentration of first silicon carbide epitaxial layer 31. Alternatively, the impurity concentration of second silicon carbide epitaxial layer 32 is less than the impurity concentration of first silicon carbide epitaxial layer 31 so that the influence on the impurity layer formed by the ion implantation method in the device manufacturing process is reduced. May be small. Further, the first silicon carbide epitaxial layer forming step in step 2 and the second silicon carbide epitaxial layer forming step in step 3 may be performed continuously in the CVD apparatus. Thereby, processing time can be shortened. Note that the wafer may be temporarily removed from the CVD apparatus between the step 2 and the step 3.

The impurity concentration variation of first silicon carbide epitaxial layer 31 may be, for example, 5% or less in σ / mean. On the other hand, the impurity concentration variation of second silicon carbide epitaxial layer 32 may be larger than the impurity concentration variation of first silicon carbide epitaxial layer 31. The impurity concentration variation of second silicon carbide epitaxial layer 32 may be, for example, 10% or more in terms of σ / mean. Furthermore, the average value of the impurity concentration of second silicon carbide epitaxial layer 32 may be substantially the same as or smaller than the average value of the impurity concentration of first silicon carbide epitaxial layer 31. The pit density detected when the surface of the second silicon carbide epitaxial layer 32 is inspected with a confocal differential interferometer may be, for example, 1 cm ⁻² or less. The thickness of second silicon carbide epitaxial layer 32 may be 0.5 μm or more. Thereby, the effect of reducing the pit density is obtained. The thickness of second silicon carbide epitaxial layer 32 may be 1.5 μm or more. On the other hand, the thickness of second silicon carbide epitaxial layer 32 may be, for example, 3 μm or less. Thereby, the in-plane uniformity of the impurity concentration in the device can be sufficiently ensured.

  Here, an example of the SiC epitaxial film 30 having a two-layer structure is shown, but the SiC epitaxial film 30 may have a laminated structure of three or more epitaxial layers having different growth conditions. In this case, the epitaxial layer to be the surface layer may be formed under the second condition, and at least one of the other layers may be formed under the first condition.

  The embodiments and examples disclosed in the present application should be considered as illustrative in all points and not restrictive. The scope of the present disclosure is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The present disclosure can be widely used for a silicon carbide epitaxial substrate, a silicon carbide semiconductor device such as a MISFET using the silicon carbide epitaxial substrate, various control devices and driving devices.

DESCRIPTION OF SYMBOLS 1 CVD apparatus 2 Fixed susceptor 3 Heat insulating material 4 Rotation susceptor 5 Holder 6 Wafer 7 Heating coil 10 MISFET
11 substrate 12 body region 13 source region 14 gate insulating film 15 gate electrode 16 JEFT region 17 drain electrode 30 SiC epitaxial film 31 first silicon carbide epitaxial layer 32 second silicon carbide epitaxial layer 100 SiC epitaxial substrate

Claims (6)

A step of setting the semiconductor substrate in a CVD apparatus with the main surface of the semiconductor substrate as a surface;
A first silicon carbide epitaxial layer containing impurities at a first growth pressure by supplying a first source gas containing carbon atoms and silicon atoms and a first carrier gas to the main surface of the semiconductor substrate. Depositing
By supplying a second source gas containing a carbon atom and a silicon atom and a second carrier gas to the surface of the first silicon carbide epitaxial layer, a second containing an impurity at a second growth pressure is provided. Depositing a silicon carbide epitaxial layer;
The C / Si ratio that is the ratio of the number of carbon atoms to the number of silicon atoms contained in the second source gas is the C / Si ratio that is the ratio of the number of carbon atoms to the number of silicon atoms contained in the first source gas. The second growth pressure is lower than the first growth pressure, or the flow rate of the second carrier gas is greater than the flow rate of the first carrier gas,
Performing ion implantation on the first silicon carbide epitaxial layer between the step of depositing the first silicon carbide epitaxial layer and the step of depositing the second silicon carbide epitaxial layer; And neither of the step of oxidizing the surface of the silicon carbide epitaxial layer and the step of heat-treating the semiconductor substrate having the first silicon carbide epitaxial layer at a temperature of 900 ° C. or higher,
A method for manufacturing a silicon carbide epitaxial substrate, which does not include a step of depositing a silicon carbide epitaxial layer after the step of depositing the second silicon carbide epitaxial layer. The second silicon carbide epitaxial layer has a larger variation in impurity concentration in a plane parallel to the main surface of the semiconductor substrate than the first silicon carbide epitaxial layer,
2. The method for manufacturing a silicon carbide epitaxial substrate according to claim 1, wherein a pit density on a surface of the second silicon carbide epitaxial layer is 1.0 cm ⁻² or less.   The ratio of the standard deviation with respect to the average value of the impurity concentration in the plane of the first silicon carbide epitaxial layer is 5% or less, and the standard with respect to the average value of the impurity concentration in the plane of the second silicon carbide epitaxial layer. The method of manufacturing a silicon carbide epitaxial substrate according to claim 1 or 2, wherein the deviation ratio is 10% or more.   4. The silicon carbide epitaxial substrate according to claim 1, wherein an average value of impurity concentration of said second silicon carbide epitaxial layer is equal to or less than an average value of impurity concentration of said first silicon carbide epitaxial layer. 5. Production method.   The method for manufacturing a silicon carbide epitaxial substrate according to any one of claims 1 to 4, wherein a thickness of the second silicon carbide epitaxial layer is 0.5 µm or more. A silicon carbide epitaxial substrate manufactured by the method according to claim 1;
A silicon carbide semiconductor device comprising: an electrode disposed on the silicon carbide epitaxial substrate.

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