CN112653439B - Multiband single-pole double-throw switch - Google Patents
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- CN112653439B CN112653439B CN202011484522.5A CN202011484522A CN112653439B CN 112653439 B CN112653439 B CN 112653439B CN 202011484522 A CN202011484522 A CN 202011484522A CN 112653439 B CN112653439 B CN 112653439B
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- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
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Abstract
The invention belongs to the technical field of wireless communication, and provides a multiband single-pole double-throw switch which is used for solving the problems of large chip layout area, high insertion loss and the like of a traditional series-parallel switch structure. On the basis of a traditional serial-parallel structure, an on-chip inductor is connected in parallel to a branch circuit where a switching tube is located, the on-chip inductor and a parasitic capacitor generated by a turned-off transistor form a parallel resonant cavity which resonates at different frequency bands, the single-pole double-throw switch can realize the multi-band multiplexing of the working frequency bands, not only can cover all frequency bands of 5G communication, but also can realize the free switching of the working frequency bands; meanwhile, compared with the traditional series-parallel switch structure, the two channels share 1 on-chip inductor, so that the number of the on-chip inductors is greatly reduced, the chip layout area is obviously reduced, and the insertion loss is reduced.
Description
Technical Field
The invention belongs to the technical field of wireless communication, relates to broadband and multiband millimeter wave technologies, and particularly relates to a multiband single-pole double-throw switch.
Background
With the popularization of wireless communication in our daily life, the application of broadband and multiband millimeter wave technology attracts more and more researchers' attention. In wireless communication, different communication standards specify different frequency bands for use, and broadband and multiband systems can enable multiple communication standards to use the same hardware to reduce costs. The ever-increasing demand for millimeter wave systems requires that front-end transceiver modules must be able to provide good RF performance and high integration at affordable cost; generally, most rf transceiver front-ends with single antenna use a single-pole double-throw switch to switch the transmission and reception modes; the rf switch is a key module of the whole rf front end, and its insertion loss, isolation and linearity affect the whole performance of the rf link.
In order to realize a switch chip of broadband millimeter waves, many studies have been made in recent years. Most commonly used are series-parallel switch configurations with a series inductance as the matching element, as shown in fig. 1 (a); the circuit comprises four transistors and three inductors, wherein the transistor M 1 And M 3 Is a stringIn conjunction with a switching tube, by adding a transistor M 2 And M 4 The isolation degree of the circuit is improved; however, the return loss and the insertion loss increase while the isolation is improved, which results in the bandwidth of the switching circuit being narrowed, and the inductor L is used to achieve the broadband matching effect 1 、L 2 、L 3 Are added at three ports. Assume control voltage V c At a low level, when the transistor M is at 1 、M 4 Off, equivalent to a capacitance C off (ii) a Transistor M 2 、M 3 On, it is equivalent to a small resistance R on (ii) a The circuit equivalent model at this time is shown in FIG. 1 (b), ignoring the resistance R on _M 1 And a resistor R on _M 2 Then capacitance C off _M 1 And C off _M 4 The parallel connection is equivalent to a capacitor C 0 (ii) a At this time, the inductance L 1 Capacitor C 0 Inductor L 2 An L-C-L T-shaped matching network is formed, and the switch chip can realize higher bandwidth through the matching network. However, the use of inductors on the three port chips of the switch chip also causes the following problems:
1) In order to realize broadband matching, on-chip inductors are added at three ports of a switch chip at the same time, the inductors are passive devices occupying the largest area in an integrated circuit, the three inductors greatly increase the layout area of the chip and are not beneficial to cost control; in the front radio frequency transceiving section, if the occupied area of the switch is too large, the whole layout of the system is not facilitated;
2) Compared with the III-V group compound process, the Q value of the passive device is lower, and the insertion loss of the switch can be increased by using more inductors in the standard silicon-based process; for a radio frequency transmitter, excessive insertion loss can reduce output power and affect efficiency; for the receiver, too large insertion loss introduces extra noise, affecting the system sensitivity.
Disclosure of Invention
The invention aims to solve the problems of the existing series-parallel single-pole double-throw switch with series inductance, and provides a novel multiband single-pole double-throw switch structure. The structure provided by the invention can cover all frequency bands of 5G communication, and meanwhile, compared with the traditional structure, the chip occupation area is smaller by sharing the inductor.
In order to realize the purpose, the invention adopts the technical scheme that:
a multi-band, single pole, double throw switch comprising: the transistor M1, the transistor M2, the transistor M3, the transistor M4, the transistor M5, the transistor M6 and the double-circle octagonal on-chip inductor; the circuit is characterized in that the source electrode of the transistor M1 is connected with the source electrode of the transistor M2 and is used as a third port P3 of the single-pole double-throw switch, the drain electrode of the transistor M1 is connected with the drain electrode of the transistor M3 and is used as a first port P1 of the single-pole double-throw switch, the drain electrode of the transistor M2 is connected with the drain electrode of the transistor M4 and is used as a second port P2 of the single-pole double-throw switch, and the grid electrodes of the transistor M1 and the transistor M4 are connected with a control voltage V c The gates of the transistors M2 and M3 are connected to a control voltage
The drains of the transistors M3 and M4 are grounded; the double-circle octagonal on-chip inductor is characterized in that two ends of the double-circle octagonal on-chip inductor are connected to the drains of the transistor M1 and the transistor M2 respectively, the double-circle octagonal on-chip inductor is formed by connecting the inner-circle octagonal on-chip inductor and the outer-circle octagonal on-chip inductor in parallel, openings are formed in the inner-circle octagonal on-chip inductor and the outer-circle octagonal on-chip inductor respectively, the opening end of the inner-circle octagonal on-chip inductor is connected with the source electrode and the drain electrode of the transistor M5 respectively, the opening end of the outer-circle octagonal on-chip inductor is connected with the source electrode and the drain electrode of the transistor M6 respectively, and the grid electrodes of the transistor M5 and the transistor M6 are connected with the control voltages V _ SW1 and V _ SW2 respectively.
Further, when the control voltage V is c At a high level, a control voltage
When the level is low, the single knifeThe first port P1 to the third port P3 of the double-throw switch are turned on, and the second port P2 to the third port P3 of the double-throw switch are turned off; when the control voltage V c At a low level, control voltage
When the voltage is high, the second port P2 to the third port P3 of the single-pole double-throw switch are turned on, and the first port P1 to the third port P3 are turned off.
Further, when the control voltages V _ SW1 and V _ SW2 are both at a low level, the single-pole double-throw switch operates in a low-frequency state; when the control voltage V _ SW1 is high level and the control voltage V _ SW2 is low level, the single-pole double-throw switch works in a medium frequency state; when the control voltages V _ SW1 and V _ SW2 are both high, the single-pole double-throw switch operates in a high-frequency state.
Furthermore, the inductor on the inner octagonal plate and the inductor on the outer octagonal plate are provided with openings which are opened at the midpoint of the inductor.
Further, the transistors M1 to M4 all adopt an alternating current floating gate floating body technology.
The invention has the beneficial effects that:
the invention provides a multiband single-pole double-throw switch, which is structurally characterized in that an on-chip inductor is connected in parallel to a branch circuit where a switch tube is arranged on the basis of a traditional series-parallel structure, and the on-chip inductor and a parasitic capacitor generated by a turned-off transistor form a parallel resonant cavity which resonates at different frequency bands, so that the multiband multiplexing of working frequency bands can be realized while the function of the single-pole double-throw switch is realized; compared with the traditional series-parallel switch structure, the two channels share 1 on-chip inductor, so that the number of the on-chip inductors is greatly reduced, and the chip layout area and the insertion loss are obviously reduced; meanwhile, the double-circle octagonal on-chip inductor is obtained through the innovative design of the on-chip inductor, the on-off of the inner/outer circle octagonal on-chip inductor is controlled through the transistor, the inductance value of the on-chip inductor is further adjusted, the free switching of high/medium/low frequency bands is realized, namely, the multiplexing of a plurality of frequency bands is realized, and the design complexity of the radio frequency front-end circuit is greatly reduced.
In summary, the present invention provides a multiband single-pole double-throw switch, which not only can cover all frequency bands of 5G communication, but also can realize free switching of working frequency bands; meanwhile, the chip layout area is smaller, and the insertion loss is smaller.
Drawings
Fig. 1 is a schematic diagram of a conventional series-parallel single-pole double-throw switch with a series inductor, in which (a) is a schematic circuit diagram and (b) is an equivalent circuit diagram.
Fig. 2 is a schematic diagram of a multi-band single pole double throw switch circuit according to the present invention.
Fig. 3 is an equivalent circuit diagram of the multi-band single pole double throw switch proposed by the present invention.
Fig. 4 is a diagram of simulation results of low frequency of the spdt switch according to the embodiment of the present invention, wherein (a) is insertion loss and (b) is return loss.
Fig. 5 is a diagram showing simulation results of if of the spdt switch according to the embodiment of the present invention, wherein (a) is insertion loss and (b) is return loss.
Fig. 6 is a diagram of simulation results of high frequency of the spdt switch according to the embodiment of the present invention, wherein (a) is insertion loss and (b) is return loss.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
The embodiment provides a novel multiband single-pole double-throw switch structure, which can be switched to different use frequency bands through different switch signals; compared with the traditional series-parallel single-pole double-throw switch with the series inductor, the series-parallel single-pole double-throw switch has smaller chip area and insertion loss.
The circuit schematic diagram of the multiband single-pole double-throw switch is shown in fig. 2, and specifically includes: transistors M1-M6 and a double-loop octagonal on-chip inductor; the transistor M1 and the transistor M2 are used as switching tubes for selecting a signal path, namely selecting the communication from the port P1 to the port P3 or the communication from the port P2 to the port P3; the transistor M3 and the transistor M4 are parallel transistors and are used for improving the isolation between the ports of the switch circuit which are not conducted with each other; the transistor M5 and the transistor M6 are used for controlling the double-circle octagonal on-chip inductor formed by top-layer metal and selecting different working frequency bands;
more specifically: the source electrode of the transistor M1 is connected with the source electrode of the transistor M2 and is used as a third port P3 of the single-pole double-throw switch, the drain electrode of the transistor M1 is connected with the drain electrode of the transistor M3 and is used as a first port P1 of the single-pole double-throw switch, the drain electrode of the transistor M2 is connected with the drain electrode of the transistor M4 and is used as a second port P2 of the single-pole double-throw switch, and the grid electrodes of the transistor M1 and the transistor M4 are connected with a control voltage V c The gates of the transistors M2 and M3 are connected with a control voltage
The drains of the transistor M3 and the transistor M4 are grounded; the double-circle octagonal chip on-inductor is formed by connecting two octagonal chip on-inductors in parallel, namely the octagonal chip on the inner circle on-inductor (small) and the octagonal chip on the outer circle on-inductor (large) in parallel, and two ends of the octagonal chip on-inductor (small) are respectively connected with the drain electrodes of the transistor M1 and the transistor M2 after the octagonal chip on-inductor (small) and the octagonal chip on the outer circle on-inductor (large) are connected in parallel; the inductor on the inner octagonal plate and the inductor on the outer octagonal plate are respectively provided with an opening, the open end of the inductor on the inner octagonal plate is respectively connected with a source electrode and a drain electrode of the transistor M5, the open end of the inductor on the outer octagonal plate is respectively connected with a source electrode and a drain electrode of the transistor M6, and grid electrodes of the transistor M5 and the transistor M6 are respectively connected with control voltages V _ SW1 and V _ SW2.
In this embodiment, the openings of the inner octagonal chip inductor and the outer octagonal chip inductor are both opened at the midpoint of the inductors, but the positions of the openings are not necessarily located at the midpoint. The transistors M1-M4 all adopt an alternating current floating gate floating body technology, namely, a grid electrode is connected with control voltage through a resistor, and a substrate is grounded through a resistor. The transistors M1 to M6 are all NMOS transistors.
In terms of working principle:
1) Single-pole double-throw switch
When controlling the voltage V c Is at a high level,
At low, transistors M1 and M4 are turned on, which is equivalent to a small resistance, transistors M2 and M3 are turned off,the transistors M2 and M3 are equivalent to capacitors due to the existence of parasitic capacitors of the transistors; at this time, the port P1 is connected to the port P3, the port P2 is connected to the port P3, and the equivalent circuit schematic diagram is shown in fig. 3; the signal flows from P1 through a small resistor R on M1 flows into port P3; and between the port P1 and the port P2, a capacitor C off The working frequency of a resonant cavity formed by the M2 and the inductor L forms a high-impedance state to block a signal from flowing into the port P2; even if a signal leaks to the port P2, it passes through the on-resistance R on M4 flows into the ground plane. Similarly, when the control voltage V c Is at a low level,
When the voltage level is high, the transistors M2 and M3 are turned on and equivalently become small resistors, the transistors M1 and M4 are turned off and equivalently become capacitors, and at this time, the port P2 is turned on to the port P3, and the port P1 is turned off to the port P3.
Meanwhile, the structure has the advantages that the inductor is connected in parallel between the transistor M1 and the transistor M2, so that the switch can share the same inductor L when two channels are switched, the layout area of a chip is effectively reduced, and the cost is saved.
2) Multiband selection
As can be seen from the schematic circuit diagram of the single-pole double-throw switch shown in fig. 2, the circuit can select different operating frequency bands by controlling the voltage V _ SW1 and the voltage V _ SW2; the method comprises the following specific steps:
when the control voltages V _ SW1 and V _ SW2 are both low level, the transistors M5 and M6 are turned off, the inductor is turned off at the moment, the circuit works in a low frequency state, and the capacitance value generated by the turned-off transistors can be ignored; the insertion loss of the single-pole double-throw switch circuit, the return loss of the P1 port and the return loss of the P2 port are shown in figure 4, and as can be seen from the figure, the insertion loss of the single-pole double-throw switch is less than 0.8dB and the return loss of the port is more than 12dB in the frequency range of 0-10 GHz;
when the control voltage V _ SW1 is high level and the control voltage V _ SW2 is low level, the transistor M5 is switched on, the transistor M6 is switched off, the inductance value of the double-coil octagonal inductor is larger at the moment, the inductor is shown as an inner-coil inductor, and the single-pole double-throw switch circuit works near 28GHz, namely in a medium-frequency state; at this time, the insertion loss of the single-pole double-throw switch circuit, the return loss of the P1 port and the return loss of the P2 port are shown in fig. 5, and it can be seen from the figure that the insertion loss of the single-pole double-throw switch is less than 1.9dB, the minimum insertion loss is 1.6dB, and the return loss of the port is greater than 12dB in the frequency range of 22-32 GHz;
when the control voltages V _ SW1 and V _ SW2 are both high levels, the transistors M5 and M6 are simultaneously conducted, at the moment, the double-circle octagonal inductor is formed by connecting an inner circle inductor and an outer circle inductor in parallel, the inductance value is small, a resonant cavity formed by a switch-off capacitor and the octagonal inductor resonates to be near high-frequency 38GHz, namely, the circuit works in a high-frequency state; at this time, the insertion loss of the single-pole double-throw switch circuit, the return loss of the P1 port and the return loss of the P2 port are as shown in FIG. 6, and it can be seen from the figure that the insertion loss of the single-pole double-throw switch is less than 2dB and the return loss of the port is greater than 12dB in the frequency range of 36-42 GHz;
therefore, the on-off of the inductor on the inner/outer ring octagonal chip is controlled by the transistor, the inductance value of the inductor on the chip can be adjusted, the free switching of high/medium/low frequency bands is further realized, namely, the multiplexing of a plurality of frequency bands is realized, and the design complexity of a radio frequency front-end circuit is greatly reduced.
While the invention has been described with reference to specific embodiments, any feature disclosed in this specification may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise; all of the disclosed features, or all of the method or process steps, may be combined in any combination, except mutually exclusive features and/or steps.
Claims (5)
1. A multi-band, single pole, double throw switch comprising: the transistor M1, the transistor M2, the transistor M3, the transistor M4, the transistor M5, the transistor M6 and the double-circle octagonal on-chip inductor; the circuit is characterized in that the source electrode of the transistor M1 is connected with the source electrode of the transistor M2 and is used as a third port P3 of the single-pole double-throw switch, the drain electrode of the transistor M1 is connected with the drain electrode of the transistor M3 and is used as a first port P1 of the single-pole double-throw switch, the drain electrode of the transistor M2 is connected with the drain electrode of the transistor M4 and is used as a second port P2 of the single-pole double-throw switch, and the transistor M1 is connected with the grid electrode of the transistor M4Control voltage V c The gates of the transistors M2 and M3 are connected with a control voltage
The drains of the transistors M3 and M4 are grounded; the two ends of the double-circle octagonal on-chip inductor are respectively connected with the drains of the transistor M1 and the transistor M2 and are formed by connecting the inner circle octagonal on-chip inductor and the outer circle octagonal on-chip inductor in parallel, openings are respectively formed in the inner circle octagonal on-chip inductor and the outer circle octagonal on-chip inductor, the opening end of the inner circle octagonal on-chip inductor is respectively connected with the source electrode and the drain electrode of the transistor M5, the opening end of the outer circle octagonal on-chip inductor is respectively connected with the source electrode and the drain electrode of the transistor M6, and the grid electrodes of the transistor M5 and the transistor M6 are respectively connected with control voltages V _ SW1 and V _ SW2; the drain electrode of the transistor M5 is connected to the drain electrode of the transistor M1 through the inductor on the inner circle octagonal chip, and the source electrode of the transistor M5 is connected to the drain electrode of the transistor M2 through the inductor on the inner circle octagonal chip; the drain of the transistor M6 is connected to the drain of the transistor M1 via an outer octagonal on-chip inductor, and the source of the transistor M6 is connected to the drain of the transistor M2 via an outer octagonal on-chip inductor.
2. The multi-band SPDT switch of claim 1, wherein when the control voltage V is applied c At a high level, a control voltage
When the voltage is low level, the first port P1 to the third port P3 of the single-pole double-throw switch are conducted, and the second port P2 to the third port P3 are cut off; when controlling the voltage V c At a low level, a control voltage
When the voltage is high, the second port P2 to the third port P3 of the single-pole double-throw switch are turned on, and the first port P1 to the third port P3 are turned off.
3. The multiple band single pole double throw switch of claim 1 wherein the single pole double throw switch operates at a low frequency when both of the control voltages V _ SW1 and V _ SW2 are low; when the control voltage V _ SW1 is high level and the control voltage V _ SW2 is low level, the single-pole double-throw switch works in a medium frequency state; when the control voltages V _ SW1 and V _ SW2 are both high, the single-pole double-throw switch operates in a high-frequency state.
4. The multiple band single pole double throw switch of claim 1 wherein the inner octagonal patch inductor and the outer octagonal patch inductor have openings at the midpoint of the inductors.
5. The multi-band single pole, double throw switch of claim 1 wherein each of said transistors M1-M4 is of ac floating gate floating body technology.
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| CN110943729A (en) * | 2019-12-23 | 2020-03-31 | 中国电子科技集团公司第五十四研究所 | CMOS millimeter wave series asymmetric single-pole double-throw switch |
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| JP2005005859A (en) * | 2003-06-10 | 2005-01-06 | Sanyo Electric Co Ltd | Switch circuit apparatus |
| CN100547941C (en) * | 2003-12-11 | 2009-10-07 | 日立金属株式会社 | Multiband high-frequency circuit, multiband high frequency circuit components and multi-band communication apparatus |
| US7254371B2 (en) * | 2004-08-16 | 2007-08-07 | Micro-Mobio, Inc. | Multi-port multi-band RF switch |
| JP4724498B2 (en) * | 2005-08-30 | 2011-07-13 | ルネサスエレクトロニクス株式会社 | Semiconductor integrated circuit device and high frequency power amplification module |
| JP2015122628A (en) * | 2013-12-24 | 2015-07-02 | 株式会社村田製作所 | Switching circuit and semiconductor module |
| CN105049016B (en) * | 2015-08-07 | 2018-02-13 | 康希通信科技（上海）有限公司 | The single-pole double throw RF switch and hilted broadsword of single-pole single-throw(SPST RF switch and its composition throw RF switch more |
| CN108875203A (en) * | 2018-06-15 | 2018-11-23 | 南京邮电大学 | A kind of plug-type distributed amplifier circuit and its implementation and application |
| JP2020088643A (en) * | 2018-11-27 | 2020-06-04 | 住友電気工業株式会社 | Single pole double throw switch |
| CN110601661B (en) * | 2019-09-06 | 2023-03-24 | 电子科技大学 | CMOS millimeter wave active quasi-circulator |
| CN110943728A (en) * | 2019-12-23 | 2020-03-31 | 中国电子科技集团公司第五十四研究所 | CMOS millimeter wave ultra-wideband parallel asymmetric single-pole double-throw switch |
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