WO2011035519A1

WO2011035519A1 - Radio frequency power synthesis circuit

Info

Publication number: WO2011035519A1
Application number: PCT/CN2009/075965
Authority: WO
Inventors: 余正明
Original assignee: 惠州市正源微电子有限公司
Priority date: 2009-09-23
Filing date: 2009-12-24
Publication date: 2011-03-31
Also published as: CN101667854B; CN101667854A

Abstract

A radio frequency (RF) power synthesis circuit which can be used for multi-frequency power signal control and synthesis is disclosed, and it uses impedance converters to reduce voltage across the switches. The circuit comprises: a control circuit; a first switch group (10) which is controlled by the control circuit and connected between transmission ports (TX₁-TX_N) and a multiplexer (16), thereby forming one or plural transmission frequency bands 1-N; a second switch group (14) which is controlled by the control circuit and connected between reception ports (RX₁₁-RX_NK) and the following impedance converter group (12), thereby forming one or plural reception frequency bands 1-N; and the impedance converter group (12) for reducing voltage across the switches in the first switch group (10) and the second switch group (14), which is connected between the second switch group (14) and the multiplexer (16). The circuit uses impedance converters (18) to isolate the large power signal from the switches, thereby effectively improves the capability of voltage breakdown resistance of the switch elements in the circuit and enables application of the CMOS device. The invention thus enables higher integration degree and lower cost of the RF power amplifier chip.

Description

Instruction manual

Title of Invention: RF power synthesis circuit

[1] Technical field

[2] The present invention relates to the field of wireless communication systems, and in particular to a novel RF power synthesis circuit for multi-band power signal control and synthesis.

[3] Background Art

[4] Today, the wireless communications industry is growing. With the growing demand of consumers, most mobile communications devices can work in several different frequency bands. This needs to be achieved with multiple power outputs. However, mobile communication devices such as mobile phones are often equipped with only one antenna for a smaller size and better portability. This requires the introduction of a RF power synthesis circuit between the power amplifier and the antenna to control the multi-power output to achieve the desired functionality. Performance specifications such as insertion loss, isolation, power capacity, and breakdown voltage of the power synthesis circuit will directly affect the performance of the entire wireless communication system. These performance metrics are closely related to the circuit form of the power synthesis circuit and the primary RF modules therein.

[5] In power synthesis circuits, to achieve satisfactory performance, the insertion loss must be reduced as much as possible, and the isolation of the switch is improved. In practical applications, the isolation of the RF switch is usually required to be more than 20 dB, and the insertion loss is less than ldB. In today's commercial products, to achieve such performance, core modules such as RF switches and power amplifiers are mainly manufactured through expensive GaAs processes. However, the GaAs process does not easily implement complex logic circuits. Therefore, all switching control signals of the power synthesis circuit need to be implemented by off-chip CMOS logic circuits, which results in more pads and a larger area for the entire module. Greatly increased production costs.

[6] However, the low cost and high integration of CMOS processes are driving the rapid development of high power devices implemented in CMOS processes. It is necessary to invent a high-performance RF power synthesizing circuit capable of achieving a low-cost, highly integrated CMOS process.

[7] Summary of the invention

[8] The present invention aims to solve the problem that the RF power synthesizing circuit using the GaAs switch in the conventional technology is high in cost and cannot be highly integrated, and the CMOS switch has poor isolation and insufficient voltage breakdown capability. The problem in conventional power synthesis circuits provides a new type of RF power synthesis circuit with low cost and high integration of CMOS switches.

In order to solve the above problems, the technical solution adopted by the present invention is: Providing a radio frequency power synthesizing circuit, comprising:

Control circuit;

a first switch group, controlled by a control circuit, connected between the transmit port and the multiplexer to form one or more transmit frequency bands 1-N;

a second switch group, controlled by a control circuit, connected between the receiving port and the impedance transformer group described below, forming one or more receiving frequency bands 1-N;

The impedance converter group is configured to reduce a voltage received by the switch in the first switch group and the second switch group, and is also connected between the second switch group and the multiplexer.

Specifically, each frequency band in the second switch group includes one or more independent receiving channels.

1-K; each of the 1-K in the second switch group includes a receiving switch connected in series between the receiving port and the impedance converter, and a shunt switch connected to the receiving port at one end and grounded at one end. The receiving switch and the shunt switch control terminal are controlled by a control circuit.

Specifically, the impedance transformer group includes one or more impedance transformers respectively connected to the receiving switch; the impedance converter includes a switching element, and the impedance converter is controlled by a separate control signal to exhibit a high impedance state or Low impedance state.

Specifically, the switching elements in the first and second switch groups and the impedance variator group are one or more switching transistors.

Preferably, the first and second switch groups and the switching elements in the impedance variator group are both fabricated by a CM OS process.

The radio frequency power synthesizing circuit of the invention uses a matching network or a combination of a multiplexer and a filter with a filtering function to effectively improve the voltage breakdown resistance of the CMOS switch, and the combined circuit is applied to the synthesizing circuit. Moreover, the RF power amplifier chip has high integration and low cost; the circuit can also improve the isolation and sensitivity of the wireless communication system, and enable the RX receiver to receive the RF signal and the insertion loss of the wireless communication system. Lower.

DRAWINGS [22] FIG. 1 is a schematic diagram of a circuit principle according to the present invention;

2 is a schematic circuit diagram of an embodiment of the present invention;

[24] FIG. 3 is a circuit diagram of an embodiment of a switching element for floating the CMOS tube substrate in the first and second switch groups and the impedance converter;

4 is a circuit diagram of a specific embodiment of the duplexer.

[26] Specific implementation

[27] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[28] The present invention is directed to protecting a novel RF power synthesis circuit in which the RF switches can be fabricated using a CMOS process. CMOS switch designs in high-power applications require problems with the nature of materials from CMOS processes, such as lower breakdown voltages. In order to alleviate the voltage breakdown problem, the impedance converter is used to isolate the high power signal from the receiving switch. Thanks to the isolation of the impedance converter, the structure of the receiving switch can be greatly simplified, and the isolation between transmission and reception can be improved. After simplification, the cost and size of the chip will also be reduced. Compared with the previous circuit structure, the insertion loss of the switch receiving circuit is lower, and the performance of the entire wireless communication system is improved. The switch group is more easily implemented by various processes including a CMOS process.

[29] FIG. 1 is a circuit schematic diagram of the present invention. The circuit includes a first switch group (transmitting switch group) 10, an impedance converter group 12, a second switch group, that is, a receiving switch group 14, a multiplexer 16, and an antenna connected to the multiplexer. As shown, the transmit switch group 10 is connected between the transmit switch ports TX1-TXN and the nodes A1-AN. In the receiving portion, the impedance transformer group 12 is placed between the node A1-AN and the receiving switch group 14. Further, the receiving switch group 14 is connected between the impedance converter 12 and the receiving ports RX1 to RXN, and the multiplexer is connected between the nodes A1 - AN and the antenna terminal. The receiving switch group 14, the transmitting switch group 10, and the impedance converter group 12 are all controlled by circuit control.

[30] The working principle of the circuit of the present invention will be described by taking the power amplifier in the band 1 transmission port as an example.

[31] When the circuit operates in the transmitting state, the control circuit controls the TX_SW1 in the switch transmitting switch group 10 to be turned on, and the switch TX_SW2-TX_SWN in the transmitting switch group 10 and the receiving switch RX_S Wl l - RX_SWNK in the receiving switch group 14 are all Shutdown; The shunt switch S_SW11-S_SWNK in the receiving switch group 14 is also turned on to provide a ground channel. Thus the power signal from the transmit port TX1 will pass through the switch TX_SW1 Up to the node A1, the control circuit controls the impedance converter of the corresponding impedance converter group 12 to exhibit a high input impedance. Therefore, the RF power signal will pass through the multiplexer to the antenna end and then be transmitted through the antenna. In the multiplexer, each channel corresponds to one frequency band, and the channel exhibits a low resistance in the corresponding frequency band, and a high resistance state in other frequency bands, ensuring that most of the power signals can be easily transmitted to the antenna end, and leakage less. When the power amplifier is operating in other transmit bands, the workflow of the power synthesis circuit can be deduced.

[32] When the power synthesizing circuit operates in the receiving state 吋, taking the signal of the receiving band 1 to the receiving port RX1 as an example, all the switches in the transmitting switch group 10, the shunt switch 8_8\¥11 and all except the receiving switch RX_SW11 The receiving switch will be disconnected, and the other shunt switch and receiving switch RX_SW11 will be turned on. The frequency spectrum signal of band 1 will pass through the frequency band from the antenna end 1

The low-resistance path reaches the node Al. Since all the switches in the transmit switch group 10 are disconnected, the transmit channel exhibits a relatively high impedance and the signal cannot pass. When the circuit is operating in the receiving state, the impedance converter on the corresponding frequency band exhibits a low impedance, and the RF signal will reach the receiving port RX1 through the impedance converter and the turned-on switch RX_S W11. Similarly, for other ports, it is only necessary to adjust the working state of the switch according to the receiving state of the relevant circuit to realize the function of receiving different ports. For the reception of signals in other frequency bands, the working state of the power synthesis circuit can be deduced by analogy.

2 is an embodiment of the present invention for power synthesis using a CMOS switch. In the figure, the value of N is 2, and the value of K is also 2, that is, the transmitting switch group 10 has two switching elements corresponding to two transmitting frequency bands, and the corresponding impedance converter group 12 has two impedance transformers, multiplexing. The duplexer is used, and the receiving switch group 14 has four receiving frequency bands. As shown in the figure, MOS tube Ml,

M2 is connected between the transmitting ports TX1, ΤΧ2 and the nodes 20, 22, respectively. The impedance converter 24 is composed of an inductor L1, a capacitor C1, and a MOS transistor Μ3. The impedance converter 26 is composed of an inductor L2, a capacitor C2, and a MOS transistor M4. The MOS tube M5-M8 is connected as a receiving switch between the impedance converter and the receiving port RX1-RX4, and the MOS tube M9-M12 is connected as a shunt switch between the receiving port RX1-RX4 and the ground.

[34] When the power amplifier is operating in the frequency band 1, the control circuit controls the transistor M1 to be turned on, and the control transistors M2, M5, M6, M7 and M8 are all turned off, and the transistors M9, M10, Mi l and M12 are turned on. arrived. The power signal arrives at node 20 through M1 from transmit port TX1. When the circuit is operating in the transmit state, the pull-down transistor M3 conducts to ground, which exhibits a much higher impedance than the duplexer. Therefore the RF signal will It is transmitted from the node 20 to the antenna end and leaks little. When the power amplifier is operating in Band 2, the operating state of the circuit can be analogized.

[35] When the circuit operates to receive the band 1 signal to RX, port 1 吋, transistors Ml, M2, M3, M6, M7, M8 and M9 are turned off and the other switches are turned on. The RF signal of Band 1 will arrive at Node 20 from the antenna end through the low impedance path in the duplexer. Since Ml and M2 are open, the transmitting end exhibits high impedance to the signal. When the circuit is operating in the receive state, the impedance converter 24 changes to a low impedance path. Therefore, the RF signal can reach the receiving end RX1 directly through M5. Similarly, for other ports, the function can be realized by changing the working state of the switch according to the receiving state. When other bands are received, the operating state of the circuit can be analogized.

[36] Fig. 3 is a circuit diagram showing an embodiment of a switching element for floating the CMOS tube substrate in the first and second switch groups and the impedance converter. The switching element (RF switch) consists of one or more transistors connected in series with M1- MN, and the gate and the substrate of each tube are separated by a large resistor RG1-RGN, RB1-RBN. Ports D and S are the input and output ports of the RF switch. In earlier circuits, the substrate of the switch was connected to ground, causing severe leakage at high frequency and large signals. Therefore, in the circuit of the present invention, the signal loss can be effectively reduced by adding a large resistor to the substrate port. Similarly, a large resistor is added to the gate to block the large signal coupling to the control terminal to affect the control signal.

[37] FIG. 4 is a circuit schematic diagram of an embodiment of a duplexer. The duplexer includes two bandpass filters with capacitive inductance. In channel 1, the inductor L1 can effectively resonate the capacitor Cl in the band 1吋, so that the channel 1 seen from the node 40 to the antenna end shows low impedance in the band 1 and high impedance in the other bands. In channel 2, the inductor L2 can effectively resonate the capacitor C2 in the band 2吋, so that the channel 2 seen from the node 42 to the antenna end exhibits low impedance in the band 2 and high impedance in the other bands.

[38] After the impedance transformer is used in the power combining circuit of the present invention, the switching elements in the transmitting/receiving switch module group are more easily implemented using different processes, including a CMOS process. Therefore, the circuit of the present invention will be more integrated, lower in cost, and perform better.

[39] The specific implementation of each impedance converter and the selection of the duplexer described in the present invention can be specifically determined by those skilled in the art according to the situation, and is not limited to the description in the present invention.

The above is only a preferred embodiment of the present invention, and it should be noted that any minor changes and equivalent substitutions made thereto without departing from the inventive concept are intended to be within the scope of the present invention.

Claims

Claim

1. RF power synthesis circuit, including:

Control circuit;

The first switch group, controlled by the control circuit, is connected between the transmitting port and the multiplexer to form one or more transmitting frequency bands 1-N;

a second switch group, controlled by a control circuit, connected between the receiving port and the impedance converter group described below to form one or more receiving frequency bands 1-N;

The impedance converter group is configured to reduce a voltage received by the switches in the first switch group and the second switch group, and is also connected between the second switch group and the multiplexer.

2. The method according to claim 1, characterized in that: each frequency band in the second switch group comprises one or more independent receiving channels 1-K.

The radio frequency power synthesizing circuit according to claim 1 or 2, wherein: each of the 1-K in the second switch group includes a receiving switch connected in series between the receiving port and the impedance converter. And a shunt switch connected to the receiving port at one end and grounded at one end, wherein the receiving switch and the shunt switch control end are controlled by the control circuit.

4. The RF power synthesis circuit of claim 1 wherein: said impedance transformer bank comprises one or more impedance transformers respectively coupled to the receiving switches.

5. The method of claim 1 wherein: said impedance transformer comprises a switching element, said impedance converter being controlled by a separate control signal to exhibit a high impedance state or a low impedance state.

The radio frequency power synthesizing circuit according to claim 1, wherein the switching elements in the first and second switch groups and the impedance converter group are one or more switching transistors.

The radio frequency power synthesizing circuit according to claim 1, wherein the switching elements of the first and second switch groups and the impedance converter group are both fabricated by a CMOS process.