CN112599623B - 一种柔性二极管芯片及其制作方法 - Google Patents

一种柔性二极管芯片及其制作方法 Download PDF

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CN112599623B
CN112599623B CN202110236718.0A CN202110236718A CN112599623B CN 112599623 B CN112599623 B CN 112599623B CN 202110236718 A CN202110236718 A CN 202110236718A CN 112599623 B CN112599623 B CN 112599623B
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魏婷婷
王兵
杜伟
何键华
王硕
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Zhongshan Dehua Chip Technology Co ltd
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Abstract

本发明提供了一种柔性二极管芯片及其制作方法。一种柔性二极管芯片,包括依次叠加的铜衬底;N面电极;N型InGaAs欧姆接触层;N型InP层;N型InGaAs层;I型InGaAsP层;I型InP层;I型InGaAs欧姆接触环,I型InGaAs欧姆接触环形成的内部区域内设置有SiNx增透膜;P面电极,P面电极为环状,直径与所述I型InGaAs欧姆接触环的直径相同。本发明以铜替代刚性InP作为衬底,由于铜柔韧性较好、厚度可调,因此可使二极管芯片具备柔性,扩宽其应用场景。

Description

一种柔性二极管芯片及其制作方法
技术领域
本发明属于半导体芯片技术领域,具体涉及一种柔性二极管芯片及其制作方法。
背景技术
雪崩光电二极管(Avalanche Photo Diode, APD)是一种P-N结型的光检测二极管。它利用了载流子的雪崩倍增效应来放大光电信号以提高检测的灵敏度,具体来说,是在以硅或锗为基体材料制成的光电二极管的P-N结上,加上反向偏压,射入的光被P-N结吸收后会形成光电流,加大反向偏压会产生“雪崩”(即光电流成倍地激增)的现象,因此这种二极管被称为“雪崩光电二极管”。
目前,APD芯片大多采用刚性磷化铟(InP)作为衬底。这种刚性的衬底,决定了形成的APD芯片也是刚性的,局限了APD芯片的应用场景,使其不适用于曲面等复杂环境。
发明内容
本发明旨在至少解决现有技术中存在的上述技术问题之一。为此,本发明提供了一种柔性二极管芯片,所述柔性二极管芯片通过采用厚度可调、柔韧性好的铜作为衬底,扩宽了二极管芯片的应用场景。
本发明还提供了一种柔性二极管芯片的制作方法。
一种柔性二极管芯片,包括依次叠加的
铜衬底;
N面电极;
N型InGaAs欧姆接触层;
N型InP层;
N型InGaAs层;
I型InGaAsP层;
I型InP层;
I型InGaAs欧姆接触环,所述I型InGaAs欧姆接触环将所述I型InP层表面分为圆心区和圆外区,所述I型InGaAs欧姆接触环的内壁以及所述圆心区,设置有SiNx增透膜;
P面电极,所述P面电极为环状,直径与所述I型InGaAs欧姆接触环的直径相同。
根据本发明的一些实施方式,所述铜衬底,厚度为30μm~50μm。
根据本发明的一些实施方式,所述铜衬底,厚度为35μm~45μm。
根据本发明的一些实施方式,所述N面电极,为在所述N型InGaAs欧姆接触层表面依次叠加的镍层、锗层、金层、铜层。
根据本发明的一些实施方式,所述N面电极,为在所述铜衬底表面依次叠加的厚为100nm厚的镍层、厚为200nm的锗层、厚为5000nm~20000nm的金层、厚为10000nm的铜层。
根据本发明的一些实施方式,所述N型InGaAs欧姆接触层,进行了硅掺杂。
根据本发明的一些实施方式,所述N型InGaAs欧姆接触层中,硅掺杂载流子浓度为4×1018cm-3
根据本发明的一些实施方式,所述N型InP层,进行了硅掺杂。
根据本发明的一些实施方式,所述N型InP层中,硅掺杂载流子浓度为4×1018cm-3
根据本发明的一些实施方式,所述N型InGaAs层,进行了硅掺杂。
根据本发明的一些实施方式,所述N型InGaAs层中,硅掺杂载流子浓度为4×1018cm-3
根据本发明的一些实施方式,所述I型InGaAs欧姆接触环,及所述圆心区,进行了锌掺杂,锌掺杂载流子浓度为1018cm-3~5×1018cm-3
根据本发明的一些实施方式,所述P面电极,为在所述I型InGaAs欧姆接触环表面依次叠加的钛层和金层。
根据本发明的一些实施方式,所述P面电极,为在所述I型InGaAs欧姆接触环表面依次叠加的,厚为200nm的钛层,和厚为5000nm~20000nm的金层。
一种柔性二极管芯片的制作方法,包括以下步骤:
S1.在N型InP衬底表面设置缓冲层,在所述缓冲层表面依次设置所述N型InGaAs欧姆接触层、所述N型InP层、所述N型InGaAs层、所述I型InGaAsP层、所述I型InP层与I型InGaAs欧姆接触层;
S2.蚀穿所述I型InGaAs欧姆接触层,形成所述I型InGaAs欧姆接触环;
S3.对所述I型InGaAs欧姆接触环及所述圆心区进行锌掺杂后进行退火处理;
S4.在所述I型InGaAs欧姆接触环的内壁以及所述圆心区设置所述SiNx增透膜;
S5.在所述I型InGaAs欧姆接触环,远离所述I型InP层的一侧表面,设置所述P面电极,在所述P面电极的表面贴附临时支撑衬底;
S6.腐蚀所述N型InP衬底和缓冲层,露出所述N型InGaAs欧姆接触层,在所述N型InGaAs欧姆接触层表面设置所述N面电极,在所述N面电极表面镀覆所述铜衬底;
S7.除去所述临时支撑衬底,即得所述柔性二极管芯片。
根据本发明的一些实施方式,步骤S1中,所述缓冲层,材质为InP,作用是减少外延生长所述N型InGaAs欧姆接触层过程中的错位。
根据本发明的一些实施方式,步骤S2中,所述I型InGaAs欧姆接触环,设置方法为:先在所述I型InGaAs欧姆接触层表面设置环状掩膜区,再对所述环状掩膜区之外的所述I型InGaAs欧姆接触层进行腐蚀。
根据本发明的一些实施方式,所述环状掩膜区,材质为SiO2,设置方法为:先在所述I型InGaAs欧姆接触层表面设置全覆盖的SiO2掩膜层,然后进行腐蚀,形成所述环状掩膜区。
根据本发明的一些实施方式,所述全覆盖的SiO2掩膜层,设置方法为等离子体增强化学气相。
根据本发明的一些实施方式,所述SiO2掩膜层的腐蚀,需对所述环状掩膜区进行光刻保护。
根据本发明的一些实施方式,所述SiO2掩膜层的腐蚀,腐蚀液为HF的水溶液。
根据本发明的一些优选的实施方式,所述SiO2掩膜层的腐蚀,腐蚀液为HF的水溶液,HF的质量浓度为10%~40%。
根据本发明的一些实施方式,所述I型InGaAs欧姆接触环的尺寸,与所述环状掩膜区尺寸相同。
根据本发明的一些实施方式,所述I型InGaAs欧姆接触层的腐蚀,腐蚀液为,H3PO4和H2O2的混合水溶液。
根据本发明的一些实施方式,所述制作方法,还包括在步骤S3前,形成扩散孔,所述扩散孔包括所述I型InGaAs欧姆接触环及所述圆心区所在区域。
根据本发明的一些实施方式,所述扩散孔的设置方法为:先在步骤S2所得部件,I型InGaAs欧姆接触环所在一侧表面设置全覆盖的SiO2绝缘层,然后对所述扩散孔区域进行腐蚀。
根据本发明的一些实施方式,所述扩散孔的设置,需对所述扩散孔以外的区域进行光刻保护。
根据本发明的一些实施方式,所述扩散孔的腐蚀,腐蚀液为HF的水溶液。
根据本发明的一些实施方式,步骤S3中,所述锌掺杂,方法为气相外延生长法(MOCVD),原料为二甲基锌(DMZn)和PH3
根据本发明的一些实施方式,步骤S3中,所述退火,温度为520℃~580℃,时间为1min~5min。
根据本发明的一些优选的实施方式,步骤S3中,所述退火,温度为550℃,时间为1min。
根据本发明的一些实施方式,步骤S4中,所述SiNx增透膜的设置方式为:先在步骤S3所得部件,I型InGaAs欧姆接触环所在一侧表面,设置全覆盖的SiNx增透层,之后光刻保护所述I型InGaAs欧姆接触环内壁及所述圆心区,并对其他区域进行刻蚀。
根据本发明的一些实施方式,所述全覆盖SiNx增透膜的设置方法为:等离子体增强化学气相沉积。
根据本发明的一些实施方式,所述SiNx增透层的刻蚀,为干法刻蚀或湿法刻蚀中的至少一种。
根据本发明的一些实施方式,所述SiNx增透层的刻蚀,为感应耦合等离子体刻蚀与HF水溶液湿法腐蚀相结合的方法。
根据本发明的一些实施方式,所述干法刻蚀,为感应耦合等离子体刻蚀。
根据本发明的一些实施方式,所述湿法刻蚀,刻蚀液为HF的水溶液。
根据本发明的一些实施方式,步骤S5中,所述P面电极的设置方法为溅射。
根据本发明的一些优选的实施方式,步骤S5中,所述P面电极的设置方法为磁控溅射。
根据本发明的一些实施方式,步骤S5中,所述临时支撑衬底为刚性的衬底。
根据本发明的一些实施方式,步骤S5中,所述临时支撑衬底材质为蓝宝石或硅。
根据本发明的一些优选的实施方式,步骤S5中,所述临时支撑衬底为硅片。
根据本发明的一些实施方式,步骤S5中,所述临时支撑衬底,通过热解胶膜进行贴附。
根据本发明的一些优选的实施方式,所述热解胶膜为双面热解胶膜。
根据本发明的一些实施方式,步骤S6中,所述腐蚀,腐蚀液为HCl水溶液。
根据本发明的一些实施方式,步骤S6中,所述N面电极,设置方法为电子束蒸镀镀膜。
根据本发明的一些实施方式,步骤S6中,所述镀覆,方法为电镀,电镀液为CuSO4和H2SO4的混合溶液。
根据本发明的一些实施方式,所述电镀液中CuSO4的质量浓度为700g/L,浓硫酸(质量分数为98%)与水的体积比为3:20。
根据本发明的一些实施方式,步骤S7中,所述除去,方法为加热,使所述热解胶膜失效。
根据本发明的一些实施方式,所述加热,温度为180℃,时间为5min。
与现有技术相比,本发明至少具有以下有益效果。
(1)本发明以铜替代刚性InP作为衬底,由于铜柔韧性较好、厚度可调,因此可使APD芯片具备柔性,扩宽其应用场景。
附图说明
图1是实施例1所得柔性二极管芯片的结构示意图。
图2是实施例1所得柔性二极管芯片的平面示意图。
图号说明:
1、铜衬底;2、N面电极;3、N型InGaAs欧姆接触层;4、N型InP层;5、N型InGaAs层;6、I型InGaAsP层;7、I型InP层;8、I型InGaAs欧姆接触环;9、SiNx增透膜;10、P面电极。
具体实施方式
以下是本发明的具体实施例,并结合实施例对本发明的技术方案作进一步的描述,但本发明并不限于这些实施例。
实施例1
本实施例制备一种柔性二极管芯片,具体步骤如下:
S1.在N型InP衬底表面设置缓冲层;
S2.在缓冲层表面依次设置N型InGaAs欧姆接触层3、N型InP层4、N型InGaAs层5、I型InGaAsP层6、I型InP层7与I型InGaAs欧姆接触层;
S3.在I型InGaAs欧姆接触层表面,以等离子体增强化学气相沉积法沉积全覆盖的SiO2掩膜层;
S4.采用光刻保护,与HF水溶液腐蚀相结合的方法,腐蚀步骤S3所得全覆盖的SiO2掩膜层,留下环状的SiO2掩膜区;
S5.以H3PO4和H2O2的混合水溶液为腐蚀液,腐蚀环状SiO2掩膜区之外的I型InGaAs欧姆接触层,形成与掩膜区尺寸一致的I型InGaAs欧姆接触环8,I型InGaAs欧姆接触环将I型InP层7分为圆心区和圆外区;
S6.在步骤S5所得部件,I型InGaAs欧姆接触环8所在一侧表面沉积全覆盖的SiO2绝缘层;
S7.采用光刻保护,与HF水溶液腐蚀相结合的方法,腐蚀I型InGaAs欧姆接触环8及圆心区的SiO2绝缘层,形成扩散孔;
S8.将步骤S7所得部件,放入MOCVD中,同时通入DMZn与PH3,对扩散孔所在区域进行Zn扩散掺杂;
S9.在550℃下,对步骤S8所得部件进行退火1min;
S10.在步骤S9所得部件,I型InGaAs欧姆接触环8所在一侧表面,以等离子体增强化学气相沉积法,沉积一层SiNx增透膜9;
S11.光刻保护I型InGaAs欧姆接触环8和圆心区所在的区域,采用感应耦合等离子体刻蚀与HF水溶液湿法腐蚀相结合的方法,腐蚀SiNx增透膜9的其余位置;
S12.在I型InGaAs欧姆接触环8,远离I型InP层7的一侧表面,以磁控溅射的方法,设置P面电极10,其中P面电极10包括依次设置的厚为200nm的Ti层和5000nm的Au层;
S13.在P面电极表面依次贴附双面热解胶膜和硅片,形成临时支撑衬底;
S14.使用HCl水溶液对N型InP衬底与缓冲层进行腐蚀,裸露出N型InGaAs欧姆接触层3;
S15.在N型InGaAs欧姆接触层3表面,以电子束蒸镀法,设置N面电极2,其中N面电极2包括依次在N型InGaAs欧姆接触层3表面依次叠加的厚为10000nm的铜层、厚为5000nm的金层、厚为200nm的锗层和厚为100nm厚的镍层。
S16.以CuSO4和H2SO4的混合水溶液为电镀液,在N面电极表面,电镀一层厚度为30um的铜衬底1,其中电镀液中CuSO4的质量浓度为700g/L,浓硫酸(质量分数为98%)与水的体积比为3:20;
S17.将步骤S16所得部件加热至180℃,保持5min,热解胶膜失效,进而除去硅片,即得柔性二极管芯片。
本实施例所得柔性二极管芯片的结构示意图如图1所示。
本实施例所得柔性二极管芯片的平面示意图如图2所示。
上面结合实施例对本发明作了详细说明,但是本发明不限于上述实施例,在所属技术领域普通技术人员所具备的知识范围内,还可以在不脱离本发明宗旨的前提下作出各种变化。

Claims (9)

1.一种柔性二极管芯片,其特征在于,由以下结构依次叠加而成
铜衬底;
N面电极;
N型InGaAs欧姆接触层;
N型InP层;
N型InGaAs层;
I型InGaAsP层;
I型InP层;
I型InGaAs欧姆接触环,所述I型InGaAs欧姆接触环将所述I型InP层表面分为圆心区和圆外区,所述I型InGaAs欧姆接触环的内壁以及所述圆心区,设置有SiNx增透膜;
P面电极,所述P面电极为环状,直径与所述I型InGaAs欧姆接触环的直径相同;
所述柔性二极管芯片,制备方法包括以下步骤:
S1.在N型InP衬底表面设置缓冲层,在所述缓冲层表面依次设置所述N型InGaAs欧姆接触层、所述N型InP层、所述N型InGaAs层、所述I型InGaAsP层、所述I型InP层与I型InGaAs欧姆接触层;
S2.蚀穿所述I型InGaAs欧姆接触层,形成所述I型InGaAs欧姆接触环;
S3.对所述I型InGaAs欧姆接触环及所述圆心区进行锌掺杂后,退火;
S4.在所述I型InGaAs欧姆接触环的内壁以及所述圆心区设置所述SiNx增透膜;
S5.在所述I型InGaAs欧姆接触环,远离所述I型InP层的一侧表面,设置所述P面电极,在所述P面电极的表面贴附临时支撑衬底;
S6.腐蚀所述N型InP衬底和缓冲层,露出所述N型InGaAs欧姆接触层,在所述N型InGaAs欧姆接触层表面设置所述N面电极,在所述N面电极表面镀覆所述铜衬底;
S7.除去所述临时支撑衬底,即得所述柔性二极管芯片。
2.根据权利要求1所述的柔性二极管芯片,其特征在于,所述铜衬底,厚度为30
Figure DEST_PATH_IMAGE002
~50
Figure 651348DEST_PATH_IMAGE002
3.根据权利要求2所述的柔性二极管芯片,其特征在于,所述铜衬底,厚度为35
Figure 99647DEST_PATH_IMAGE002
~45
Figure 800756DEST_PATH_IMAGE002
4.根据权利要求1所述的柔性二极管芯片,其特征在于,所述N面电极,为在所述N型InGaAs欧姆接触层表面依次叠加的镍层、锗层、金层、铜层。
5.根据权利要求1所述的柔性二极管芯片,其特征在于,所述I型InGaAs欧姆接触环,及所述圆心区,进行了锌掺杂。
6.根据权利要求1所述的柔性二极管芯片,其特征在于,所述P面电极,为在所述I型InGaAs欧姆接触环表面依次叠加的钛层和金层。
7.根据权利要求1所述的柔性二极管芯片,其特征在于,步骤S2中,所述I型InGaAs欧姆接触环,设置方法为:先在所述I型InGaAs欧姆接触层表面设置环状掩膜区,再对所述环状掩膜区之外的I型InGaAs欧姆接触层进行腐蚀。
8.根据权利要求1所述的柔性二极管芯片,其特征在于,步骤S3中,所述退火,温度为520℃~580℃,时间为1min~5min。
9.根据权利要求1所述的柔性二极管芯片,其特征在于,步骤S6中,所述镀覆,方法为电镀。
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