CN112236839A - 具保护性涂层的处理腔室的处理配件 - Google Patents
具保护性涂层的处理腔室的处理配件 Download PDFInfo
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Abstract
在此描述的实施方式一般涉及一种用于制造用于等离子体处理腔室的腔室部件的方法和设备。在一个实施方式中,提供在等离子体处理腔室内使用的腔室部件,腔室部件包括:金属基底材料,金属基底材料包含粗糙的非平面第一表面,其中粗糙的非平面表面具有在4微英寸和80微英寸之间的Ra表面粗糙度;平面二氧化硅涂层,形成在粗糙的非平面表面之上,其中平面二氧化硅涂层具有:表面,具有Ra表面粗糙度小于粗糙的非平面表面的Ra表面粗糙度;厚度,在约0.2微米和约10微米之间;以容积计的小于1%的孔隙率,并且含有少于2E12原子/厘米2的铝。
Description
技术领域
本公开内容一般涉及一种用于等离子体处理腔室设备的工具和部件。更具体地,本公开内容涉及一种用于制造抗腐蚀性等离子体环境的等离子体处理腔室部件的方法。
背景技术
半导体处理涉及许多不同的化学和物理处理,由此在基板上产生微小的集成电路。建构集成电路的材料层通过化学气相沉积、物理气相沉积、外延生长及类似者而产生。使用光刻胶掩模和湿式或干式蚀刻技术来图案化一些材料层。用以形成集成电路的基板可为硅、砷化镓、磷化铟、玻璃或其他合适的材料。
典型的半导体处理腔室包括限定处理区域的腔室主体、适以将气体从气体供应器供应到处理区域中的气体分配组件、用以激发处理气体以处理位于基板支撑组件上的基板的气体激发器(如,等离子体产生器)和气体排放件。在等离子体处理期间,被激发的气体通常由离子和高反应性物种组成,其蚀刻和侵蚀处理腔室部件的暴露部分,例如,在处理期间保持基板的静电夹盘。另外,处理副产物通常沉积在腔室部件上,腔室部件通常用高反应性氟定期清洁。用以从腔室主体内移除处理副产物的原位清洁程序可能进一步侵蚀处理腔室部件的完整性。在处理和清洁期间来自反应性物种的攻击会缩短腔室部件的使用寿命并增加维修频率。另外,来自腔室部件的侵蚀部分的薄片可能在基板处理期间成为微粒污染源。此外,来自腔室部件的基底材料的微量金属可能从腔室部件中滤出并污染基板。因此,腔室部件通常在多个处理循环之后且在腔室部件在基板处理期间提供不一致或不期望的性质之前被更换。然而,频繁更换腔室部件会缩短处理腔室的使用寿命、增加腔室停机时间、增加维护频率并降低基板产量。
因此,存在有一种用于形成对等离子体处理腔室环境更具抵抗性的腔室部件的改善方法的需求。
发明内容
在此描述的实施方式一般涉及一种用于制造用于等离子体处理腔室的腔室部件的方法和设备。在一个实施方式中,提供在等离子体处理腔室内使用的腔室部件,腔室部件包括:金属基底材料,金属基底材料包含粗糙的非平面第一表面,其中粗糙的非平面表面具有在4微英寸和80微英寸之间的Ra表面粗糙度;平面二氧化硅涂层,形成在粗糙的非平面表面之上,其中平面二氧化硅涂层具有:表面,具有Ra表面粗糙度小于粗糙的非平面表面的Ra表面粗糙度;厚度,在约0.2微米和约10微米之间;以容积计的小于1%的孔隙率,并且含有少于2E12原子/厘米2的铝。
附图说明
因此,可详细地理解本公开内容的上述特征的方式,可通过参考实施方式获得上面简要概述的本公开内容的更具体的描述,其中一些实施方式显示在附随的附图中。然而,应注意附随的附图仅显示了本公开内容的典型实施方式,且因此不应认为是对其范围的限制,因为本公开内容可允许其他同等有效的实施方式。
图1A显示了可在处理腔室内使用的等离子体处理腔室部件的一个实施方式的截面图。
图1B是图1A的等离子体处理腔室部件的放大视图。
图2示意性地显示了等离子体处理系统。
图3是显示如于此所述的腔室部件上的抗等离子体涂层的测试的数据表。
为促进理解,在可能的情况下,使用相同的附图标记来表示共享于附图的相同元件。可预期的是一个实施方式的元件和特征可有利地并入其他实施方式中而无需进一步叙述。
具体实施方式
图1A显示了可在处理腔室内使用的等离子体处理腔室部件100的一个实施方式的截面图。图1B是图1A的等离子体处理腔室部件100的放大视图。尽管腔室部件100在图1A中显示为具有矩形横截面,但是出于论述的目的,应理解腔室部件100可采取任何腔室部件的形式,包括(但不限于)腔室主体、腔室主体上衬垫、腔室主体下衬垫、腔室主体等离子体门、阴极衬垫、腔室盖气体环、节流闸阀芯、等离子体屏、基座、基板支撑组件、喷头、气体喷嘴及类似者。
腔室部件100具有至少一个暴露表面114,暴露表面114在使用时暴露于处理腔室内的等离子体环境。腔室部件100包括主体102,主体102具有设置在主体102的非平面(粗糙)表面106的外表面112上的抗等离子体涂层104。抗等离子体涂层104填充非平面表面106的凹坑和低凹处(如,使非平面表面106平面化),以产生比非平面表面106更光滑的表面。
腔室部件100的主体102是金属材料,诸如铝、不锈钢及其合金,或陶瓷材料。抗等离子体涂层104是完全结晶的二氧化硅材料(如,二氧化硅(SiO2))材料。抗等离子体涂层104的厚度116为约0.2微米(μm)至约10μm或更大。抗等离子体涂层104具有以容积计的小于约1%的孔隙率。外表面112经加工到约4微英寸(μ”)至约80μ”的平均表面粗糙度(Ra)。然而,抗等离子体涂层104的Ra小于外表面112的Ra。
使用诸如用二氧化硅材料涂覆、涂抹或喷涂外表面112的技术来施加抗等离子体涂层104。接着,通过将涂布的腔室部件100放置在炉中来使抗等离子体涂层104进行退火。加热减轻了抗等离子体涂层104中的表面张力,这使得抗等离子体涂层104保形或平坦及光滑。加热可在约200摄氏度或更低的温度下进行。加热可进行约一小时。
图2示意性地显示了等离子体处理系统200。等离子体处理系统200包括限定处理空间241的腔室主体225。腔室主体225包括可密封的狭缝阀通道224,以允许基板201的进入和离开处理空间241。腔室主体225包括侧壁226和盖243。侧壁226和盖243可由金属或陶瓷材料制成,并包括如于此所述的抗等离子体涂层104。等离子体处理系统200进一步包含设置在腔室主体225的盖243之上的天线组件270。射频(RF)功率源215和匹配网络217耦接到天线组件270,以提供用于等离子体产生的能量。
天线组件270包含与等离子体处理系统200的对称轴273(如,纵轴)同轴设置的一个或多个线圈天线。如图2所示,等离子体处理系统200包括设置在盖243之上的外线圈天线271和内线圈天线272。在一个实施方式中,线圈天线271、272可独立地控制。应注意即使在等离子体处理系统200中描述了两个同轴天线,也可设想其他配置,诸如一个线圈天线、三个或更多个线圈天线配置。
内线圈天线272包括一个或多个电导体,其以小间距缠绕成螺旋形并形成内天线空间274。当电流流过一个或多个电导体时,磁场建立在内线圈天线272的内天线空间274中。如下所论述的,本公开内容的实施方式在内线圈天线272的内天线空间274内提供腔室延伸空间,以使用内天线空间274中的磁场产生等离子体。
应注意内线圈天线272和外线圈天线271可根据应用具有其他形状,例如用以与腔室壁的某一形状相匹配,或用以在腔室主体225内实现对称或不对称。在一个实施方式中,内线圈天线272和外线圈天线271可形成超矩形形状中的内天线空间。
等离子体处理系统200进一步包括设置在处理空间241中的基板支撑件240。基板支撑件240在处理期间支撑基板201。在一个实施方式中,基板支撑件240是静电夹盘。偏压功率源220和匹配网络221可连接到基板支撑件240。偏压功率源220向处理空间241中产生的等离子体提供偏压电位。
在所示的实施方式中,基板支撑件240由环形阴极衬垫256围绕。等离子体容纳屏或挡板252覆盖阴极衬垫256的顶部并覆盖基板支撑件240的外周边部分。基板支撑件240可能含有与腐蚀性等离子体处理环境不兼容或易受攻击的材料,且阴极衬垫256和挡板252分别将基板支撑件240与等离子体隔离并在处理空间241内容纳等离子体。在一个实施方式中,阴极衬垫256和挡板252可包括高纯度的抗等离子体涂层104,抗等离子体涂层104对处理空间241内容纳的等离子体具有抵抗力。如上所述的阴极衬垫256和挡板252上的抗等离子体涂层104改善了阴极衬垫256和挡板252的使用寿命。
等离子体屏250设置在基板支撑件240的顶部上,以控制等离子体的带电和中性物种在基板201的表面上的空间分布。在一个实施方式中,等离子体屏250包括与腔室壁电隔离的基本上平坦的构件并包含垂直延伸穿过平坦的构件的多个孔。等离子体屏250可包括如上所述的高纯度抗等离子体涂层104,抗等离子体涂层104抵抗处理空间241内的处理环境。
盖243具有开口244,以允许一种或多种处理气体进入。在一个实施方式中,开口244可设置在等离子体处理系统200的中心轴附近,中心轴对应于正在处理的基板201的中心。
等离子体处理系统200包括设置在盖243之上的腔室延伸部251,盖243覆盖开口244。在一个实施方式中,腔室延伸部251设置在天线组件270的线圈天线内侧。腔室延伸部251限定经由开口244与处理空间241流体连通的延伸空间242。
等离子体处理系统200包括气体分配喷头,气体分配喷头显示为与处理空间241中的开口244和延伸空间242相邻设置的挡板喷嘴组件255。挡板喷嘴组件255通过延伸空间242将一种或多种处理气体引导到处理空间241中。在一个实施方式中,挡板喷嘴组件255具有旁通路径,允许处理气体进入处理空间241而不经过延伸空间242。挡板喷嘴组件255由铝制成并包括如上所述的抗等离子体涂层104。
因为延伸空间242在内天线空间274内,所以在进入处理空间241之前,延伸空间242中的处理气体暴露于内线圈天线272的磁场。延伸空间242的使用在不增加施加到内线圈天线272或外线圈天线271的功率的情况下,增加了处理空间241内的等离子体强度。
等离子体处理系统200包括泵230和节流阀235,以提供真空并排出处理空间241。节流阀235可包括闸阀芯254。闸阀芯254可由铝制成。等离子体处理系统200进一步包括冷却器245,以控制等离子体处理系统200的温度。节流阀235可设置在泵230和腔室主体225之间,并且可操作以控制腔室主体225内的压力。
等离子体处理系统200还包括气体输送系统202,以向处理空间241提供一种或多种处理气体。气体输送系统202位于壳体205中,壳体205直接邻近腔室主体225(诸如在腔室主体225下方)设置。气体输送系统202选择性地将位于一个或多个气体面板204中的一个或多个气体源耦接到挡板喷嘴组件255,以向腔室主体225提供处理气体。气体输送系统202连接到挡板喷嘴组件255,以向处理空间241提供气体。壳体205位于腔室主体225附近,以在更换气体时减少气体转换时间,最小化气体使用并最小化气体浪费。
等离子体处理系统200进一步包括举升系统227,用于升高和降低基板支撑件240,基板支撑件240支撑腔室主体225中的基板201。
在所示的实施方式中,腔室主体225由下衬垫222和上衬垫223保护,下衬垫222和上衬垫223可为铝并包括如上所述的抗等离子体涂层104。
气体输送系统202可用于以瞬时速率向腔室主体225供应至少两种不同的气体混合物,如下面进一步描述的。在任选的实施方式中,等离子体处理系统200可包括光谱监视器,光谱监视器可操作以在当腔室主体225中形成沟槽时,测量蚀刻沟槽的深度和沉积的膜厚度,并具有使用其他光谱特征,以确定反应器的状态的能力。等离子体处理系统200可适应各种基板尺寸,例如基板直径高达约300mm或更大。
可使用如上所述的抗等离子体涂层104来制造上述处理系统200中的各种腔室部件。这些腔室部件经常暴露于等离子体处理环境。例如,抗等离子体涂层104可施加到腔室主体225、腔室主体的上衬垫223、腔室主体的下衬垫222、腔室主体的等离子体门224、阴极衬垫256、腔室盖的气体环、节流闸阀芯254、等离子体屏250、挡板喷嘴组件255、挡板252及基座或基板支撑件240。
图3是数据表300,显示了对腔室部件100上的抗等离子体涂层104的测试。抗等离子体涂层104的测试显示在抗等离子体涂层104中或上的低水平的微量金属。这证明抗等离子体涂层104有效地阻挡来自腔室部件100的主体102的金属原子滤出到涂层104中。例如,抗等离子体涂层104中的铝浓度小于约2E12原子/平方厘米(原子/cm2)。许多其他微量金属存在于抗等离子体涂层104中或上,但是低于临界水平。
所公开的处理腔室及其部件可用于一个或多个基板处理操作中。以下描述提供了一个这样的示例性处理,但是可预期其他处理。
在一个实例中,诸如腔室主体225的处理腔室用H2等离子体处理,而基板不放置在其中。在将基板引入腔室之前,对腔室主体225进行等离子体处理可称为等离子体每晶片(Plasma Every Wafer,PEW)。处理腔室的等离子体处理或PEW可包括将一种或多种气体(诸如O2、N2、NH3、Ar、H2、He或其组合)引入腔室主体225中,并且激发一种或多种气体以形成等离子体。替代地,PEW可包括将含有氧、氮、氢、氨、氢氧化物或其组合的自由基和/或离子的等离子体引入腔室主体225中,且等离子体形成在腔室主体225外侧的远程等离子体源中。
在一个实施方式中,将NH3和Ar气体引入腔室主体225中。在另一个实施方式中,将O2和H2气体引入腔室主体225中。在另一个实施方式中,将O2和Ar气体引入腔室主体225中。在另一个实施方式中,将O2气体引入腔室主体225。在又一个实施方式中,将N2气体引入腔室主体225。通常在引入基板之前对腔室主体225进行等离子体处理的步骤涉及在处理腔室中引入或形成含有氧气或氮气的等离子体。
在一些实施方式中,一种或多种气体由RF功率源激发。RF功率可以2%至70%的占空比脉冲,并且可在约100W至约2500W的范围内。RF功率可为范围从约100W至约2500W的连续波。腔室主体225在腔室主体225的等离子体处理期间可具有范围从约10毫托(mT)到约200毫托的腔室压力。处理温度(可为基板支撑基座(诸如基板支撑件240)的温度)可具有从20摄氏度到约500摄氏度的范围。
此后,基板(任选地在其上具有闸极堆叠)由腔室主体225内的含氢等离子体处理。基板的含氢等离子体处理可包括将含氢气体(诸如H2气体),或含氢气体和惰性气体(诸如Ar气体)引入进腔室主体225中,并激发H2气体或H2/Ar气体,以形成含氢等离子体。可将Ar气体添加到H2气体中,以便改善腔室主体225的使用寿命(进一步减轻腔室主体225内侧的部件的含氢等离子体侵蚀)并调节H*自由基浓度。在一些实施方式中,H2气体或H2/Ar气体由RF功率源(诸如RF功率源215)激发。RF功率可以2%至60%的占空比脉冲,并且可具有从约100W至约2500W的范围。RF功率可为范围从约100W到约2500W的连续波。在基板的含氢等离子体处理期间,腔室主体225可具有范围从约10mT到约200mT的腔室压力。处理温度(可为基板支撑件的温度)可具有从20℃至约500℃的范围。可用含氢等离子体处理基板约10至360秒。在一个实施方式中,腔室压力为约100mT,H2气体以约25标准立方厘米/分钟(sccm)流入腔室主体225中,且Ar气体以约975sccm流入腔室主体225中,RF功率为约500W,处理温度为约400℃,用含氢等离子体处理基板约30至90秒。在用含氢等离子体处理基板之后,可从腔室主体225移除基板。
应预期可在腔室主体225内执行其他和进一步的处理。此外,应预期涂布的腔室部件可与其他和另外的处理一起使用。
通过以上的实例和解释,描述了本公开内容的实施方式的特征和精神。本领域技术人员将容易地观察到可进行许多修改和变更。因此,上述公开内容应被解释为仅受附随的权利要求书的界线的限制。
Claims (15)
1.一种用于等离子体处理腔室内的腔室部件,包含:
金属基底材料,包含粗糙的非平面表面,其中所述粗糙的非平面表面具有在4微英寸和80微英寸之间的平均表面粗糙度(Ra);和
平面二氧化硅涂层,形成在所述粗糙的非平面表面之上,其中所述平面二氧化硅涂层具有:
表面,具有一Ra小于所述粗糙的非平面表面的所述Ra;
厚度,在约0.2微米和约10微米之间;
以容积计的小于1%的孔隙率,并且
含有少于2E12原子/厘米2的铝。
2.如权利要求1所述的腔室部件,其中所述金属基底材料包含铝。
3.如权利要求1所述的腔室部件,其中所述金属基底材料包含气体分配喷头。
4.如权利要求1所述的腔室部件,其中所述金属基底材料包含喷嘴组件。
5.如权利要求1所述的腔室部件,其中所述金属基底材料包含挡板。
6.如权利要求1所述的腔室部件,其中所述金属基底材料包含衬垫。
7.如权利要求6所述的腔室部件,其中所述衬垫包含阴极衬垫。
8.一种用于制造用于等离子体处理环境的腔室部件的方法,包含以下步骤:
从金属材料形成所述腔室部件的主体;
在所述主体上沉积二氧化硅层;和
加热所述二氧化硅层和所述金属材料,其中所述二氧化硅层包括:
表面,具有Ra表面粗糙度小于所述粗糙的非平面表面的所述Ra表面粗糙度;
厚度,在约0.2微米和约10微米之间;
以容积计的小于1%的孔隙率,并且
含有少于2E12原子/厘米2的铝。
9.如权利要求8所述的方法,其中所述金属基底材料包含铝。
10.如权利要求8所述的方法,其中所述金属基底材料包含气体分配喷头。
11.如权利要求8所述的方法,其中所述金属基底材料包含喷嘴组件。
12.如权利要求8所述的方法,其中所述金属基底材料包含挡板。
13.如权利要求8所述的方法,其中所述金属基底材料包含衬垫。
14.如权利要求13所述的方法,其中所述衬垫包含阴极衬垫。
15.一种方法,包含以下步骤:
用含有氮或氧的等离子体对处理腔室进行等离子体处理,所述处理腔室包括所述腔室部件,所述腔室部件包含:
金属基底材料,包含粗糙的非平面表面,其中所述粗糙的非平面表面具有在4微英寸和80微英寸之间的平均表面粗糙度(Ra);
平面二氧化硅涂层,形成在所述粗糙的非平面表面之上,其中所述平面二氧化硅涂层具有:表面,具有一Ra小于所述粗糙的非平面表面的所述Ra;厚度,在约0.2微米和约10微米之间;以容积计的小于1%的孔隙率,并且含有少于2E12原子/厘米2的铝;
将基板放入所述处理腔室中,其中堆叠设置在所述基板上;和
等离子体处理设置在所述基板上的所述堆叠。
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- 2019-05-21 JP JP2020568515A patent/JP7405776B2/ja active Active
- 2019-05-21 US US16/418,274 patent/US20190385825A1/en active Pending
- 2019-05-21 WO PCT/US2019/033259 patent/WO2019240915A1/en active Application Filing
- 2019-05-21 CN CN201980037849.7A patent/CN112236839A/zh active Pending
- 2019-05-21 KR KR1020217001257A patent/KR20210008931A/ko unknown
- 2019-06-12 TW TW108120249A patent/TWI828704B/zh active
- 2019-06-12 TW TW112148937A patent/TW202418348A/zh unknown
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2023
- 2023-04-05 US US18/131,306 patent/US20230245863A1/en active Pending
- 2023-12-14 JP JP2023210900A patent/JP2024037895A/ja active Pending
Patent Citations (6)
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US6251216B1 (en) * | 1997-12-17 | 2001-06-26 | Matsushita Electronics Corporation | Apparatus and method for plasma processing |
US20040238487A1 (en) * | 2003-05-30 | 2004-12-02 | Kiehlbauch Mark W. | Methods of finishing quartz glass surfaces and components made by the methods |
US20090194233A1 (en) * | 2005-06-23 | 2009-08-06 | Tokyo Electron Limited | Component for semicondutor processing apparatus and manufacturing method thereof |
US20090218042A1 (en) * | 2006-03-03 | 2009-09-03 | Quantum Global Technologies, Llc. | Methods For Producing Quartz Parts With Low Defect And Impurity Densities For Use In Semiconductor Processing |
US20080063798A1 (en) * | 2006-08-30 | 2008-03-13 | Kher Shreyas S | Precursors and hardware for cvd and ald |
US20100119843A1 (en) * | 2008-11-10 | 2010-05-13 | Applied Materials, Inc. | Plasma resistant coatings for plasma chamber components |
Also Published As
Publication number | Publication date |
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JP7405776B2 (ja) | 2023-12-26 |
TW202013426A (zh) | 2020-04-01 |
US20230245863A1 (en) | 2023-08-03 |
WO2019240915A1 (en) | 2019-12-19 |
JP2024037895A (ja) | 2024-03-19 |
US20190385825A1 (en) | 2019-12-19 |
KR20210008931A (ko) | 2021-01-25 |
TWI828704B (zh) | 2024-01-11 |
TW202418348A (zh) | 2024-05-01 |
JP2021527328A (ja) | 2021-10-11 |
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