CN112230114A - Apparatus and method for testing semiconductor device - Google Patents

Apparatus and method for testing semiconductor device Download PDF

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Publication number
CN112230114A
CN112230114A CN202010598648.9A CN202010598648A CN112230114A CN 112230114 A CN112230114 A CN 112230114A CN 202010598648 A CN202010598648 A CN 202010598648A CN 112230114 A CN112230114 A CN 112230114A
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CN
China
Prior art keywords
probe card
chuck
semiconductor device
wafer
test chamber
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010598648.9A
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Chinese (zh)
Inventor
金勇九
崔时龙
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Semes Co Ltd
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Semes Co Ltd
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Publication of CN112230114A publication Critical patent/CN112230114A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0425Test clips, e.g. for IC's
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07314Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/14Braking arrangements; Damping arrangements
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/18Screening arrangements against electric or magnetic fields, e.g. against earth's field
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/286External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2865Holding devices, e.g. chucks; Handlers or transport devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F7/00Magnets
    • H01F7/06Electromagnets; Actuators including electromagnets
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/14Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Engineering & Computer Science (AREA)
  • Electromagnetism (AREA)
  • Environmental & Geological Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

An apparatus for testing a semiconductor device is disclosed, the apparatus including a test chamber; a socket disposed at an upper portion of the test chamber and configured to hold a probe card that transmits an electrical signal to a semiconductor device formed on a wafer; a chuck positioned in the test chamber, the chuck configured to support the wafer within the test chamber and facing the cassette; a chuck driving unit configured to drive the chuck to contact the semiconductor device with the probe card; and a magnetic force generating unit configured to generate an electromagnetic force between the cassette and the chuck to increase a load applied between the probe card and the wafer. Therefore, the probe card and the wafer can be firmly connected to each other.

Description

Apparatus and method for testing semiconductor device
Technical Field
The present disclosure relates to an apparatus for testing a semiconductor device and a method of testing a semiconductor device. More particularly, the present disclosure relates to an apparatus for testing a semiconductor device by applying an electrical signal to the semiconductor device using a probe card and a method of testing the semiconductor device.
Background
In general, semiconductor devices such as integrated circuit devices can be manufactured by repeatedly performing a series of semiconductor manufacturing processes on a semiconductor wafer. For example, a semiconductor device can be manufactured by repeatedly performing the following processes on a wafer: a deposition process for forming a thin film on a wafer, an etching process for converting the thin film into a pattern having electrical characteristics, an ion implantation process or a diffusion process for implanting or diffusing impurities into the pattern, a cleaning process and a rinsing process for removing residues from the wafer having the pattern.
After a semiconductor device is manufactured through a series of semiconductor manufacturing processes, a test process for testing electrical characteristics of the semiconductor device may be performed. The probe station may perform a test process by using both a probe card, into which a probe card having a plurality of needles is to be loaded, and a tester connected to the probe card to provide electrical signals to the semiconductor device.
For the test process, a probe card may be disposed at a top portion of the test chamber, and a wafer may be disposed on the chuck opposite the probe card below the probe card. The chuck driving unit may drive a chuck configured to support a wafer to align the wafer with the probe card. In this way, the semiconductor devices formed on the wafer and the pins formed on the probe card are connected to each other, so that the tester can provide electrical signals to the semiconductor devices through the probe card to check electrical properties of the semiconductor devices.
On the other hand, as the number of needles formed on the probe card increases, it may be necessary to increase the rigidity and capacity of the chuck driving unit. Recently, there is a tendency to increase the size of a motor, an LM guide, a ball screw, and the like included in the chuck driving unit.
In particular, as the total load required to be applied to the needles increases to 1,000kg or more, the size of the chuck drive unit increases, thereby increasing the size of the entire probe station.
Disclosure of Invention
Embodiments of the present invention provide an apparatus for testing a semiconductor device, which can cope with an increase in load required for a wafer to firmly contact a probe card.
Embodiments of the present invention provide a method for testing a semiconductor device that can cope with an increase in load required for a wafer to firmly contact a probe card.
According to an exemplary embodiment of the present invention, an apparatus for testing a semiconductor device is disclosed, the apparatus including a test chamber; a socket disposed at an upper portion of the test chamber and configured to hold a probe card that transmits an electrical signal to a semiconductor device formed on a wafer; a chuck positioned in the test chamber, the chuck configured to support the wafer within the test chamber and facing the cassette; a chuck driving unit configured to drive the chuck to contact the semiconductor device with the probe card; and a magnetic force generating unit configured to generate an electromagnetic force between the cassette and the chuck to increase a load applied between the probe card and the wafer.
In one exemplary embodiment, the magnetic force generating unit may include an electromagnet member disposed to surround an outer circumference of the chuck, the electromagnet member generating a magnetic field using electricity.
Here, the magnetic force generating unit may further include a magnetic member disposed adjacent to the socket to face the electromagnet member, and the magnetic member is disposed to increase an electromagnetic field.
Also, the magnetic force generating unit may further include a power supply for supplying power to the electromagnet member, and a power supply controller for adjusting the magnitude of the power.
In one exemplary embodiment, a buffer member may be further disposed between the magnetic force generating unit and the card holder, and the buffer member is configured to alleviate an impact occurring between the needle of the probe card and the pad of the semiconductor device.
In one exemplary embodiment, the buffer member may include at least one of a damper, a spring, and an elastic plate.
Here, the buffer member may be provided on the magnetic force generating unit.
In one exemplary embodiment, the test chamber may include a receiving groove formed on an upper wall thereof for receiving a probe card.
In one exemplary embodiment, the electromagnetic wave shielding member may be further disposed adjacent to the receiving groove.
Here, the electromagnetic wave shielding member may be disposed along an inner sidewall of the receiving groove.
Also, the electromagnetic wave shielding member may include a metal thin film.
According to an exemplary embodiment of the present invention, a method for testing a semiconductor device is disclosed, the method comprising: mounting a probe card configured to transmit an electrical signal to a semiconductor device formed on a wafer in a socket; mounting a wafer on a chuck arranged to face a cassette; the chuck is driven to first bring the semiconductor device into contact with the probe card and to increase a load applied between the probe card and the wafer using an electromagnetic force.
In one exemplary embodiment, driving the chuck further may include aligning the semiconductor device with a probe card.
In one exemplary embodiment, increasing the load between the probe card and the wafer may include adjusting a value of power applied to an electromagnet member disposed adjacent to the chuck.
Also, increasing the load between the probe card and the wafer may further include using a magnetic member disposed adjacent to the cassette to face the electromagnet member.
In one exemplary embodiment, increasing the load between the probe card and the wafer may include mitigating impacts occurring between needles of the probe card and pads of the semiconductor device.
In one exemplary embodiment, mounting the probe card in the card holder may include positioning the probe card in a receiving groove formed on an upper wall of the test chamber.
In one exemplary embodiment, the electrical signal may be applied from the tester to the semiconductor device through the probe card.
Here, applying the electrical signal to the semiconductor device may include shielding the electromagnetic wave from the tester.
According to an exemplary embodiment of the present invention, an apparatus for testing a semiconductor device is disclosed, the apparatus including a test chamber; a card holder disposed at an upper portion of the test chamber and configured to hold a probe card, the probe card transmitting an electrical signal to a semiconductor device formed on a wafer; a chuck positioned in the test chamber, the chuck configured to support the wafer within the test chamber and facing the cassette; a chuck driving unit configured to drive the chuck to contact the semiconductor device with the probe card; and a magnetic force generating unit configured to generate an electromagnetic force between the cassette and the chuck to increase a load applied between the probe card and the wafer, wherein the magnetic force generating unit includes an electromagnet member disposed to surround an outer circumference of the chuck, the electromagnet member generating a magnetic field using electric power, and a magnetic member disposed adjacent to the cassette to face the electromagnet member, the magnetic member being disposed to increase the electromagnetic field.
According to the above-described exemplary embodiments of the present disclosure, the apparatus for testing a semiconductor device includes an electromagnetic force generating unit for generating an electromagnetic force applied between the socket and the chuck. Accordingly, when a required load between the probe card and the wafer increases as the number of needles formed in the probe card increases, the electromagnetic force generating unit may increase the load to cope with the required load. In addition, the electromagnetic force generating unit may partially shrink the vertical driving module by partially sharing a load amount of the vertical driving module.
The above summary of the present disclosure is not intended to describe each illustrated embodiment or every implementation of the present disclosure. More particularly, the following detailed description and claims exemplify these embodiments.
Drawings
The exemplary embodiments can be understood in more detail from the following description, taken in conjunction with the accompanying drawings. Wherein:
FIG. 1 is a cross-sectional view of an apparatus for testing semiconductor devices according to an embodiment of the present invention;
FIG. 2 is a cross-sectional view of the chuck and the chuck drive unit of FIG. 1;
FIG. 3 is a cross-sectional view of the cartridge of FIG. 1; and
fig. 4 is a flowchart of a method for testing a semiconductor device according to an exemplary embodiment of the present invention.
Detailed Description
While various embodiments may be susceptible to various modifications and alternative forms, specific details thereof have been shown by way of example in the drawings and will be described in detail. It should be understood, however, that the intention is not to limit the claimed invention to the particular embodiments described. On the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the inventive subject matter as defined by the appended claims.
Hereinafter, specific embodiments regarding a raceway unit and an OHT having the raceway unit will be described in detail with reference to the accompanying drawings. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like elements throughout. In the drawings, the size of layers and regions may be exaggerated for clarity of illustration.
Terms such as first, second, etc. may be used to describe various elements, but the elements described by the terms should not be limited. The above terms are only used to distinguish one element from another. For example, in the present invention, a first element may be similarly named as a second element, and a second element may be similarly named as a first element, without departing from the scope.
The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the inventive concepts. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the inventive concepts belong. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Fig. 1 is a cross-sectional view of an apparatus for testing a semiconductor device according to an embodiment of the present invention. Fig. 2 is a sectional view of the chuck and the chuck driving unit of fig. 1. Figure 3 is a cross-sectional view of the cartridge of figure 1.
Referring to fig. 1 to 3, an apparatus 100 for testing semiconductor devices according to an embodiment of the present invention may perform electrical characteristic inspection of semiconductor devices formed on a wafer 10 using a probe card 20.
The apparatus 100 includes a test chamber 105, a chuck 130, a chuck driving unit 120, a card socket 110, and an electromagnetic force generating unit 150.
The test chamber 105 may provide a processing space for performing electrical performance inspection of semiconductor devices formed on the wafer 10.
The chuck 130 is disposed in the process space. The chuck 130 may support the wafer 10. The chuck 130 may fix the wafer 10 on its upper surface by using an electrostatic force or a vacuum force.
The chuck driving unit 120 is disposed under the chuck 130. The chuck driving unit 120 drives the chuck 130 to move the wafer 10 so that the semiconductor device contacts the probe card 20 such that the pads of the semiconductor are in contact with the needles of the probe card 20.
More specifically, the chuck driving unit 120 includes a rotation module 121, a vertical driving module 123, a first horizontal driving module 124, and a second horizontal driving module 125.
The rotation module 121 rotates the chuck 130. Accordingly, the wafer 10 rotates to be aligned with the probe card 20 in the R direction.
The vertical driving module 123 adjusts the vertical position of the chuck 130. Accordingly, the wafer 10 positioned on the chuck 130 may be in contact with the probe card 20 or may be spaced apart from the probe card 20.
Meanwhile, the first and second horizontal driving modules 124 and 125 may move the chuck 130 in a first horizontal direction and a second horizontal direction perpendicular to the first horizontal direction. Accordingly, the first and second horizontal driving modules 124 and 125 adjust the horizontal position of the chuck 130.
The socket 110 is disposed at an upper portion of the test chamber 105. The socket 110 may be configured to hold a probe card 20. The card holder 110 may hold the probe card 20 by a clamping method or a snap-in method.
The electromagnetic force generating unit 150 generates an electromagnetic force between the card socket 110 and the chuck 130. Accordingly, a load applied between the probe card 20 held on the card holder 110 and the wafer 10 supported on the chuck 130 may be increased.
Accordingly, when the required load between the probe card 20 and the wafer 10 increases as the number of the needles 22 formed on the probe card 20 increases, the electromagnetic force generating unit 150 can cope with the increase of the required load.
On the other hand, the electromagnetic force generating unit 150 may share an increased required load with the vertical driving module 123 to miniaturize the size of the vertical driving module 123.
In one embodiment of the present invention, the magnetic force generating unit 150 is disposed to surround the outer circumference of the chuck 130. The magnetic force generating unit 150 may include an electromagnet member 151 capable of generating a magnetic field using electric power.
The electromagnet member 151 includes a magnet (not shown) and a coil (not shown) surrounding the magnet, through which current flows. In this case, the electromagnet member 151 may control the magnitude of the electromagnetic force by adjusting the magnitude of the current flowing through the coil. Accordingly, the overdrive value required for firm contact between the wafer 10 and the probe card 20 may be adjusted. Here, the overdrive value may correspond to a contact force by lifting the chuck 130 supporting the wafer 10 to a vertical position higher than a reference position, so the probe card 20 and the wafer 10 may be more firmly connected to secure an electrical connection to the semiconductor device.
Therefore, various overdrive values required for various types of semiconductor devices can be easily controlled.
In addition, the electromagnetic force between the wafer 10 and the probe card 20 can be easily turned on or off by on/off control of the current.
On the other hand, the electromagnet member 151 is provided on the outer circumference of the chuck 130, which is spaced apart from the tester 30 relatively long. Therefore, the electromagnetic waves generated by the electromagnet member 151 can be suppressed from interfering with the testing step of the tester 30.
In one embodiment of the present invention, the magnetic force generating unit 150 may further include a magnetic member 155. The magnetic member 155 is disposed adjacent to the socket 110 to face the electromagnet member 151. A magnetic member 155 is provided to further increase the electromagnetic field. Accordingly, the electromagnet member 151 and the magnetic member 155 may increase the electromagnetic force.
In an exemplary embodiment of the present invention, the magnetic force generating unit 150 may further include a power supply 153 and a power supply controller 154. The power supply 153 supplies power to a coil included in the electromagnet member 151. The power controller 154 adjusts the amount of power supplied by the power supply 153. Accordingly, since the magnitude of the current flowing through the electromagnet member 151 is controlled, the magnitude of the electromagnetic force generated by the electromagnet member 151 may be adjusted.
In one embodiment of the present invention, the device 100 may further include a cushioning member 170.
The buffering member 170 is disposed between the magnetic force generating unit 150 and the card socket 110. For example, the buffer member 170 may be interposed between the electromagnet member 151 and the magnetic member 155. Accordingly, when the probe card 20 and the wafer 10 are contacted under a high load by an electromagnetic force, an impact on the needles 22 included in the probe card 20 can be mitigated to prevent the probe card 20 from being damaged.
The buffering member 170 may include at least one of a damper, a spring, and an elastic plate, etc. Alternatively, the buffering member 170 may include other members to mitigate impact on the needles 22 included in the probe card 20 when the probe card 20 and the wafer 10 are in contact.
In an exemplary embodiment of the present invention, an upper wall of the test chamber 105 is provided with a receiving groove 105a for receiving the probe card 20. An electromagnetic wave shielding member 180 may be additionally disposed adjacent to the receiving groove 105 a.
Here, the electromagnetic wave shielding member 180 may be disposed along the inner wall of the receiving groove 105 a. That is, the electromagnetic wave shielding member 180 can suppress the electromagnetic wave generated when the magnetic force generating unit 150 is driven from propagating through the receiving groove 105a into the tester 30. Therefore, the electromagnetic wave shielding member 180 can prevent the tester 30 from making an error in the inspection process by blocking the electromagnetic wave generated by the magnetic force generating unit 150 when the inspection process is performed on the semiconductor device.
Here, the electromagnetic wave shielding member 180 may include a metal thin film. The electromagnetic wave shielding member 180 may be formed through a sputtering process and a spraying process.
Fig. 4 is a flowchart of a method for testing a semiconductor device according to an exemplary embodiment of the present invention.
Referring to fig. 1 and 4, a method for testing a semiconductor device according to an exemplary embodiment of the present invention is disclosed. The probe card 20 for transmitting an electrical signal to a semiconductor device formed on a wafer is mounted on the socket 110 (step S110). Meanwhile, the wafer is mounted on the chuck 130 facing the cassette (step S130).
After the wafer 10 is aligned with the probe card 20, the chuck 130 is driven to contact the semiconductor device 10 with the probe card 20 (step S150).
The load between the probe card 20 and the semiconductor device is increased by using the electromagnetic force (step S170). Therefore, the needles 22 formed on the probe card 20 can be more reliably connected to the pads of the semiconductor device.
Here, while the load between the probe card 20 and the wafer 10 is increased by the electromagnetic force, the power value applied to the electromagnet member 151 disposed adjacent to the chuck 130 may be adjusted. Accordingly, since the magnitude of the current flowing through the electromagnet member 151 is controlled, the magnitude of the electromagnetic force generated by the electromagnet member 151 can be adjusted.
Thereafter, a test signal is applied to the semiconductor device formed on the wafer 10 through the probe card 20. Here, the apparatus 100 for testing a semiconductor device may be connected to the tester 30 to check the electrical property of the semiconductor device 10. The tester 30 applies a test signal to the semiconductor devices formed on the wafer 10 through the probe card 20 to check electrical properties of the wafer 10 using signals output from the semiconductor devices.
Although the radio transmission device and the radio transmission method have been described with reference to the specific embodiments, they are not limited thereto. Accordingly, it will be readily understood by those skilled in the art that various modifications and changes may be made thereto without departing from the spirit and scope of the present invention as defined by the appended claims.

Claims (20)

1. An apparatus for testing a semiconductor device, the apparatus comprising:
a test chamber;
a socket disposed at an upper portion of the test chamber, the socket configured to hold a probe card that transmits an electrical signal to a semiconductor device formed on a wafer;
a chuck positioned in the test chamber, the chuck configured to support the wafer within the test chamber and facing the cassette;
a chuck driving unit configured to drive the chuck to contact the semiconductor device with the probe card; and
a magnetic force generating unit configured to generate an electromagnetic force between the cassette and the chuck to increase a load applied between the probe card and the wafer.
2. The apparatus of claim 1, wherein the magnetic force generating unit includes an electromagnet member disposed to surround an outer circumference of the chuck, the electromagnet member generating a magnetic field using electricity.
3. The device of claim 2, wherein the magnetic force generating unit further comprises a magnetic member disposed adjacent the cartridge to face the electromagnet member, and the magnetic member is disposed to increase the electromagnetic field.
4. The apparatus of claim 2, wherein the magnetic force generating unit further comprises a power supply for supplying power to the electromagnet member, and a power supply controller for adjusting a magnitude of the power.
5. The apparatus of claim 1, further comprising a buffer member disposed between the magnetic force generating unit and the socket, and configured to mitigate an impact occurring between a needle of the probe card and a pad of the semiconductor device.
6. The device of claim 1, wherein the cushioning member comprises at least one of a damper, a spring, and an elastic plate.
7. The apparatus of claim 5, wherein the buffering member is disposed on the magnetic force generating unit.
8. The apparatus of claim 1, wherein the test chamber includes a receiving slot formed on an upper wall thereof for receiving the probe card.
9. The apparatus of claim 1, further comprising an electromagnetic wave shielding member disposed adjacent to the receiving groove.
10. The apparatus as claimed in claim 9, wherein the electromagnetic wave shielding member is disposed along an inner sidewall of the receiving groove.
11. The apparatus of claim 9, wherein the electromagnetic wave shielding member comprises a metal thin film.
12. A method for testing a semiconductor device, the method comprising:
mounting a probe card configured to transmit an electrical signal to a semiconductor device formed on a wafer in a socket;
mounting a wafer on a chuck disposed to face the cassette;
driving the chuck to first contact the semiconductor device to the probe card; and
the load applied between the probe card and the wafer is increased using an electromagnetic force.
13. The method of claim 12, wherein actuating the chuck further comprises aligning the semiconductor device to the probe card.
14. The method of claim 12, wherein increasing the load between the probe card and the wafer comprises adjusting a value of power applied to an electromagnet member disposed adjacent the chuck.
15. The method of claim 14, wherein increasing the load between the probe card and the wafer further comprises utilizing a magnetic member disposed adjacent the cassette to face the electromagnet member.
16. The method of claim 12, wherein increasing the load between the probe card and the wafer comprises mitigating impacts occurring between needles of the probe card and pads of the semiconductor device.
17. The method of claim 12, wherein mounting the probe card in the socket comprises positioning the probe card in a receiving slot formed on an upper wall of a test chamber.
18. The method of claim 12, further comprising applying an electrical signal from a tester to the semiconductor device through the probe card.
19. The method of claim 18, wherein applying the electrical signal to the semiconductor device comprises shielding electromagnetic waves from the tester.
20. An apparatus for testing a semiconductor device, the apparatus comprising:
a test chamber;
a socket disposed at an upper portion of the test chamber, the socket configured to hold a probe card that transmits an electrical signal to a semiconductor device formed on a wafer;
a chuck positioned in the test chamber, the chuck configured to support the wafer within the test chamber and facing the cassette;
a chuck driving unit configured to drive the chuck to contact the semiconductor device with the probe card; and
a magnetic force generating unit configured to generate an electromagnetic force between the cassette and the chuck to increase a load applied between the probe card and the wafer,
wherein the magnetic force generating unit includes an electromagnet member disposed to surround an outer circumference of the chuck, the electromagnet member generating a magnetic field using electricity, and a magnetic member disposed adjacent to the cartridge to face the electromagnet member, the magnetic member being disposed to increase the electromagnetic field.
CN202010598648.9A 2019-06-27 2020-06-28 Apparatus and method for testing semiconductor device Pending CN112230114A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2019-0076869 2019-06-27
KR1020190076869A KR102294884B1 (en) 2019-06-27 2019-06-27 Apparatus of testing a semiconductor device and method of testing a semiconductor device

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