CN112133675A - 一种金属扩散阻挡层结构及其形成方法 - Google Patents
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Abstract
本发明公开了一种金属扩散阻挡层结构,包括由外而内依次形成于槽或孔内的粘附层、二硫化钼阻挡层、籽晶层和导线层;其中,二硫化钼阻挡层由向铜钼合金籽晶层中渗入硫,并与其中的钼反应而形成。本发明通过以三维二硫化钼层取代传统的氮化钽作为金属扩散阻挡层,可大幅降低阻挡层厚度,增加导线金属的比例,且有着较好的导电性,从而能从总体上大幅降低金属互连电阻,改善铜导线的抗电迁移能力,并有效克服了在后道工艺中引入二维材料所存在的沟槽覆盖率和工艺兼容性等问题。
Description
技术领域
本发明涉及半导体集成电路工艺技术领域,特别是涉及一种可用于后道互连技术的金属扩散阻挡层结构及其形成方法。
背景技术
在先进半导体集成电路工艺技术中,广泛采用了以金属铜(Cu)作为导体连线材料和以Low-k介质作为层间介质的工艺技术,来降低后道互连中的传输延迟(RC delay)现象。但随着导线尺寸的不断微缩,铜互连的可靠性问题愈发严重:高电流密度导致铜的电迁移(Electromigration,EM)寿命的降低,以及工艺过程中铜易扩散到Low-k介质中,导致器件短路。
为了缓解铜互连可靠性问题,一般需要在金属线槽及通孔中预先沉积一层防止铜扩散的阻挡层,目前主要采用TaN/Ta作为扩散阻挡层。但与此同时,在先进技术节点中,阻挡层的厚度不可持续降低,否则起不到防止铜扩散的目的。于是,高电阻的阻挡层占整个导线的比例迅速增加,从而导致整体后道电阻上升。因此,需要引入新的扩散阻挡层材料。
诸如石墨烯、二硫化钼和WS2等具有原子级的较薄厚度,且具备高导电性的二维材料,具有较大的互连应用潜力,可替代TaN/Ta作为扩散阻挡层材料。但使用这些材料仍存在许多工艺问题需要解决,主要包括:
(1)二维材料在复杂结构的三维沟槽和通孔中存在覆盖率较低问题。
(2)传统二维材料的制备工艺中,需要较高的沉积温度,因而存在与后道热预算不兼容问题。
发明内容
本发明的目的在于克服现有技术存在的上述缺陷,提供一种金属扩散阻挡层结构及其形成方法。
为实现上述目的,本发明的技术方案如下:
一种金属扩散阻挡层结构,包括由外而内依次形成于槽或孔内的粘附层、二硫化钼阻挡层、籽晶层和导线层。
进一步地,所述籽晶层包括铜钼合金层。
进一步地,所述二硫化钼阻挡层由向所述铜钼合金层中渗入硫,并与其中的钼反应而形成。
进一步地,所述二硫化钼阻挡层具有三维结构。
进一步地,所述二硫化钼阻挡层为珊瑚状堆积的多层薄膜结构。
进一步地,所述槽包括互连线槽,所述孔包括通孔。
一种金属扩散阻挡层结构形成方法,包括以下步骤:
步骤一:提供一衬底,在所述衬底上形成介质层,以及在所述介质层上形成槽或孔;
步骤二:在所述槽或孔的内壁表面上形成粘附层;
步骤三:在所述粘附层上形成作为籽晶层的铜钼合金层;
步骤四:向所述铜钼合金层中渗入硫,并与其中的钼反应,在所述粘附层和所述籽晶层之间形成二硫化钼阻挡层;
步骤五:在所述槽或孔中继续填充导线层,并平坦化。
进一步地,步骤三中,通过将铜和钼按一定比例进行固相烧结,形成靶材,并通过PVD工艺在所述粘附层上沉积形成所述铜钼合金层作为籽晶层。
进一步地,步骤四中,通过低温离子渗硫工艺,向所述铜钼合金层中渗入硫,并采用还原性气氛进行保护,经过一定的保温时间,在所述粘附层和所述籽晶层之间形成均匀覆盖并具有三维结构的二硫化钼阻挡层。
进一步地,所述向所述铜钼合金层中渗入硫时的渗硫温度为200℃~300℃。
从上述技术方案可以看出,本发明通过以三维二硫化钼(MoS2)层取代传统的TaN作为金属扩散阻挡层,一方面可大幅降低阻挡层厚度,增加导线金属的比例,另一方面用三维二硫化钼层作为阻挡层,有着较好的导电性,从而能从总体上大幅降低金属互连电阻。同时,在互连金属铜的界面处包裹三维二硫化钼层,可改善铜导线的抗电迁移能力。并且,从工艺集成来看,总工艺步骤并未增加,而且有效地克服了在后道工艺中引入二维材料所存在的沟槽覆盖率和工艺兼容性等问题。
附图说明
图1-图7是本发明一较佳实施例中根据本发明的一种金属扩散阻挡层结构形成方法制作一种金属扩散阻挡层结构的工艺步骤示意图。
图中 101.后道互连介质层,102.层间隔断层,103.互连金属,104.金属cap层,201.互连线槽,202.介质层,203.粘附层,204.籽晶层,205.二硫化钼阻挡层,206.互连导线层。
具体实施方式
下面结合附图,对本发明的具体实施方式作进一步的详细说明。
需要说明的是,在下述的具体实施方式中,在详述本发明的实施方式时,为了清楚地表示本发明的结构以便于说明,特对附图中的结构不依照一般比例绘图,并进行了局部放大、变形及简化处理,因此,应避免以此作为对本发明的限定来加以理解。
在以下本发明的具体实施方式中,请参考图7,图7是本发明一较佳实施例中根据本发明的一种金属扩散阻挡层结构形成方法制作的一种金属扩散阻挡层结构。如图7所示,本发明的一种金属扩散阻挡层结构,包括由外而内依次覆盖于互连线槽201的内壁表面上的粘附层203、二硫化钼阻挡层205和籽晶层204。
并且,在籽晶层204以内的互连线槽201中,还填充有导线层206。
作为一可选的实施方式,互连线槽201也可以采用通孔替代。下面以互连线槽201为例进行说明,但不限于此。
作为一可选的实施方式,粘附层203可包括钽(Ta)薄膜203;导线层206可包括铜导线层206。但不限于此。
作为一优选的实施方式,籽晶层204可包括铜钼合金层。其中,二硫化钼阻挡层205可由向铜钼合金层204中渗入硫,通过硫与铜钼合金层204中的钼反应而形成。
进一步地,二硫化钼阻挡层205可具有三维结构。例如,二硫化钼阻挡层205可以是均匀覆盖在钽薄膜203和铜钼合金层204之间的珊瑚状堆积的多层薄膜结构。
本发明的上述金属扩散阻挡层结构可建立在一个半导体衬底芯片上。涉及的芯片结构可包括:设置在半导体硅衬底上的后道互连介质层101,层间隔断层102,互连金属103,金属cap(帽)层104,均采用标准CMOS后道互连工艺制作,并具有该技术节点CMOS后道互连工艺的所有特征。并且,通过后续的互连工艺,可形成特定功能的电路模块。
请参考图7。在上述芯片结构的层间隔断层102上设有介质层202;互连线槽201形成于介质层202上。
介质层202可涉及隔离、钝化和刻蚀停止层等介质层,包括但不限于低K(介电常数)材料层、二氧化硅层、氮化硅层、碳化硅层、氧化铝层和氮化铝层中的至少一层。即本发明的介质层202材料包括但不限于低K值材料、二氧化硅、氮化硅、碳化硅、氧化铝和氮化铝等材料中的至少一种。介质层202薄膜厚度可为5nm~500nm。
本发明的上述金属扩散阻挡层结构中,Ta粘附层203、三维二硫化钼阻挡层205和铜钼合金籽晶层204加起来的总厚度不大于5nm。并且,其中涉及的金属材料包括但不限于钽(Ta)、铜(Cu)等,还可包括为了特定性能而形成的包含全部或部分上述元素的化合物。
以采用钽薄膜作为粘附层203,铜钼合金薄膜作为籽晶层204为例,钽薄膜203的厚度可在1nm以内,且三维二硫化钼阻挡层205和铜钼合金籽晶层204厚度之和不超过4nm。
下面通过具体实施方式并结合附图1-图7,对本发明的一种金属扩散阻挡层结构形成方法进行详细说明。
请参考图1-图7,图1-图7是本发明一较佳实施例中根据本发明的一种金属扩散阻挡层结构形成方法制作一种金属扩散阻挡层结构的工艺步骤示意图。如图1-图7所示,本发明的一种金属扩散阻挡层结构形成方法,可用于制造上述图7中所显示的一种金属扩散阻挡层结构,并可包括以下步骤:
步骤一:提供一衬底,在衬底上形成介质层202,以及在介质层202上形成互连线槽201。
请参考图1。可采用一个半导体后道互连衬底,并在衬底的层间隔断层102上继续沉积形成介质层202。涉及的芯片结构可包括后道互连介质层101,层间隔断层102,互连金属103,金属cap层104等,均可采用标准CMOS后道互连工艺制作,并具有该技术节点CMOS后道互连工艺的所有特征。通过后续的互连工艺,可形成特定功能的电路模块。
请参考图2。然后,进行标准后道互连光刻及刻蚀工艺,在介质层202上形成互连线槽201。
步骤二:在互连线槽201的内壁表面上形成粘附层203。
请参考图3。在互连线槽202中,可利用PVD或ALD等工艺,在介质层202上以及互连线槽201的内壁表面上沉积金属钽薄膜203,厚度可约为1nm。
步骤三:在粘附层203上形成作为籽晶层的铜钼合金层204。
请参考图4。接着,在Ta粘附层203上,可利用PVD工艺沉积Cu/Mo籽晶层204薄膜。使用的PVD靶材是将一定比例的Cu和Mo金属固相烧结而成。其中,Mo金属原子百分数可在10%~50%范围内。
步骤四:向铜钼合金层204中渗入硫,并与其中的钼反应,在粘附层203和籽晶层204之间形成二硫化钼阻挡层205。
请参考图5。然后,可采用低温离子渗硫工艺,在Ta粘附层203和Cu/Mo籽晶层204之间形成三维MoS2阻挡层205。
本步骤所用的气体硫源,可以为固体硫蒸汽,二硫化碳蒸汽或硫化氢气体等硫源,工艺温度可为200℃~300℃,并可采用常用的还原性气体组合Ar-H2作为渗硫气氛,阴极辉光放电电压可为100V~500V,渗硫保温时间可为1min~30min。
在上述渗硫过程中,采用还原性气氛保护控制渗硫反应的速率,使Cu/Mo籽晶层204面向互连线槽201内侧的裸露部分的硫氧化反应受到抑制,使得在Ta粘附层203和Cu/Mo籽晶层204之间更容易形成三维MoS2阻挡层205。
低温离子渗硫后的结果是,硫离子往Cu/Mo籽晶层204里扩散,并与其中的Mo金属反应,从而在Ta粘附层203和Cu/Mo籽晶层204之间形成均匀覆盖的三维MoS2阻挡层。
步骤五:在互连线槽201中继续填充互连导线层206,并平坦化。
请参考图6。可利用电镀或化学镀工艺,在互连线槽201中完成互连导线层206的沉积填充。
请参考图7。最后,可采用化学平坦化工艺,去除互连线槽201外多余的铜、铜钼合金、二硫化钼和钽等金属,形成本发明的金属扩散阻挡层结构。
综上,本发明通过以三维二硫化钼(MoS2)层取代传统的TaN作为金属扩散阻挡层,一方面可大幅降低阻挡层厚度,增加导线金属的比例,另一方面用三维二硫化钼层作为阻挡层,有着较好的导电性,从而能从总体上大幅降低金属互连电阻。同时,在互连金属铜的界面处包裹三维二硫化钼层,可改善铜导线的抗电迁移能力。并且,从工艺集成来看,总工艺步骤并未增加,而且有效地克服了在后道工艺中引入二维材料所存在的沟槽覆盖率和工艺兼容性等问题。
以上的仅为本发明的优选实施例,实施例并非用以限制本发明的保护范围,因此凡是运用本发明的说明书及附图内容所作的等同结构变化,同理均应包含在本发明的保护范围内。
Claims (10)
1.一种金属扩散阻挡层结构,其特征在于,包括由外而内依次形成于槽或孔内的粘附层、二硫化钼阻挡层、籽晶层和导线层。
2.根据权利要求1所述的金属扩散阻挡层结构,其特征在于,所述籽晶层包括铜钼合金层。
3.根据权利要求2所述的金属扩散阻挡层结构,其特征在于,所述二硫化钼阻挡层由向所述铜钼合金层中渗入硫,并与其中的钼反应而形成。
4.根据权利要求3所述的金属扩散阻挡层结构,其特征在于,所述二硫化钼阻挡层具有三维结构。
5.根据权利要求3或4所述的金属扩散阻挡层结构,其特征在于,所述二硫化钼阻挡层为珊瑚状堆积的多层薄膜结构。
6.根据权利要求1所述的金属扩散阻挡层结构,其特征在于,所述槽包括互连线槽,所述孔包括通孔。
7.一种金属扩散阻挡层结构形成方法,其特征在于,包括以下步骤:
步骤一:提供一衬底,在所述衬底上形成介质层,以及在所述介质层上形成槽或孔;
步骤二:在所述槽或孔的内壁表面上形成粘附层;
步骤三:在所述粘附层上形成作为籽晶层的铜钼合金层;
步骤四:向所述铜钼合金层中渗入硫,并与其中的钼反应,在所述粘附层和所述籽晶层之间形成二硫化钼阻挡层;
步骤五:在所述槽或孔中继续填充导线层,并平坦化。
8.根据权利要求7所述的金属扩散阻挡层结构形成方法,其特征在于,步骤三中,通过将铜和钼按一定比例进行固相烧结,形成靶材,并通过PVD工艺在所述粘附层上沉积形成所述铜钼合金层作为籽晶层。
9.根据权利要求7所述的金属扩散阻挡层结构形成方法,其特征在于,步骤四中,通过低温离子渗硫工艺,向所述铜钼合金层中渗入硫,并采用还原性气氛进行保护,经过一定的保温时间,在所述粘附层和所述籽晶层之间形成均匀覆盖并具有三维结构的二硫化钼阻挡层。
10.根据权利要求7或9所述的金属扩散阻挡层结构形成方法,其特征在于,所述向所述铜钼合金层中渗入硫时的渗硫温度为200℃~300℃。
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CN106410002A (zh) * | 2015-07-31 | 2017-02-15 | 三星电子株式会社 | 包括扩散阻挡层的多层结构体、包括其的器件和电子器件 |
CN110875244A (zh) * | 2018-09-03 | 2020-03-10 | 长鑫存储技术有限公司 | 金属互连结构及其形成方法、半导体器件的形成方法 |
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US6126806A (en) * | 1998-12-02 | 2000-10-03 | International Business Machines Corporation | Enhancing copper electromigration resistance with indium and oxygen lamination |
CN106410002A (zh) * | 2015-07-31 | 2017-02-15 | 三星电子株式会社 | 包括扩散阻挡层的多层结构体、包括其的器件和电子器件 |
CN110875244A (zh) * | 2018-09-03 | 2020-03-10 | 长鑫存储技术有限公司 | 金属互连结构及其形成方法、半导体器件的形成方法 |
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