CN112074939A - 具有集成计量的衬底加工工具及其使用方法 - Google Patents

具有集成计量的衬底加工工具及其使用方法 Download PDF

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Publication number
CN112074939A
CN112074939A CN201980029771.4A CN201980029771A CN112074939A CN 112074939 A CN112074939 A CN 112074939A CN 201980029771 A CN201980029771 A CN 201980029771A CN 112074939 A CN112074939 A CN 112074939A
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substrate
substrate processing
chamber
processing chamber
metrology module
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坎达巴拉·塔皮利
罗伯特·克拉克
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Abstract

一种被配置用于执行集成的衬底加工和衬底计量的衬底加工工具以及加工衬底的方法。该衬底加工工具包括衬底搬送室、耦接至该衬底搬送室的多个衬底加工室、以及耦接至该衬底搬送室的衬底计量模块。一种衬底加工方法包括：在衬底加工工具的第一衬底加工室中加工衬底，将该衬底从该第一衬底加工室通过衬底搬送室搬送到该衬底加工工具中的衬底计量模块，在该衬底计量模块中对该衬底执行计量，将该衬底从该衬底计量模块通过该衬底搬送室搬送到第二衬底加工室，以及在该第二衬底加工室中加工该衬底。

Description

具有集成计量的衬底加工工具及其使用方法
相关申请的交叉引用
本申请涉及并要求2018年3月20日提交的美国临时专利申请序列号62/645,685的优先权，该美国临时专利申请的全部内容通过引用并入本文。
技术领域
本发明涉及衬底加工，并且更具体地涉及一种被配置用于执行集成的衬底加工和衬底计量的衬底加工工具及其使用方法。
背景技术
随着生产较小的晶体管，图案化特征的临界尺寸(CD)或分辨率变得越来越难以生产。需要自对准图案化来替换套刻驱动(overlay-driven)的图案化，以便即使在引入EUV之后也可以继续进行具有成本效益的缩放。需要使得能够减少可变性、扩展缩放以及增强CD和过程控制的图案化选项，然而以适当低的成本生产经缩放器件变得极其困难。选择性沉积可以显著降低与高级图案化相关联的成本。薄膜的选择性沉积(诸如间隙填充)、电介质和金属在特定衬底上的区域选择性沉积以及选择性硬掩模是大规模技术节点中图案化的关键步骤。
发明内容
本发明的实施例描述了一种被配置用于执行集成衬底加工和衬底计量的衬底加工工具以及加工衬底的方法。
根据一个实施例，一种衬底加工工具包括衬底搬送室、耦接至该衬底搬送室的多个衬底加工室、以及耦接至该衬底搬送室的衬底计量模块。
根据一个实施例，一种衬底加工方法包括：在衬底加工工具的第一衬底加工室中加工衬底，将该衬底从该第一衬底加工室通过衬底搬送室搬送到该衬底加工工具中的衬底计量模块，在该衬底计量模块中对该衬底执行计量，将该衬底从该衬底计量模块通过该衬底搬送室搬送到第二衬底加工室，以及在该第二衬底加工室中加工该衬底。
附图说明
参考以下尤其是在结合附图考虑时的具体实施方式，对本发明的实施例及其许多附带优点的更完整的理解将变得非常明显，在附图中：
图1是根据本发明的实施例的被配置用于执行集成的衬底加工和衬底计量的衬底加工工具的示意图；
图2A至图2E通过示意性截面视图示出了根据本发明的实施例的区域选择性膜形成的方法；
图3是根据本发明的实施例的用于执行集成的衬底加工和衬底计量的过程流程图；以及
图4是根据本发明的另一实施例的用于执行集成的衬底加工和衬底计量的过程流程图。
具体实施方式
本发明的实施例描述了一种被配置用于执行集成的衬底加工和衬底计量的衬底加工工具以及加工衬底的方法。
本发明的实施例涉及集成的衬底加工和对在集成的衬底加工期间执行衬底计量的需要。在一个示例中，在衬底加工工具中进行区域选择性膜沉积期间，可以在膜沉积步骤之后在加工工具中执行衬底计量，以测量和表征沉积选择性的损失，并基于衬底计量数据执行对不期望膜核的去除以实现选择性膜形成。可以使用来自衬底计量步骤的结果来基于膜沉积步骤中的变化调整膜核去除步骤。进一步地，可以使用人工智能(AI)来分析衬底计量结果并预测未来的膜厚度和膜沉积选择性。
图1是根据本发明的实施例的被配置用于执行集成的衬底加工和衬底计量的衬底加工工具的示意图。衬底加工工具100包含衬底(晶片)搬送系统101，该衬底搬送系统包括盒式模块101A、101B和101C以及衬底对准模块101D。加载闭锁室102A和102B以及衬底计量模块102C耦接到衬底搬送系统101。衬底搬送系统101维持在大气压，但是通过用惰性气体进行吹扫来提供清洁的环境。加载闭锁室102A和102B耦接到衬底搬送室103，并且可以用于将衬底从衬底搬送系统101搬送到衬底搬送室103。衬底搬送室103可以维持在非常低的基准压力(例如，5×10-8托或更低)或者可以用惰性气体不断地吹扫。
衬底计量模块102C可以在大气压下操作或者在真空条件下操作，并且可以包括一个或多个分析工具，该一个或多个分析工具能够测量衬底的和/或在衬底上沉积的薄膜和层的一个或多个材料特性和电子特性。该一个或多个分析工具的一些或全部部件可以位于衬底计量模块102C中的真空环境中。在一个示例中，光源可以被定位在衬底计量模块102C的外部，并且来自光源的光可以通过窗口透射到衬底计量模块102C中并且透射到衬底上。可替代地，光源可以被定位在衬底计量模块102C的内部。
示例性分析工具可以包括：用于测量材料的元素组成、经验公式、化学状态和电子状态的X射线光电子能谱(XPS)分析；用于表征表面、薄膜和多层膜的X射线反射(XRR)测量；用于材料的元素分析和化学分析的X射线荧光光谱(XRF)分析；用于表征材的料傅里叶变换红外光谱(FTIR)分析；用于测量薄膜的厚度和光学特性的紫外/可见(UV/Vis)光谱分析；用于表征表面、薄膜和多层膜的光学散射测量；用于表征薄膜的成分、粗糙度、厚度(深度)、晶体性质、掺杂浓度、电导率和其他材料特性的椭圆偏振技术；以及用于测量衬底弯曲和翘曲的分析工具。
耦接到衬底搬送室103的是被配置用于加工诸如Si晶片等衬底的衬底加工室106A至106D。Si晶片的直径可以为例如150mm、200mm、300mm、450mm或大于450mm。根据本发明的一个实施例，第一衬底加工室106A可以对衬底执行处理工艺，并且第二衬底加工室106B可以在衬底上形成自对准单层(SAM)。第三衬底加工室106C可以刻蚀或清洁衬底，并且第四衬底加工室106D可以通过诸如原子层沉积(ALD)、等离子体增强ALD(PEALD)、化学气相沉积(CVD)或等离子体增强CVD(PECVD)等气相沉积来在衬底上沉积膜。衬底搬送室103被配置用于在衬底加工室106A至106D中的任何衬底加工室之间搬送衬底，以及将该衬底搬送到衬底计量模块102C中。图1进一步示出了在相邻加工工具部件之间提供隔离的闸阀G1至G9。如图1的实施例中所描绘的，衬底加工室106A至106D和衬底计量模块102C可以通过闸阀G5、G7、G8、G9和G10直接耦接到衬底搬送室103。这种直接耦接可以大大提高衬底的吞吐量。
衬底加工工具100包括控制器110，该控制器可以耦接到图1中所描绘的任何或所有工具部件并且在集成的衬底加工和衬底计量期间控制该任何或所有工具部件。可替代地或另外地，控制器110可以耦接到一个或多个附加控制器/计算机(未示出)，并且控制器110可以从附加控制器/计算机获得设置和/或配置信息。控制器110可以用于配置任何或所有衬底加工室和处理元件，并且控制器110可以收集、提供、处理、存储和显示来任何或所有工具部件的数据。控制器110可以包括用于控制任何或所有工具部件的多个应用程序。例如，控制器110可以包括图形用户界面(GUI)部件，该GUI部件可以提供使得用户能够监视和/或控制一个或多个工具部件的易于使用的界面。
控制器110可以包括微处理器、存储器和数字I/O端口，该数字I/O端口能够生成足以与衬底加工工具100通信、激活输入、和交换信息并且足以监测来自衬底加工工具100的输出的控制电压。例如，可以利用存储在存储器中的程序根据工艺配方来激活衬底加工工具100的输入，以执行集成的衬底加工。控制器110可以被实施为通用计算机系统，该通用计算机系统响应于处理器执行存储器中包含的一个或多个指令的一个或多个序列来执行本发明的基于微处理器的处理步骤的一部分或全部。这样的指令可以被从诸如硬盘或可移动介质驱动器等另一计算机可读介质读入控制器存储器中。多处理布置中的一个或多个处理器也可以用作控制器微处理器，以执行主存储器中包含的指令序列。在可替代实施例中，可以代替或结合软件指令使用硬连线电路系统。因此，实施例不限于硬件电路系统和软件的任何特定组合。
控制器110可以相对于衬底加工工具100位于本地，或者该控制器可以相对于衬底加工工具100远程地定位。例如，控制器110可以使用直接连接、内联网、互联网和无线连接中的至少一者与衬底加工工具100交换数据。控制器110可以耦接到例如客户站点(即，装置厂商等)处的内联网，或者该控制器可以耦接到例如供应商站点(即，设备生产商)处的内联网。另外地，例如，控制器110可以耦接到互联网。此外，另一计算机(即，控制器、服务器等)可以例如经由直接连接、内联网和互联网中的至少一者来访问控制器110以交换数据。如本领域技术人员还将理解的，控制器110可以经由无线连接与衬底加工工具100交换数据。
衬底加工示例
现在参考图1、图2A至图2E和图3，根据一个实施例，衬底加工工具100可以被配置为执行和监视在衬底上进行区域选择性沉积的方法。在该实施例中，衬底200包含基础层202、第一材料层204的暴露表面和第二材料层206的暴露表面。在一个示例中，衬底200包括电介质层204和金属层206。例如，金属层206可以包含Cu、Al、Ta、Ti、W、Ru、Co、Ni或Mo。电介质层204可以例如包含SiO2、低k电介质材料或高k电介质材料。低k电介质材料的标称介电常数小于SiO2的介电常数，SiO2的介电常数大约为4(例如，热生长二氧化硅的介电常数的范围可以为3.8至3.9)。高k材料的标称介电常数大于SiO2的介电常数。
低k电介质材料的介电常数可以小于3.7或者介电常数范围为1.6到3.7。低k电介质材料可以包括氟化硅玻璃(FSG)、碳掺杂氧化物、聚合物、含SiCOH的低k材料、非多孔低k材料、多孔低k材料、旋涂电介质(SOD)低k材料或任何其他合适的电介质材料。低k电介质材料可以包括可从应用材料公司(Applied Materials,Inc.)商购的BLACK
Figure BDA0002755940920000061
(BD)或BLACK
Figure BDA0002755940920000062
II(BDII)SiCOH材料或可从诺发系统公司(Novellus Systems,Inc.)商购的
Figure BDA0002755940920000063
CVD膜。其他可商购的含碳材料包括可从陶氏化学(Dow Chemical)获得的
Figure BDA0002755940920000064
(例如，SiLK-I、SiLK-J、SiLK-H、SiLK-D和多孔SiLK半导体绝缘树脂)和
Figure BDA0002755940920000065
(苯并环丁烯)以及从霍尼韦尔(Honeywell)获得的GX-3TM和GX-3PTM半导体绝缘树脂。
低k电介质材料包括由单相组成的多孔无机-有机杂化膜，诸如具有CH3键的二氧化硅基基质，该CH3键在固化或沉积工艺期间会阻碍膜的完全致密化从而形成小的空隙(或孔)。仍然可替代地，这些电介质层可以包括由至少两相组成的多孔无机-有机杂化膜，该多孔无机-有机杂化膜诸如是具有多孔有机材料(例如，致孔剂)的碳掺杂二氧化硅基基质，该多孔有机材料在固化过程期间分解和蒸发。
此外，低k材料包括使用SOD技术沉积的硅酸盐基材料，诸如氢倍半硅氧烷(HSQ)或甲基倍半硅氧烷(MSQ)。这样的膜的示例包括可从道康宁(Dow Corning)商购的
Figure BDA0002755940920000066
HSQ、可从道康宁商购的XLK多孔HSQ以及可从JSR微电子(JSR Microelectronics)商购的JSRLKD-5109。
该方法进一步包括：在过程流程300的步骤302中，将衬底200提供到衬底搬送系统101中，并且此后，将衬底200搬送到衬底搬送室103中。
此后，在步骤304中，可选地将衬底200搬送到衬底计量模块102C中，在该衬底计量模块中对衬底200进行测量和表征。
在步骤306中，可选地将衬底200搬送到第一衬底加工室106A中以利用处理气体进行处理。例如，处理气体可以包括氧化性气体或还原性气体。在一些示例中，氧化性气体可以包括O2、H2O、H2O2、异丙醇或其组合，并且还原性气体可以包括H2气体。氧化性气体可以用于氧化第一材料层204的表面或第二材料206的表面以改善随后的区域选择性沉积。在一个示例中，处理气体可以包含等离子体激发的Ar气体或由其组成。
在步骤308中，可选地将衬底200搬送到衬底计量模块102C中，在该衬底计量模块中，对在步骤306中对衬底200的处理进行测量和表征。
此后，在步骤310中，将衬底搬送到第二衬底加工室106B中，在该第二衬底加工室中在衬底200上形成自对准单层(SAM)。该SAM可以通过以下方式而在衬底200上形成：将该衬底暴露于包含能够在衬底200上形成SAM的分子的反应气体。SAM是通过吸附作用自发形成在衬底表面上并被组织成或大或小的有序域的分子组装体。SAM可以包括具有头基、尾基和官能端基的分子，并且SAM是通过从室温或高于室温的气相中将头基化学吸附到衬底200上、然后是尾基的不活跃组织而产生的。最初，在表面上的小分子密度下，被吸附物分子要么形成无序的分子团，要么形成有序的二维“躺下相”，并且在几分钟至几小时的时间段内以较高的分子覆盖范围开始在衬底表面上形成三维晶体或半晶体结构。头基一起组装在衬底上，而尾基远离衬底组装。
根据一个实施例，形成SAM的分子的头基可以包括硫醇、硅烷或膦酸酯。硅烷的示例包括包含C、H、Cl、F和Si原子或C、H、Cl和Si原子的分子。该分子的非限制性示例包括全氟癸基三氯硅烷(CF3(CF2)7CH2CH2SiCl3)、全氟癸硫醇(CF3(CF2)7CH2CH2SH)、氯癸基二甲基硅烷(CH3(CH2)8CH2Si(CH3)2Cl)和特丁基(氯)二甲基硅烷((CH3)3CSi(CH3)2Cl))。
可以使用衬底200上SAM的存在，以使得能够随后相对于第二材料层206(例如，金属层)在第一材料层204(例如，电介质层)上进行选择性膜沉积。这种选择性沉积行为是意料之外的，并提供了一种用于选择性地在第一材料层204上沉积膜同时防止或减少第二材料层206上的金属氧化物沉积的新方法。据此推测，第二材料层206上的SAM密度相对于第一材料层204上的SAM密度更大，这可能是由于第二材料层206上的分子相对于第一材料层204上的分子具有更高的初始排序。在图2B中，第二材料层206上的该更大密度的SAM被示意性地示出为SAM 208。
在衬底200上形成SAM 208之后，在步骤312中，可选地将衬底200搬送到衬底计量模块102C中，在该衬底计量模块中，对衬底200上SAM 208的形成进行测量和表征。
此后，将衬底200搬送到第四衬底加工室106D中，在步骤314中，在该第四衬底加工室中，通过将衬底200暴露于一种或多种沉积气体而相对于包含SAM 208的第二材料层206使膜210(例如，金属氧化膜)选择性地沉积在第一材料层204上。在一个示例中，膜210可以包括包含HfO2、ZrO2或Al2O3的金属氧化膜。膜210可以例如通过CVD、等离子体增强CVDPEALD)、ALD或等离子体增强ALD(PEALD)来沉积。在一些示例中，可以通过ALD、使用含金属的前体与氧化剂(例如，H2O、H2O2、等离子体激发的O2或O3)的交替暴露来沉积膜210。
如图2C中所描绘的，在第三衬底加工室106C中暴露于一种或多种沉积气体除了在第一材料层204上沉积膜210之外，还可以在SAM 208上沉积膜核210’。如果沉积工艺进行的时间太长或者如果第一材料层204与SAM 208之间的沉积选择性很差，则可能发生该沉积选择性损失。如果SAM 208的表面覆盖范围不完整并且在第二材料层206上包含空隙，则也可能发生很差的沉积选择性。
在衬底200上沉积膜210之后，在步骤316中，将衬底200搬送到衬底计量模块102C中，在该衬底计量模块中，对膜210的沉积进行测量和表征。该表征可以确定沉积选择性的程度以及对从SAM208去除膜核210’的需要。
可以使用刻蚀工艺去除SAM 208上的膜核210’，以便在第一材料层204上选择性地形成膜210。在步骤318中，将衬底200搬送到第三衬底加工室106C中以执行刻蚀工艺。尽管也可以通过刻蚀工艺来部分地去除膜210，但是预计金属氧化物核210’的刻蚀要比膜210的刻蚀快。刻蚀工艺可以包括干刻蚀工艺、湿刻蚀工艺或其组合。在一个示例中，刻蚀工艺可以包括原子层刻蚀(ALE)工艺。在图2D中示出的所产生的衬底200具有选择性地形成在第一材料层204上的膜210。
在刻蚀工艺之后，在步骤320中，可选地将衬底200搬送到衬底计量模块102C中，在该衬底计量模块中对衬底200进行测量和表征。该表征可以确定刻蚀工艺的程度。
其后，在步骤322中，可以例如通过在第三衬底加工室106C中进行刻蚀或清洁或者通过在第一衬底加工室106A中进行热处理来从衬底200去除SAM 208。
如由过程箭头324示意性地示出的，可以重复上述衬底加工步骤304至322一次或多次，以增加衬底200上的膜210的厚度。如果SAM 208在膜沉积和/或刻蚀工艺期间被损坏并且因此影响膜沉积选择性，则可能期望去除衬底200上的SAM 208并随后在衬底上重复沉积SAM。
图4是根据本发明的实施例的用于执行集成的衬底加工和衬底计量的过程流程图。还参考图1和图2A至图2E，图4中的过程流程图400与图3中的过程流程图300类似，并且包括在步骤402中在衬底加工工具100中提供衬底200，其中，衬底200包含第一材料层204的暴露表面和第二材料层206的暴露表面。在一个示例中，第一材料层204包括电介质层，并且第二材料层206包括金属层。该方法进一步包括：在步骤404中，可选地执行衬底计量；在步骤406中，可选地利用处理气体来处理衬底200；以及在步骤408中，可选地执行衬底计量。
该方法进一步包括：在步骤410中，在衬底200上形成SAM 208；以及在步骤412中，可选地执行衬底计量。该方法进一步包括：在步骤414中，在第一材料层204上沉积膜210，并且在SAM 208上沉积膜核210’；以及在步骤416中，执行衬底计量。该方法进一步包括：在步骤418中，从SAM 208去除膜核210’；以及在步骤420中，可选地执行衬底计量。进一步包括：在422中，可选地利用处理气体来处理衬底200。如过程箭头424示意性地示出的，可以重复上述衬底加工步骤412至422一次或多次，以增加衬底200上的膜210的厚度。
在各种实施例中已经公开了一种被配置用于执行集成的衬底加工和衬底计量的衬底加工工具以及一种区域选择性沉积方法。为了说明和描述的目的，已经呈现了对本发明实施例的前述描述。并不旨在穷举或将本发明限制于所披露的确切形式。本说明书和所附权利要求包括仅用于描述目的并且不应解释为进行限制的术语。相关领域的技术人员可以理解，根据以上教导，许多修改和变化是可能的。本领域技术人员将认识附图中示出的各种部件的各种等效组合和替代。因此，意图是本发明的范围不受该详细描述限制，而是由在此所附的权利要求限制。

Claims (20)

1.一种衬底加工工具，包括：
衬底搬送室；
多个衬底加工室，该多个衬底加工室耦接至该衬底搬送室；以及
衬底计量模块，该衬底计量模块耦接至该衬底搬送室。
2.如权利要求1所述的衬底加工工具，其中，该衬底计量模块包括一个或多个分析工具，该一个或多个分析工具测量衬底的或在衬底上形成的薄膜和层的一种或多种材料特性。
3.如权利要求1所述的衬底加工工具，其中，该衬底搬送室包括衬底搬送机械手。
4.如权利要求1所述的衬底加工工具，其中，该多个衬底加工室包括：
第一衬底加工室，该第一衬底加工室被配置用于执行自组装单层(SAM)工艺；
第二衬底加工室，该第二衬底加工室被配置用于执行膜沉积工艺；以及
第三衬底加工室，该第三衬底加工室被配置用于执行刻蚀工艺。
5.如权利要求4所述的衬底加工工具，其中，该第二衬底加工室被配置用于通过原子层沉积(ALD)、等离子体增强ALD(PEALD)、化学气相沉积(CVD)或等离子体增强CVD(PECVD)来执行膜沉积工艺。
6.如权利要求4所述的衬底加工工具，进一步包括
第四衬底加工室，该第四衬底加工室被配置用于使用反应性处理气体、热处理或其组合来执行处理工艺。
7.如权利要求1所述的衬底加工工具，其中，该衬底计量模块通过闸阀直接耦接至该衬底搬送室。
8.一种衬底加工方法，包括：
在衬底加工工具的第一衬底加工室中加工衬底；
将该衬底从该第一衬底加工室通过衬底搬送室搬送到该衬底加工工具中的衬底计量模块；
在该衬底计量模块中对该衬底执行计量；
将该衬底从该衬底计量模块通过该衬底搬送室搬送到第二衬底加工室；以及
在该第二衬底加工室中加工该衬底。
9.如权利要求8所述的衬底加工方法，其中，该衬底计量模块通过闸阀直接耦接至该衬底搬送室。
10.如权利要求8所述的衬底加工方法，其中，该第一衬底加工室被配置用于执行膜沉积工艺，并且该第二加工室被配置用于执行刻蚀工艺。
11.如权利要求8所述的衬底加工方法，其中，该衬底计量模块包括一个或多个分析工具，该一个或多个分析工具测量衬底的或在该衬底上形成的薄膜和层的一种或多种材料特性。
12.一种衬底加工方法，包括：
在衬底加工工具中提供衬底，该衬底包含第一材料层的暴露表面和第二材料层的暴露表面；
在第一衬底加工室中在该衬底上形成自组装单层(SAM)；
将该衬底从该第一衬底加工室通过衬底搬送室搬送到第二衬底加工室；以及
在该第二衬底加工室中在该第一材料层上沉积膜并且在该自组装单层上沉积膜核；
将该衬底从该第二衬底加工室通过该衬底搬送室搬送到衬底计量模块；
在该衬底计量模块中对该膜执行计量；
将该衬底从该衬底计量模块通过该衬底搬送室搬送到第三衬底加工室；以及
在第三衬底加工室中通过刻蚀从该自组装单层中去除该膜核。
13.如权利要求12所述的衬底加工方法，其中，该衬底计量模块通过闸阀直接耦接至该衬底搬送室。
14.如权利要求12所述的衬底加工方法，进一步包括
在第四衬底加工室中使用反应性处理气体、热处理或其组合对该衬底执行处理工艺。
15.如权利要求12所述的衬底加工方法，其中，该第一材料层包括电介质层。
16.如权利要求12所述的衬底加工方法，其中，该第二材料层包括金属层。
17.如权利要求16所述的衬底加工方法，其中，该金属层包含Cu、Al、Ta、Ti、W、Ru、Co、Ni或Mo。
18.如权利要求12所述的衬底加工方法，其中，该膜包括金属氧化物。
19.如权利要求12所述的衬底加工方法，其中，在该第二材料层上该SAM的密度大于在该第一材料层上该SAM的密度。
20.如权利要求12所述的衬底加工方法，其中，该SAM包括包含头基、尾基和官能端基的多个分子，其中，该头基包括硫醇、硅烷或膦酸酯。
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