CN111935902A - Printed circuit board - Google Patents
Printed circuit board Download PDFInfo
- Publication number
- CN111935902A CN111935902A CN202011005854.0A CN202011005854A CN111935902A CN 111935902 A CN111935902 A CN 111935902A CN 202011005854 A CN202011005854 A CN 202011005854A CN 111935902 A CN111935902 A CN 111935902A
- Authority
- CN
- China
- Prior art keywords
- circuit board
- printed circuit
- layer
- copper foils
- consistent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
Abstract
The invention discloses a printed circuit board, which comprises conducting layers and insulating layers which are arranged in a laminated mode, wherein the insulating layer is arranged between any two adjacent conducting layers, a signal area is formed on each conducting layer, a blank area is formed in the conducting layer except the signal area, signal lines are arranged in the signal area, no attribute lines are arranged in the blank area, and the distribution mode of the no attribute lines is consistent with or basically consistent with that of the signal lines. In the printed circuit board, the distribution mode of the attribute-free lines is consistent or basically consistent with the distribution mode of the signal lines, so that the wiring of different areas of the conductive layers is consistent or basically consistent, the wiring of the conductive layers in the printed circuit board is uniform, the structure of the printed circuit board is free of difference or small in difference, the properties of the printed circuit board in all aspects such as expansion and contraction rate tend to be consistent, the printed circuit board is not easy to deform, the flatness and the performance stability of the printed circuit board are ensured, the welding of parts and the reliability of the whole product are improved, and the stability of the performance of products is further ensured.
Description
Technical Field
The invention relates to the technical field of printed circuit board design and manufacture, in particular to a printed circuit board.
Background
At present, electronic products are gradually developed to be light and thin, the updating speed of the electronic products is increasing, the functional requirements of the electronic products are also increasing, and a Printed Circuit Board (PCB) is used as a support body of important electronic components and electronic components of the electronic products and a carrier for electrical connection of the electronic components, and the quality of the design of the PCB is critical to the performance of the electronic products, so that the reliability of the PCB needs to be fully considered when the PCB is designed.
However, signal lines of different layers of the PCB are not distributed uniformly, and there may be a large difference in the density of signal line distribution in different parts of a certain layer, for example, in a certain layer of the PCB, most of the signal lines are concentrated in the right half, the left half is blank, and there is substantially no signal line distribution, so that when the PCB is manufactured, the copper foil at the right half of the layer where the signal lines are distributed is left on the PCB, and the corresponding copper foil of the left half is etched away, i.e., there is no copper foil on the left half, so that there is a large difference in the structure of the left and right parts of the layer, and there are different expressions in terms of shrinkage rate, etc., which causes the PCB to be easily deformed, affects the flatness of the PCB, further affects the welding reliability of the parts, and there is a hidden danger in the reliability of the product.
Disclosure of Invention
The invention mainly aims to provide a printed circuit board, aiming at solving the technical problem that the reliability of a product is influenced because the PCB is easy to deform due to uneven wiring of each layer of the PCB.
In order to achieve the above object, the present invention provides a printed circuit board, which includes a conductive layer and an insulating layer arranged in a stacked manner, wherein the insulating layer is arranged between any two adjacent conductive layers, a signal area is formed on the conductive layer, a blank area is formed in an area of the conductive layer other than the signal area, a signal line is arranged in the signal area, a non-attribute line is arranged in the blank area, and a distribution manner of the non-attribute line is consistent or substantially consistent with a distribution manner of the signal line.
Preferably, the non-attribute line is formed by a plurality of copper foils distributed at intervals, and the distribution mode of the plurality of copper foils is consistent with or basically consistent with that of the signal lines.
Preferably, a plurality of the copper foils are spread over the blank area.
Preferably, the blank area has a first subregion and a second subregion which are symmetrically arranged, and the distribution mode of the plurality of copper foils distributed in the first subregion is symmetrical or substantially symmetrical to the distribution mode of the plurality of copper foils distributed in the second subregion.
Preferably, a plurality of the copper foils are evenly distributed at intervals.
Preferably, the printed circuit board has at least one set of two symmetrically arranged conductive layers, and the distribution mode of the plurality of copper foils on the at least one set of two symmetrically arranged conductive layers is consistent or basically consistent.
Preferably, the distribution of the plurality of copper foils on each conductive layer is consistent or substantially consistent with the distribution of the plurality of copper foils on the conductive layer symmetrically arranged with the conductive layer.
Preferably, the shape of the copper foil is circular, oval, triangular, rectangular, rhombic, trapezoidal or hexagonal.
Preferably, a spacing between the dummy line and the signal line is not less than 0.2 mm.
Preferably, the printed circuit board is provided with a wire passing hole for the signal wire to pass through, and the wire passing hole is communicated with each conductive layer.
In the printed circuit board, the conductive layer is formed with a signal area and a blank area, wherein the signal area is provided with signal lines, the blank area is provided with a non-attribute line, the non-attribute line represents non-attribute wiring, and the non-attribute line does not have the function of transmitting signals and the like. The distribution mode of the attribute-free line is consistent or basically consistent with the distribution mode of the signal line, so that the wiring of different areas of the conducting layers is consistent or basically consistent, the wiring of each conducting layer in the printed circuit board is uniform, the structure of the printed circuit board is free of difference or difference and small, the properties of expansion and contraction rate and the like tend to be consistent, the printed circuit board is not easy to deform, the flatness and the performance stability of the printed circuit board are guaranteed, the welding of parts and the reliability of the whole product are improved, and the stability of the product performance is guaranteed.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a printed circuit board according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a first embodiment of a laminated structure of a surface layer, a bottom layer and a surface layer and a bottom layer of a printed circuit board according to the present invention;
FIG. 3 is a schematic diagram of a surface layer, a bottom layer, and a laminated structure of the surface layer and the bottom layer of a printed circuit board according to a second embodiment of the present invention;
FIG. 4 is a schematic diagram of a surface layer, a bottom layer, and a laminated structure of the surface layer and the bottom layer of a printed circuit board according to a third embodiment of the present invention;
FIG. 5 is a schematic diagram of a surface layer, a bottom layer, and a laminated structure of the surface layer and the bottom layer of a printed circuit board according to a fourth embodiment of the present invention;
FIG. 6 is a schematic diagram of a fifth embodiment of a PCB of the present invention, wherein the PCB includes a top layer, a bottom layer, and a laminated structure of the top layer and the bottom layer;
fig. 7 is a schematic diagram of a surface layer, a bottom layer, and a laminated structure of the surface layer and the bottom layer in a printed circuit board according to a sixth embodiment of the invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 100 | Printed |
101 | |
| 10 | |
102 | |
| 11 | |
103 | in2 |
| 12 | |
104 | in3 |
| 121 | First sub-region | 20 | |
| 122 | |
30 | |
| 13 | |
40 | Wire through |
| 14 | Copper foil |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that, if directional indications (such as up, down, left, right, front, and back … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description of "first", "second", etc. in an embodiment of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
The invention provides a printed circuit board.
As shown in fig. 1 to 7, in the present embodiment, the printed circuit board 100 includes conductive layers 10 and insulating layers 20 arranged in a stacked manner, and the insulating layer 20 is disposed between any two adjacent conductive layers 10, and it is understood that the conductive layers 10 and the insulating layers 20 are arranged in a stacked and crossed manner, that is, the insulating layer 20 is disposed between any two adjacent conductive layers 10, and the conductive layer 10 is disposed between any two adjacent insulating layers 20. The conductive layer 10 is formed with a signal area 11, the conductive layer 10 is formed with a blank area 12 in an area other than the signal area 11, the signal area 11 is provided with a signal line 13, the blank area 12 is provided with a non-attribute line, and the distribution of the non-attribute line is identical or substantially identical to the distribution of the signal line 13.
In the printed circuit board 100 of the present embodiment, the conductive layer 10 is formed with the signal area 11 and the blank area 12, and it is understood that the blank area 12 is an area where the signal line 13 and the component are not arranged, wherein the signal area 11 is provided with the signal line 13, and the blank area 12 is provided with the non-attribute line, and it is understood that the non-attribute line indicates a non-attribute wiring line, and the non-attribute line does not have a function of propagating a signal or the like. The distribution mode of the attribute-free lines is consistent or basically consistent with the distribution mode of the signal lines 13, so that the wiring of different areas of the conductive layers 10 is consistent or basically consistent, therefore, the wiring of the conductive layers 10 in the printed circuit board 100 is uniform, further, the structure of the printed circuit board 100 has no difference or very small difference, the properties of the expansion and contraction rate and the like tend to be consistent, the printed circuit board 100 is not easy to deform, the flatness and the performance stability of the printed circuit board 100 are ensured, the welding of parts and the reliability of the whole product are improved, and further, the stability of the performance of the product is ensured.
As shown in fig. 2 to 7, in the present embodiment, the non-attribute line is formed by a plurality of copper foils 14 distributed at intervals, and the distribution of the plurality of copper foils 14 is identical or substantially identical to the distribution of the signal lines 13. The plurality of copper foils 14 distributed at intervals form a non-attribute line, and the distribution mode of the plurality of copper foils 14 is consistent or basically consistent with that of the signal lines 13, so that in the process of manufacturing the printed circuit board 100, the copper foils at the positions where the signal lines 13 are distributed and the plurality of copper foils 14 of the blank area 12 are reserved, and the plurality of copper foils 14 of the blank area 12 play a balance role, so that the wiring distribution of the conductive layer 10 is uniform.
Furthermore, the plurality of copper foils 14 are distributed over the blank area 12, that is, the blank area 12 can be covered with the copper foils 14, so that the area is not large, the structural difference of the printed circuit board 100 is further reduced, and the flatness and the performance stability of the printed circuit board 100 are effectively improved.
As shown in fig. 2 and fig. 3, in this embodiment, the blank region 12 has a first sub-region 121 and a second sub-region 122 which are symmetrically arranged, and the distribution manner of the plurality of copper foils 14 distributed in the first sub-region 121 is symmetrical or substantially symmetrical to the distribution manner of the plurality of copper foils 14 distributed in the second sub-region 122, so that the first sub-region 121 and the second sub-region 122 which are symmetrically arranged are symmetrical in structure, and the uniformity of the wiring of the conductive layer 10 is further improved, and the flatness and the performance stability of the printed circuit board 100 are further improved. Further, the blank region 12 has a plurality of groups of first sub-regions 121 and second sub-regions 122 symmetrically arranged, and the distribution manner of the plurality of copper foils 14 of the first sub-regions 121 symmetrically arranged and the distribution manner of the plurality of copper foils 14 of the second sub-regions 122 symmetrically arranged in each group are both symmetrically or substantially symmetrically arranged, so that the wiring uniformity of the conductive layer 10 is further improved, and the flatness and the performance stability of the printed circuit board 100 are ensured.
In this embodiment, the plurality of copper foils 14 are uniformly spaced, that is, the distance between any two adjacent copper foils 14 is uniform, which is beneficial to improving the uniformity of the wiring of the conductive layer 10 and is easy to manufacture.
In this embodiment, the printed circuit board 100 has at least one set of two symmetrically disposed conductive layers 10, and the plurality of copper foils 14 on the at least one set of two symmetrically disposed conductive layers 10 are distributed in a uniform or substantially uniform manner. Further, the distribution of the plurality of copper foils 14 on each conductive layer 10 is identical or substantially identical to the distribution of the plurality of copper foils 14 on the conductive layer 10 symmetrically arranged with respect to the conductive layer 10.
As shown in fig. 2 to 7, the printed circuit board 100 has a set of two conductive layers 10 symmetrically arranged, the two conductive layers 10 are a top layer and a bottom layer, respectively, the top layer is described as a surface layer 101, and the bottom layer is described as a bottom layer 102. The surface layer 101 and the bottom layer 102 are symmetrically arranged, the surface layer 101 and the bottom layer 102 can be provided with signal lines 13 and placing parts, and the upper surface of the surface layer 101 and the lower surface of the bottom layer 102 are respectively provided with an ink layer 30 for insulation to protect the signal lines 13. The surface layer 101 is distributed with a plurality of copper foils 14, guarantee that the wiring of surface layer 101 is even, the bottom layer 102 also distributes and has a plurality of copper foils 14, guarantee that the wiring of bottom layer 102 is even, and the distribution mode of a plurality of copper foils 14 of surface layer 101 is unanimous or basically unanimous with the distribution mode of a plurality of copper foils 14 of bottom layer 102, make the structure symmetry of surface layer 101 and bottom layer 102, and then guarantee that whole printed circuit board 100's structure does not have the difference or the difference is very little, printed circuit board 100 non-deformable, guarantee the roughness and the stability of performance of whole circuit board.
As shown in fig. 1, the printed circuit board 100 has a four-layer structure, i.e., a top layer, an in2 layer 103, an in3 layer 104, and a bottom layer, wherein the in2 layer 103 is described as a second layer and the in3 layer 104 is described as a third layer. The surface layer 101 and the bottom layer 102 are symmetrically arranged, the second layer and the third layer are symmetrically arranged, the surface layer 101 and the bottom layer 102 can be provided with signal lines 13 and placing parts, and the second layer and the third layer can be provided with signal lines 13. In order to ensure that the structure of the whole circuit board has no difference or small difference, the distribution mode of the plurality of copper foils 14 of the surface layer 101 is consistent or basically consistent with the distribution mode of the plurality of copper foils 14 of the bottom layer 102, and the distribution mode of the plurality of copper foils 14 of the second layer is consistent or basically consistent with the distribution mode of the plurality of copper foils 14 of the third layer.
It should be understood that if the printed circuit board 100 has six or eight or other even-numbered structures, taking six layers as an example for illustration, the six-layered structures are the surface layer 101, the second layer, the third layer, the fourth layer, the fifth layer and the sixth layer, respectively, wherein the surface layer 101 and the bottom layer 102 are symmetrically arranged, the second layer and the fifth layer are symmetrically arranged, the third layer and the fourth layer are symmetrically arranged, the surface layer 101 and the bottom layer 102 can be arranged with the signal lines 13 and the placing parts, and the second layer, the third layer, the fourth layer and the fifth layer can be arranged with the signal lines 13. In order to ensure that the structure of the whole circuit board has no difference or small difference, the distribution mode of the plurality of copper foils 14 of the surface layer 101 is consistent or basically consistent with that of the plurality of copper foils 14 of the bottom layer 102, the distribution mode of the plurality of copper foils 14 of the second layer is consistent or basically consistent with that of the plurality of copper foils 14 of the fifth layer, and the distribution mode of the plurality of copper foils 14 of the third layer is consistent or basically consistent with that of the plurality of copper foils 14 of the fourth layer.
It should be noted that, if the printed circuit is a three-layer structure or other odd-numbered layer structure, taking three layers as an example for description, the three layers are respectively a surface layer 101, a middle layer and a bottom layer 102, the surface layer 101 and the bottom layer 102 may be provided with signal lines 13 and placement components, and the middle layer may be provided with signal lines 13. The surface layer 101 and the bottom layer 102 are symmetrically arranged, and the middle layer is positioned between the surface layer 101 and the bottom layer 102, so that the distribution mode of the plurality of copper foils 14 of the surface layer 101 is consistent or basically consistent with that of the plurality of copper foils 14 of the bottom layer 102, and the distribution of the plurality of copper foils 14 of the middle layer is uniform.
In the printed circuit board 100 of the present invention, the shape of the copper foil 14 is circular, oval, triangular, rectangular, rhombic, trapezoidal, or hexagonal. As shown in fig. 2, in the first embodiment, the shape of the copper foil 14 is circular, the plurality of copper foils 14 of the surface layer 101 are arranged over the blank area 12 in an array, the plurality of copper foils 14 of the bottom layer 102 are arranged over the blank area 12 in an array, and the distribution pattern of the plurality of copper foils 14 of the surface layer 101 and the distribution pattern of the plurality of copper foils 14 of the bottom layer 102 are substantially identical. In the second embodiment shown in fig. 3 and the third embodiment shown in fig. 4, the copper foil 14 is circular in shape; as a fourth embodiment shown in fig. 5, the copper foil 14 is triangular in shape; as a fifth embodiment shown in fig. 6, the copper foil 14 is square in shape; in the sixth embodiment shown in fig. 7, the copper foil 14 is trapezoidal in shape; in the second to sixth embodiments, the plurality of copper foils 14 of the surface layer 101 are uniformly distributed over the blank region 12, the plurality of copper foils 14 of the bottom layer 102 are uniformly distributed over the blank region 12, and the distribution of the plurality of copper foils 14 of the surface layer 101 and the distribution of the plurality of copper foils 14 of the bottom layer 102 are substantially the same.
In other embodiments, the copper foil 14 may have other irregular shapes, the shape of the copper foil 14 is not limited in the present invention, and the shape of the copper foil 14 and the distribution manner of the copper foil 14 may be flexibly set according to actual needs.
In this embodiment, the distance between the wireless attribute line and the signal line 13 is not less than 0.2mm, so that a safety distance is ensured between the wireless attribute line and the signal line 13, and interference with the signal line 13 is avoided, and in the surface layer 101 and the bottom layer 102, the distance between the wireless attribute line and the part is not less than 0.2mm, so that a safety distance is ensured between the wireless attribute line and the part, and interference with the part is avoided. The present embodiment does not limit the distance between the non-attribute line and the signal line 13 and the distance between the non-attribute line and the component, and the distance between the attribute line and the signal line 13 and the distance between the non-attribute line and the component can be flexibly set according to actual needs.
As shown in fig. 1, in the embodiment, the printed circuit board 100 is provided with a via hole 40 for the signal line 13 to pass through, the via hole 40 is communicated with each conductive layer 10, and the inner wall of the via hole 40 can be plated with copper. The wiring holes 40 are arranged to realize the connection between the signal lines 13 of different conductive layers 10 of the printed circuit board 100.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications and equivalents of the present invention, which are made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. The printed circuit board comprises conducting layers and insulating layers which are arranged in a stacked mode, wherein the insulating layers are arranged between any two adjacent conducting layers, and the printed circuit board is characterized in that a signal area is formed on the conducting layers, a blank area is formed in the conducting layers except the signal area, a signal line is arranged in the signal area, a non-attribute line is arranged in the blank area, and the distribution mode of the non-attribute line is consistent with or basically consistent with that of the signal line.
2. The printed circuit board of claim 1, wherein the non-attribute line is formed of a plurality of copper foils spaced apart from each other, the plurality of copper foils being arranged in a manner that is identical or substantially identical to the signal line.
3. The printed circuit board of claim 2, wherein a plurality of said copper foils extend over said margin.
4. The printed circuit board of claim 3, wherein the blank area has a first subregion and a second subregion that are symmetrically disposed, and wherein the plurality of copper foils distributed in the first subregion are distributed symmetrically or substantially symmetrically to the plurality of copper foils distributed in the second subregion.
5. The printed circuit board of claim 2, wherein a plurality of said copper foils are evenly spaced.
6. The printed circuit board of claim 2, wherein said printed circuit board has at least one set of two symmetrically disposed conductive layers, and wherein said plurality of copper foils are disposed in a uniform or substantially uniform pattern on at least one set of two symmetrically disposed conductive layers.
7. The printed circuit board of claim 6, wherein the plurality of copper foils on each conductive layer are distributed in a manner that is consistent or substantially consistent with the plurality of copper foils on the conductive layer that are symmetrically disposed with respect to the conductive layer.
8. The printed circuit board of claim 2, wherein the copper foil is circular, oval, triangular, rectangular, diamond-shaped, trapezoidal, or hexagonal in shape.
9. The printed circuit board of any of claims 1-8, wherein a spacing between the non-attribute line and the signal line is not less than 0.2 mm.
10. The printed circuit board of any one of claims 1-8, wherein the printed circuit board defines via holes for the signal lines to pass through, the via holes communicating with the conductive layers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011005854.0A CN111935902A (en) | 2020-09-23 | 2020-09-23 | Printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011005854.0A CN111935902A (en) | 2020-09-23 | 2020-09-23 | Printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111935902A true CN111935902A (en) | 2020-11-13 |
Family
ID=73335174
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011005854.0A Pending CN111935902A (en) | 2020-09-23 | 2020-09-23 | Printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111935902A (en) |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1612669A (en) * | 2003-10-27 | 2005-05-04 | 明基电通股份有限公司 | Printed circuit board capable of preventing high temperature warping |
| CN101547555A (en) * | 2009-05-05 | 2009-09-30 | 福建星网锐捷网络有限公司 | Printed circuit board |
| US20120211267A1 (en) * | 2008-04-18 | 2012-08-23 | Zhen Ding Technology Co., Ltd. | Printed circuit board substrate |
| CN203340411U (en) * | 2013-07-24 | 2013-12-11 | 深圳市华星光电技术有限公司 | Multilayer printed circuit board |
| CN204179105U (en) * | 2014-10-24 | 2015-02-25 | 佛山市国星光电股份有限公司 | A kind of circuit base plate with equilibrium stress |
| CN105491787A (en) * | 2016-01-01 | 2016-04-13 | 广州兴森快捷电路科技有限公司 | Single-layer circuit board, high-layer circuit board and fabrication method of high-layer circuit board |
| CN108112168A (en) * | 2018-01-25 | 2018-06-01 | 郑州云海信息技术有限公司 | A kind of thickness copper coin internal layer non-functional pad design adding method |
| CN108293302A (en) * | 2015-11-30 | 2018-07-17 | 株式会社村田制作所 | Multilayer ceramic substrate and electronic unit |
| CN109041460A (en) * | 2018-10-18 | 2018-12-18 | 莆田市涵江区依吨多层电路有限公司 | A kind of control method that multi-layer PCB board module product plate is stuck up |
| CN110246825A (en) * | 2011-03-16 | 2019-09-17 | 东芝存储器株式会社 | Semiconductor device and system |
-
2020
- 2020-09-23 CN CN202011005854.0A patent/CN111935902A/en active Pending
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1612669A (en) * | 2003-10-27 | 2005-05-04 | 明基电通股份有限公司 | Printed circuit board capable of preventing high temperature warping |
| US20120211267A1 (en) * | 2008-04-18 | 2012-08-23 | Zhen Ding Technology Co., Ltd. | Printed circuit board substrate |
| CN101547555A (en) * | 2009-05-05 | 2009-09-30 | 福建星网锐捷网络有限公司 | Printed circuit board |
| CN110246825A (en) * | 2011-03-16 | 2019-09-17 | 东芝存储器株式会社 | Semiconductor device and system |
| CN203340411U (en) * | 2013-07-24 | 2013-12-11 | 深圳市华星光电技术有限公司 | Multilayer printed circuit board |
| CN204179105U (en) * | 2014-10-24 | 2015-02-25 | 佛山市国星光电股份有限公司 | A kind of circuit base plate with equilibrium stress |
| CN108293302A (en) * | 2015-11-30 | 2018-07-17 | 株式会社村田制作所 | Multilayer ceramic substrate and electronic unit |
| CN105491787A (en) * | 2016-01-01 | 2016-04-13 | 广州兴森快捷电路科技有限公司 | Single-layer circuit board, high-layer circuit board and fabrication method of high-layer circuit board |
| CN108112168A (en) * | 2018-01-25 | 2018-06-01 | 郑州云海信息技术有限公司 | A kind of thickness copper coin internal layer non-functional pad design adding method |
| CN109041460A (en) * | 2018-10-18 | 2018-12-18 | 莆田市涵江区依吨多层电路有限公司 | A kind of control method that multi-layer PCB board module product plate is stuck up |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7645944B2 (en) | Printed circuit board for high-speed electrical connectors | |
| CN103906364B (en) | A kind of processing method of buried resistor in printed circuit board | |
| EP1720384B1 (en) | Printed circuit board | |
| US20130175077A1 (en) | Printed circuit board with reduced cross-talk | |
| US8648668B2 (en) | Electrical impedance precision control of signal transmission line for circuit board | |
| CN111935902A (en) | Printed circuit board | |
| US9635752B2 (en) | Printed circuit board and electronic device | |
| CN105101642A (en) | Method for increasing area of metal foils of multiple layers of printed circuit boards (PCB) and multiple layers of PCBs | |
| CN103338590A (en) | Flexible circuit board and manufacturing method thereof | |
| CN209914166U (en) | Array pad differential wiring structure and connector package | |
| US20050237126A1 (en) | Printed wiring board | |
| JP2007073956A (en) | Printed circuit board assembly and electronic device utilizing it | |
| US6365839B1 (en) | Multi-layer printed circuit board with dual impedance section | |
| CN213462429U (en) | Plate to be drilled and printed circuit board | |
| CN111385965B (en) | Printed circuit board | |
| CN210225885U (en) | Circuit board and circuit board via hole structure | |
| CN210537028U (en) | Printed circuit board and electronic equipment | |
| CN211580280U (en) | Circuit board | |
| CN215420899U (en) | PCB structure that multilayer soft board and multilayer hard board combine | |
| CN218450730U (en) | Circuit board for improving interlayer and layer alignment | |
| CN210928143U (en) | PCB board that radiating effect is good | |
| AU2018101061A4 (en) | Novel anti-collision and anti-bending PCB | |
| CN216673383U (en) | Wiring via hole structure for high-frequency and high-speed signals | |
| CN216120829U (en) | Circuit board and socket | |
| CN218735224U (en) | LCP (liquid Crystal display) embedded type inductance circuit board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20201113 |