CN1612669A - Printed circuit board capable of preventing high temperature warping - Google Patents
Printed circuit board capable of preventing high temperature warping Download PDFInfo
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- CN1612669A CN1612669A CN 200310102613 CN200310102613A CN1612669A CN 1612669 A CN1612669 A CN 1612669A CN 200310102613 CN200310102613 CN 200310102613 CN 200310102613 A CN200310102613 A CN 200310102613A CN 1612669 A CN1612669 A CN 1612669A
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- circuit board
- printed circuit
- pcb
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Abstract
A printing circuit board (PCB) comprises at least a plastic base plate and at least a wiring layer formed on the plastic layer. The at least wiring layer possesses a first wiring zone and second wiring zone. Wiring density in the first wiring zone is higher than wiring density in the second wiring zone. There is a pseudo wiring arrangement on the second wiring zone in order to prevent heated PCB from warp.
Description
Technical field
The invention provides a kind of printed circuit board (PCB), particularly relate to and a kind ofly can when high temperature, reduce the printed circuit board (PCB) that warpage takes place because of the inequality of being heated.
Background technology
No matter any now electronic product, all essential (printed circuit board PCB) comes embedding to carry various electronics spare parts by printed circuit board (PCB).So the good and bad or durable degree of the performance of an electronic product has very big relation with quality, the design quality of printed circuit board (PCB).In the past, the printed circuit board (PCB) industry has been a mature industry, but because the development of electronic product trend " light, thin, short, little " and " many merits, quick, high energy, at a low price ", impel printed circuit board (PCB) also to move towards the trend of high density, aperture, fine rule, slim, multilayer.
See also Fig. 1, Fig. 1 is the schematic diagram of existing printed circuit board (PCB) 10.Earlier the simplest lamina of structure is seen among the printed circuit board (PCB) 10.Printed circuit board (PCB) 10 comprises a substrate (substrate) 12 and a wiring layer 14.The substrate 12 of printed circuit board (PCB) 10 generally is heat insulation by insulation, and unbending plastic material is made.And the tiny circuit that the surface of printed circuit board (PCB) 10 is seen is wiring layer 14.In general, wiring layer 14 is formed by Copper Foil.In manufacture process, Copper Foil is to cover on the substrate 12 of whole printed circuit board (PCB) 10 originally, and after through development, etch processes, the part that stays has just become the wiring layer 14 of tiny circuit formation.These circuits are that the circuit that is used to provide part on the printed circuit board (PCB) 10 connects, to be used for transmitting signal or power supply.Because wiring layer 14 all is positioned at the same side of substrate 12 with electronic component, so be referred to as lamina.And wiring layer 14 then is referred to as doubling plate when being distributed in the different both sides of substrate 12.
Because the circuit bulky complex day by day of required by electronic product now is so individual layer or double-layer printing circuit board are inapplicable gradually.In order to solve such problem, multilayer board just arises at the historic moment.See also Fig. 2, Fig. 2 is the exploded view of multilayer board 20.Printed circuit board (PCB) 20 comprises a plurality of substrate 12a-12d, and Copper Foil is to cover on each substrate 12a-12d to pass through after development, the etch processes again, can form wiring layer 14 respectively on a plurality of substrate 12a-12d.Afterwards, more a plurality of substrate 12a-12d hot pressing is formed multilayer board 20.Show four substrates at Fig. 2, in fact any circuit board of being made up of plural substrate all classifies as multilayer board 20.
See also Fig. 2 and Fig. 3.Fig. 3 is the schematic diagram of formed printed circuit board (PCB) 20 after substrate 12a, 12b, 12c, the 12d hot pressing of Fig. 2.For the needs that design, the wiring layer 14 on each substrate distributes not necessarily uniform.For ease of explanation, printed circuit board (PCB) 20 can be divided into the first wiring region 18a, 18b, 18c, 18d and the second wiring region 16a, 16b, 16c, 16d.As shown in Figure 2, the wiring density of the second wiring region 16a of substrate 12a, the 12b of printed circuit board (PCB) 20,12c, 12d correspondence, 16b, 16c, 16d is lower than the first wiring region 18a, 18b, 18c, 18d.The zone that is noted that so-called high and low wiring density here is to judge from the angle of printed circuit slab integral.Therefore, suppose that the regional 16c of the printed circuit board (PCB) 20 of Fig. 2 also is furnished with circuit, but the average wiring density of the whole first wiring region 18a, 18b, 18c, 18d still is higher than the average wiring density of the second wiring region 16a, 16b, 16c, 16d.Because printed circuit board (PCB) needs to handle through multiple high temp reflow (reflow) in manufacture process, and the wiring layer 14 that is made of copper and the thermal coefficient of expansion of plastic base 12 are very different, thus, at high temperature, have the first wiring region 18a, 18b, 18c, the 18d of higher wiring density big because of the second wiring region 16a, 16a, 16c, the 16d of the low wiring density of degree of thermal expansion, this makes printed circuit board (PCB) 20 whole suffered stress can produce drop.The uneven result that is heated causes the second wiring region 16a, 16b, 16c, the 16d of printed circuit board (PCB) 20 low wiring densities with respect to the first wiring region 18a, 18b, 18c, the 18d of high wiring density warpage to take place, as shown in Figure 3.Concerning the electronic equipment of precision, printed circuit board (PCB) 20 warpage a little all can cause assembling to go up error and puzzlement.At this moment, the producer must spend many time modification layout designs again, so that the circuit layout of each substrate 12a, 12b, the last wiring layer 14 of 12c, 12d can be evenly distributed, this spends the more time again and goes to revise design and test, and causes the delay of product time-histories.So how when the circuit layout of designing printed circuit board, can be a problem that urgency is to be solved with fast and simple mode avoids the low-density wiring layer zone of printed circuit board (PCB) 20 that the trouble that warpage causes assembling takes place in manufacture process.
Summary of the invention
Therefore, the object of the present invention is to provide a kind of printed circuit board (PCB) that warpage takes place can avoid high temperature the time, to address the above problem.
The object of the present invention is achieved like this, and a kind of printed circuit board (PCB) promptly is provided, and it comprises at least one plastic base and at least one wiring layer, is formed on this at least one plastic base.Have one first wiring region and one second wiring region on this at least one wiring layer, the wiring density of this first wiring region is higher than the wiring density of this second wiring region.Have a false configuration on this second wiring region, be used for avoiding this printed circuit board (PCB) that the phenomenon of warpage takes place when heating.
The invention has the advantages that this configuration when high temperature, can make the wiring layer distribution of printed circuit board (PCB) comparatively even, to avoid taking place the problem of warpage because of the inequality of being heated.And the design that this configuration is set is very simple, need not spend extra time and go to rearrange the layout of whole wiring layer.
Description of drawings
Fig. 1 is the schematic diagram of existing single-layer printed circuit plate;
Fig. 2 is the exploded view of existing multilayer board;
Fig. 3 is the schematic diagram of formed printed circuit board (PCB) after the substrate hot pressing of Fig. 2;
Fig. 4 is the decomposing schematic representation of printed circuit board (PCB) of the present invention;
Fig. 5 is the schematic diagram of the configuration of Fig. 4.
Embodiment
See also Fig. 4, Fig. 4 is the decomposing schematic representation of printed circuit board (PCB) 40 of the present invention.With Fig. 2 person that has the same numeral, its function is all identical with purpose, does not repeat them here among Fig. 4.Printed circuit board (PCB) 40 comprises a plurality of plastic base 12a, 12b, 12c, 12d and a plurality of wiring layer 14, is formed on plastic base 12a, 12b, 12c, the 12d.In general, the material of wiring layer 14 is copper (copper).
Carry as the prior art part, because printed circuit board (PCB) in manufacture process, can run into the step of repeatedly reflow (reflow).High temperature during reflow can cause the warpage of printed circuit board (PCB), so be compared to the printed circuit board (PCB) 20 of Fig. 2, printed circuit board (PCB) 40 of the present invention is provided with the false configuration 46 of a correspondence at the regional 16b of second wiring region of low wiring density, and it is not to be used for transmission signals and power supply.Owing to the reason of printed circuit board (PCB) 20 warpages is that the average wiring density of the second wiring region 16a, 16b, 16c, 16d is lower than the average wiring density of the first wiring region 18a, 18b, 18c, 18d, so when high temperature, the first wiring region 18a of the second wiring region 16a, 16b, 16c, 16d and the high wiring density of low wiring density, 18b, 18c, the 18d meeting of being heated between the two is inhomogeneous.And the existence of false configuration 46 just can increase the average wiring density of the second wiring region 16a, 16b, 16c, 16d integral body.So the purpose of false configuration 46 configurations is to make the average wiring density of the second wiring region 16a, 16b, 16c, 16d be increased, and the warpage when avoiding printed circuit board (PCB) 40 to cause high temperature because of the circuit skewness.
Following consideration can be done in the position that false configuration 46 is set.At first find out the zone that warpage can take place printed circuit board (PCB) 40 when high temperature through different test programs.Certainly, in general, betide the second wiring region 16a, 16b, 16c, 16d mostly with low-density wiring.Next, on the circuit layout of original design, in position (layout) false configuration 46 is set, as shown in Figure 4 corresponding to the second wiring region 16a, 16b, 16c, 16d, zone 16b is provided with a false configuration 46, and that the width of false configuration 46 is about 1 centimetre (mm) is wide.Certainly, one of them is provided with false configuration 46 to the warpage degree that also can look printed circuit board (PCB) 20 at other regional 16a, 16c, 16d, or in plural zone false configuration 46 is set all.Afterwards again according to comprising the new printed circuit board (PCB) 40 of circuit layout manufacturing of new false configuration 46, continue again to do test up to the printed circuit board (PCB) 40 that produces till can warpage after the heating.
See also Fig. 5, Fig. 5 is the enlarged drawing of the false configuration 46 of Fig. 4.Among preferred embodiment of the present invention, false configuration 46 is provided with many false circuits that are parallel to each other to form a netted configuration, its characteristics are that the distance of the adjacent parallel line of the false circuit that this respectively is parallel to each other is about 5mil (0.125mm), and the live width of this each circuit is about 5mil (0.125mm).The distance of certain adjacent parallel line and live width might not be confined to 5mil, and 3mil, 4mil or 6mil also are admissible sizes.Circuit on this false circuit and the general wiring layer 14 is as good as, and just its effect is used to make printed circuit board (PCB) 40 energy thermally equivalents purely, does not do the transmission of power supply or holding wire.Use the benefit of netted configuration to be, printed circuit board (PCB) can not only be corrected its flexibility, simultaneously because this netted circuit itself forms electric loop, so can not increase the electromagnetic interference (EMI) effect.Certainly, if the structure of false configuration 46 is also not necessarily netted, other can be used for suitably making that the configuration of printed circuit board (PCB) 40 energy thermally equivalents also belongs to category of the present invention when high temperature.In addition, the arrangement of configuration also can be looked the warpage degree of printed circuit board (PCB) and do suitably to adjust, and for example increases the area or the length of configuration.In addition, in the present embodiment, false configuration 46 is isolated with holding wire and power line on the printed circuit board (PCB) 40, yet, false configuration 46 can be not yet with printed circuit board (PCB) 40 on holding wire and power line isolated, as long as false configuration 46 does not influence the operation of the electronic building brick on the printed circuit board (PCB) 40, all belong to category of the present invention.
Be compared to prior art.Printed circuit board (PCB) of the present invention is set up a false configuration, and it is used for reducing the warpage issues that printed circuit board (PCB) takes place in the high temperature manufacture process, and the printed circuit board (PCB) that needn't worry warpage thus causes the difficulty in the assembling.In addition, because false configuration is that this configuration directly is set at least one wiring layer in a plurality of wiring layers, so needn't increase extra hardware or plan that again wiring layer just can proofread and correct the error of warpage.This false configuration can not increase electromagnetic interference yet or influence the opering characteristic of electric apparatus of original printed circuit board (PCB) simultaneously, is a simple cost-effective design simultaneously in fact.
The above only is preferred embodiment of the present invention, and all doing according to claim of the present invention helped impartial the variation and modification, all should belong to the covering scope of patent of the present invention.
Claims (11)
1. printed circuit board (PCB), it comprises:
At least one plastic base; And
At least one wiring layer, be formed on this at least one plastic base, have one first wiring region and one second wiring region on this at least one wiring layer, the wiring density of this first wiring region is higher than the wiring density of this second wiring region, have a false configuration on this second wiring region, be used for avoiding this printed circuit board (PCB) that the phenomenon of warpage takes place when heating.
2. printed circuit board (PCB) as claimed in claim 1, wherein holding wire and the power line on this false configuration and this printed circuit board (PCB) is isolated.
3. printed circuit board (PCB) as claimed in claim 1, wherein this false configuration has many false circuits, and this each false circuit is not done the usefulness of power supply or signal transmission.
4. printed circuit board (PCB) as claimed in claim 3, wherein this each false circuit is parallel netted staggered.
5. printed circuit board (PCB) as claimed in claim 4, wherein the distance of the adjacent parallel line of this each false circuit is about 5mil (0.125mm).
6. printed circuit board (PCB) as claimed in claim 4, wherein the live width of this each false circuit is about 5mil (0.125mm).
7. method that forms a printed circuit board (PCB) is characterized in that:
One false configuration is set on this printed circuit board (PCB), the phenomenon of warpage takes place when heating to avoid this printed circuit board (PCB).
8. method as claimed in claim 7, wherein this false configuration is made up of many false circuits.
9. method as claimed in claim 8, wherein this each false circuit be with this printed circuit board (PCB) on holding wire and the power line mode of isolating be formed on this printed circuit board (PCB).
10. method as claimed in claim 7, wherein the distance of the adjacent parallel line of this each false circuit is about 5mil (0.125mm).
11. method as claimed in claim 7, wherein the live width of this each false circuit is about 5mil (0.125mm).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200310102613 CN1612669A (en) | 2003-10-27 | 2003-10-27 | Printed circuit board capable of preventing high temperature warping |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200310102613 CN1612669A (en) | 2003-10-27 | 2003-10-27 | Printed circuit board capable of preventing high temperature warping |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1612669A true CN1612669A (en) | 2005-05-04 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200310102613 Pending CN1612669A (en) | 2003-10-27 | 2003-10-27 | Printed circuit board capable of preventing high temperature warping |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101621894B (en) * | 2008-07-04 | 2011-12-21 | 富葵精密组件(深圳)有限公司 | Printed circuit board (PCB) assembly method and printed circuit board preformed product |
| CN111935902A (en) * | 2020-09-23 | 2020-11-13 | 歌尔股份有限公司 | Printed circuit board |
-
2003
- 2003-10-27 CN CN 200310102613 patent/CN1612669A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101621894B (en) * | 2008-07-04 | 2011-12-21 | 富葵精密组件(深圳)有限公司 | Printed circuit board (PCB) assembly method and printed circuit board preformed product |
| CN111935902A (en) * | 2020-09-23 | 2020-11-13 | 歌尔股份有限公司 | Printed circuit board |
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