The application claims the priority of three Chinese patent applications with application dates of 5 and 7 in 2019 and application number of 201910377312.7, application dates of 5 and 8 in 2019 and application number of 201910381102.5, application dates of 5 and 14 in 2019 and application number of 201910400593.3, and the entire contents of the three priority documents are incorporated in the application by reference.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without any inventive step, are within the scope of protection of the invention.
In one aspect, the present application provides a heterojunction solar cell. Referring to fig. 1-3, the heterojunction solar cell comprises: the solar cell comprises a silicon substrate 1, a first intrinsic passivation layer 2, a first doping layer 3, a front transparent conductive layer 5 and a front metal electrode 7, wherein the first intrinsic passivation layer, the first doping layer and the front transparent conductive layer 5 are sequentially formed on the front surface of the silicon substrate 1; and a second intrinsic passivation layer 8, a second doping layer 4, a semi-transparent and semi-reflective functional layer 6 and a back metal electrode 9 on the semi-transparent and semi-reflective functional layer 6 are sequentially formed on the back of the silicon substrate 1.
The front surface of the silicon substrate is referred to as a light receiving surface, and the back surface of the silicon substrate is referred to as a backlight surface. The first doped layer may be an n-type doped layer, in which case the second doped layer is correspondingly a p-type doped layer. Of course, the first doped layer may be a p-type doped layer, and in this case, the second doped layer is correspondingly an n-type doped layer. In the embodiment shown in fig. 1-3 of the present application, the first doped layer 3 is an n-type doped layer and the second doped layer 4 is a p-type doped layer.
The structure of each layer of the heterojunction solar cell is described in detail below.
The silicon substrate 1 may be a single crystal silicon substrate or a polycrystalline silicon substrate. In one embodiment of the present application, the silicon substrate is an n-type single crystal silicon wafer having a thickness of 1 μm to 130 μm, and may be, for example, 20 μm, 40 μm, 70 μm, 100 μm, or 120 μm. The silicon substrate may have a resistivity of 0.1 to 10 Ω · cm, for example, 0.5 Ω · cm, 3 Ω · cm, 5 Ω · cm, or 8 Ω · cm.
As mentioned above, the thickness of the silicon substrate used in the current heterojunction solar cell is generally 150 μm to 200 μm, and the silicon substrate is thick, so that the weight of the finally produced heterojunction solar cell reaches about 8 to 11g, i.e. the gram weight of each watt of the cell is 1.56 to 2.37g/W, and the finally produced heterojunction solar cell cannot enter the light solar application fields such as aerospace, stratospheric airship, unmanned aerial vehicle, space station and the like. Moreover, the battery is generally a fragile product, has small bending radian and cannot be applied to the field of flexible solar energy. In the application, the thickness of the silicon substrate is reduced to 1-130 μ M, the weight of a single piece of the heterojunction solar cell is greatly reduced, the weight of a single piece of the M2 (the size of a silicon wafer is 156.75mm on a side and 210mm in diameter) is reduced to be below 8g, and the gram weight of each watt of cell is reduced to be below 1.5g/W, so that the heterojunction solar cell can be applied to the field of light solar energy application. In addition, the thickness of the silicon substrate is reduced, so that the overall thickness of the finally manufactured heterojunction solar cell is reduced, the finally manufactured heterojunction solar cell has the characteristics of ultrathin thickness and large-radian bending, and can be applied to the field of flexible solar energy, and the application range of the heterojunction solar cell is further expanded.
The first and second intrinsic passivation layers 2 and 8 are intrinsic amorphous silicon thin film layers, and may be, for example, single-layer or multi-layer structures of a-Si: H (i) thin film, a-SiOx: H (i) thin film, and a-SiC: H (i) thin film. It should be noted that a thicker intrinsic passivation layer may increase the series resistance of the solar cell, and at the same time, may hinder the penetration of sunlight, resulting in a short-circuit current and a deterioration of the overall efficiency; while a thinner intrinsic passivation layer weakens the built-in electric field, resulting in a deterioration of the open circuit voltage. Therefore, the thickness of the intrinsic passivation layer needs to be precisely controlled. In the present application, the thickness of the first and second intrinsic passivation layers 2 and 8 is set to be less than 10nm, and may be, for example, 2nm, 4nm, 6nm, 8 nm.
The first doped layer 3 is an n-type amorphous silicon film or an n-type microcrystalline silicon film, and may be, for example, an a-Si: H (n) film or a μ c-SiOx: H (n) film. If the thickness of the n-type doped layer is too large, the series resistance of the solar cell increases, and the transmission of sunlight is inhibited, which causes deterioration of short-circuit current and overall efficiency; if the thickness of the n-type doped layer is too small, a built-in electric field with sufficient strength cannot be formed, resulting in deterioration of the open-circuit voltage; therefore, in the present embodiment, the thickness of the n-type doped layer is set to be less than 30nm, and may be, for example, 5nm, 10nm, 15nm, 20nm, 25 nm.
The second doped layer 4 is p-type amorphous silicon or microcrystalline silicon thin film, and may be a-Si: H (p) thin film or μ c-Si: H (p) thin film, for example. The thickness of the p-type doped layer is set to be less than 30nm, and may be, for example, 5nm, 10nm, 15nm, 20nm, or 25 nm.
The front transparent conductive layer 5 is a transparent conductive oxide layer, and may be a single-layer or multi-layer structure of Indium Tin Oxide (ITO), tungsten-doped indium oxide (IWO), cerium-doped indium oxide (ICO), aluminum-doped zinc oxide (AZO), or the like. The thickness of the front transparent conductive layer 5 may be in a range of 50-150nm, for example, 60nm, 80nm, 100nm, 120nm, or 140 nm.
The semi-transparent and semi-reflective functional layer 6 comprises at least one back transparent conductive layer and at least one metal layer, and the back transparent conductive layer is in contact with the second doped layer 4. The semi-transparent and semi-reflective functional layer 6 mainly has the main functions of transmitting light with a short wave band (<700nm) and reflecting light with a long wave band (>900nm) by utilizing the different refractive indexes of the transparent conductive layer and the metal layer on the back surface, so that stray light on the back surface of the battery absorption assembly is not influenced, the light with the long wave band transmitted to the back surface of the battery can be reflected and utilized again, and the short-circuit current density of the battery is improved. Moreover, the metal layer improves the transverse conductivity of the back electrode, reduces resistance loss and improves the filling factor of the battery. Through setting up this half anti semi-permeable functional layer, can promote battery efficiency for the efficiency of the heterojunction solar cell who finally makes reaches more than 23%.
In the semi-transparent and semi-reflective functional layer 6, the number of the transparent conductive layers on the back surface is at least one, and the number of the metal layers is at least one. And when the number of the layers of the back transparent conductive layer is more than two, or the number of the layers of the back transparent conductive layer and the metal layer is more than two, the back transparent conductive layer and the metal layer are alternately arranged.
Referring to fig. 1, an embodiment is shown, in which the back transparent conductive layer is a layer and the metal layer is a layer, i.e., the transflective functional layer 6 is composed of a back transparent conductive layer 61 'and a metal layer 62'. Referring to fig. 2, another embodiment is shown, in which the back transparent conductive layer is two layers and the metal layer is one layer, and in this case, the back transparent conductive layer and the metal layer are alternately disposed. That is, the transflective functional layer 6 is composed of the first back surface transparent conductive layer 61, the metal layer 62', and the second back surface transparent conductive layer 63 in this order, which are in contact with the second doped layer 4. For another example, fig. 3 shows another embodiment, in which the back transparent conductive layer is two layers, and the metal layer is also two layers, in this case, the back transparent conductive layer and the metal layer are alternately disposed. That is, the transflective functional layer 6 is composed of a first back surface transparent conductive layer 61, a first metal layer 62, a second back surface transparent conductive layer 63, and a second metal layer 64 in this order, which are in contact with the second doped layer 4.
It can be understood by those skilled in the art that, in addition to the three structure diagrams shown in fig. 1 to 3, the semi-transparent and semi-reflective function 6 of the heterojunction solar cell of the present application may also be a five-layer structure or a structure with more than five layers, and the specific number of layers may be changed as needed, and only the transparent conductive layer and the metal layer on the back surface need to be alternately arranged. As shown in fig. 1-3, in this embodiment, the back transparent conductive layer completely covers the second doped layer 4, and the metal layer completely covers the back transparent conductive layer.
The thickness of the semi-transparent semi-reflective functional layer 6 is 0.008% -60% of the thickness of the silicon substrate, for example, when the thickness of the silicon substrate is 1 μm-130 μm, the thickness of the semi-transparent semi-reflective functional layer 6 is set to 10nm-600 nm. The thickness of the metal layer is not preferably set to be thick in consideration of light transmission. Therefore, the sum of the thicknesses of the metal layers is set to 0.004% to 10% of the thickness of the silicon substrate. For example, the sum of the thicknesses of the back transparent conductive layers is set to 5nm to 500nm, and the sum of the thicknesses of the metal layers is set to 5nm to 100 nm.
When the back transparent conductive layer and the metal layer are both one layer, the thickness of the back transparent conductive layer is 5nm-500nm, and the thickness of the metal layer is 5nm-100 nm. In the embodiment shown in fig. 1, the back transparent conductive layer is a layer, and the metal layer is a layer, at this time, the thickness of the back transparent conductive layer is 5nm to 500nm, and the thickness of the metal layer is 5nm to 100 nm.
When the back transparent conductive layer is two or more layers, the sum of the thicknesses of the back transparent conductive layers is 5nm-500 nm. The metal layers are two or more layers, and the sum of the thicknesses of the metal layers is 5nm-100 nm. In the embodiment shown in fig. 2, the sum of the thicknesses of the first back transparent conductive layer 61 and the second back transparent conductive layer 63 is 5nm to 500nm, and the thickness of the metal layer 62' is 5nm to 100 nm. In the embodiment shown in fig. 3, the sum of the thicknesses of the first back transparent conductive layer 61 and the second back transparent conductive layer 63 is 5nm to 500nm, and the sum of the thicknesses of the first metal layer 63 and the second metal layer 64 is 5nm to 100 nm.
When the back transparent conductive layer is two or more layers, the thickness of each layer of back transparent conductive layer can be the same or different, as long as the sum of the thicknesses of the layers of back transparent conductive layer meets the requirement of 5nm-500 nm. For example, in the embodiment shown in fig. 3, the sum of the thicknesses of the back transparent conductive layers is 160nm, in this case, the thicknesses of the first back transparent conductive layer 61 and the second back transparent conductive layer 63 may be both set to 80nm, or the thickness of the first back transparent conductive layer 61 may be set to 70nm and the thickness of the second back transparent conductive layer 63 may be set to 90 nm. Similarly, when the metal layer has two or more layers, the thicknesses of the metal layers may be the same or different, as long as the sum of the thicknesses satisfies 5nm to 100 nm. In the embodiment shown in fig. 3, the sum of the thicknesses of the metal layers is 18nm, and in this case, the thicknesses of the first metal layer 62 and the second metal layer 64 may be set to 9nm, or the thickness of the first metal layer 62 may be set to 6nm, and the thickness of the second metal layer 64 may be set to 12 nm.
The back transparent conductive layer is also a transparent conductive oxide layer. Preferably, the back transparent conductive layer has a work function of 4.5eV or more to lower a contact barrier of the back transparent conductive layer/second doped layer. Specifically, the back transparent conductive layer may be an indium tin oxide layer (ITO), an indium tungsten doped oxide layer (IWO), an indium cerium doped oxide layer (ICO), or an aluminum doped zinc oxide layer (AZO). In view of production cost, the metal in the metal layer may be made of a common metal material such as silver (Ag), aluminum (Al), or copper (Cu). Of course, it will be understood by those skilled in the art that other metallic materials are suitable for use in the present application, such as nickel.
When the back transparent conductive layer is a plurality of layers, the materials of the layers may be the same or different. When the metal layer is a plurality of layers, the material of each layer may be the same or different. For example, in the embodiment shown in fig. 3, the first back transparent conductive layer 61 is an ITO layer, the second back transparent conductive layer 63 is an AZO layer, the first metal layer 62 is an Ag layer, and the second metal layer 64 is Ag.
The front metal electrode 7 and the back metal electrode 9 are used for collecting and leading out photo-generated current, and may be silver electrodes, copper electrodes, and the like. Specifically, the front metal electrode 7 and the back metal electrode 9 are metal grid lines respectively formed on the front transparent conductive layer and the semi-transparent and semi-reflective functional layer by means of screen printing. More specifically, the metal gate line may include a main gate line and a fine gate line for collecting electrons or holes generated by photoexcitation and transferring the collected electrons or holes to the main gate line. The thin grid lines can be provided with a plurality of thin grid lines which are distributed uniformly and densely.
On the other hand, the application also provides a preparation method of the heterojunction solar cell. As shown in fig. 4, the method for manufacturing the heterojunction solar cell includes the following steps:
first, step S100 is performed: a first intrinsic passivation layer is formed on a front surface of a silicon substrate, and a first doping layer is formed on the first intrinsic passivation layer.
Specifically, the first intrinsic passivation layer may be deposited on the front surface of the silicon substrate using Plasma Enhanced Chemical Vapor Deposition (PECVD) or Hot Wire Chemical Vapor Deposition (HWCVD), and the first doped layer may be deposited on the first intrinsic passivation layer. The silicon substrate is an n-type monocrystalline silicon wafer, and has a thickness of 1 μm to 130 μm, for example, 20 μm, 40 μm, 70 μm, 120 μm, or 100 μm. The first intrinsic passivation layer is an intrinsic amorphous silicon thin film layer, and the thickness of the first intrinsic passivation layer is less than 10nm, and can be 2nm, 4nm, 6nm and 8nm, for example. The first doped layer may be an n-type doped layer or a p-type doped layer. When the first doping layer is an n-type doping layer, the first doping layer is specifically an n-type amorphous silicon film or an n-type microcrystalline silicon film; when the first doping layer is a p-type doping layer, the first doping layer is specifically a p-type amorphous silicon film or a p-type microcrystalline silicon film. The thickness of the first doped layer is less than 30nm, and may be, for example, 5nm, 10nm, 15nm, 20nm, or 25 nm. It should be understood by those skilled in the art that PECVD and HWCVD are conventional techniques in the field of heterojunction solar cell fabrication, and therefore, detailed operation and process parameters are not described herein.
Preferably, before performing step S100, steps S110 to S130 are further included:
step S110: the silicon substrate is pre-cleaned, and then the silicon substrate is put into alkaline solution to remove a damaged layer on the surface of the silicon substrate.
Step S120: and carrying out surface treatment on the silicon substrate through a texturing process.
It can be understood that incident light can be reflected on the surface of crystalline silicon, and sunlight irradiating the surface of the solar cell cannot be completely utilized, so that the light trapping structure is important for the heterojunction solar cell, and the silicon substrate subjected to the texturing process can form a random pyramid-shaped structure on the surface of the silicon substrate, so that the utilization rate of the sunlight can be improved.
Step S130: and cleaning the silicon substrate after the texturing process to remove particles and metal stains on the surface of the crystal silicon.
After completion of step S100, step S200 is started: and forming a second intrinsic passivation layer on the back surface of the silicon substrate, and forming a second doped layer on the second intrinsic passivation layer.
Specifically, after step S100 is completed, the silicon substrate is moved out of the deposition chamber, turned over, and then the second intrinsic passivation layer is deposited on the back surface of the silicon substrate by using a chemical vapor deposition method such as PECVD or HWCVD, and the second doped layer is deposited on the second intrinsic passivation layer. The second intrinsic passivation layer is an intrinsic amorphous silicon thin film layer, and the thickness of the second intrinsic passivation layer is less than 10nm, and may be, for example, 2nm, 4nm, 6nm, or 8 nm. When the first doping layer is an n-type doping layer, the second doping layer is a p-type doping layer, specifically a p-type amorphous silicon film or a p-type microcrystalline silicon film; when the first doping layer is a p-type doping layer, the second doping layer is an n-type doping layer, specifically an n-type amorphous silicon film or an n-type microcrystalline silicon film. The thickness of the second doped layer is less than 30nm, and may be, for example, 5nm, 10nm, 15nm, 20nm, or 25 nm. It should be understood by those skilled in the art that PECVD and HWCVD are conventional techniques in the field of heterojunction solar cell fabrication, and therefore, detailed operation and process parameters are not described herein.
After completion of step S200, step S300 is started: and forming a front transparent conductive layer on the first doping layer.
A front transparent conductive layer may be formed on the first doped layer using Physical Vapor Deposition (PVD) or remote electron beam deposition (RPD). The thickness of the front transparent conductive layer may be in a range of 50-150nm, for example, 60nm, 80nm, 100nm, 120nm, or 140 nm. It should be understood by those skilled in the art that PVD and RPD are conventional techniques in the field of heterojunction solar cell fabrication, and therefore, detailed operation processes and process parameters are not described herein.
After completion of step S300, step S400 is started: and forming a semi-transparent and semi-reflective functional layer on the second doping layer, wherein the semi-transparent and semi-reflective functional layer comprises at least one back transparent conductive layer and at least one metal layer, and the back transparent conductive layer is in contact with the second doping layer.
Specifically, the transflective functional layer may be formed on the second doping layer by physical vapor deposition, for example, magnetron sputtering deposition. More specifically, the sputtering power is 1-3W/cm when depositing the metal layer2The sputtering pressure is 0.3-0.5Pa, and the sputtering gas is argon; when the back transparent conductive layer is deposited, the sputtering power is 1-3W/cm2The sputtering pressure is 0.3-0.5Pa, the sputtering gas is oxygen and argon, and the flow ratio of the oxygen to the argon is 0.01-0.1. The thickness of the semi-transparent semi-reflective functional layer 6 is set to be 10nm-600 nm. The thickness of the metal layer is not preferably set to be thick in consideration of light transmission. Therefore, the sum of the thicknesses of the back transparent conductive layers is set to 5nm to 500nm, and the sum of the thicknesses of the metal layers is set to 5nm to 100 nm. That is, when the back transparent conductive layer and the metal layer are both one layer, the thickness of the back transparent conductive layer is 5nm to 500nm, and the thickness of the metal layer is 5nm to 100 nm. When the back transparent conductive layer is two or more layers, the sum of the thicknesses of the back transparent conductive layers is 5nm-500 nm. The metal layers are two or more layers, and the sum of the thicknesses of the metal layers is 5nm-100 nm.
Taking the transflective functional layer with the structure shown In fig. 3 as an example, the first back transparent conductive layer 61 is ITO (In)2O3:SnO290:10) layers, thickThe temperature is 70nm, and the square resistance is 200 omega; the first metal layer 62 is an Ag layer with a thickness of 6 nm; the second back transparent conductive layer 63 is an AZO layer with a thickness of 90nm, the second metal layer 64 is an Ag layer with a thickness of 12nm, and the square resistance is 220 Ω. The preparation process of the semi-transparent semi-reflective functional layer is as follows:
sputtering and depositing an ITO layer on the p-type doped layer, wherein the power density of sputtering is 2W/cm2The sputtering pressure is 0.4pa, the sputtering gas is oxygen and argon, and the flow ratio of the oxygen to the argon is 0.095;
sputtering and depositing an Ag layer on the ITO layer, wherein the power density of sputtering is 2W/cm2The sputtering pressure is 0.4pa, the sputtering gas is argon, and the argon flow is 180 sccm;
sputtering and depositing an AZO layer on the Ag layer, wherein the power density of sputtering is 2W/cm2The sputtering pressure is 0.5pa, the sputtering gas is oxygen and argon, and the flow ratio of the oxygen to the argon is 0.013;
sputtering and depositing an Ag layer on the AZO layer, wherein the power density of sputtering is 2W/cm2The sputtering pressure is 0.4pa, the sputtering gas is argon, and the argon flow is 180 sccm.
In the preparation process of the semi-transparent semi-reflective functional layer, the temperature of magnetron sputtering deposition is controlled below 200 ℃, for example, the temperature can be room temperature, 150 ℃, 170 ℃ or below.
Finally, step S500 is performed: and forming a front metal electrode on the front transparent conductive layer, and forming a back metal electrode on the semi-transparent semi-reflective functional layer.
Specifically, a screen printing method may be adopted to prepare metal gate lines on the front transparent conductive layer and the semi-transparent and semi-reflective functional layer to form the front metal electrode and the back metal electrode respectively. It should be understood by those skilled in the art that the screen printing method for preparing the metal gate line is a conventional technique in the field of heterojunction cell preparation, and therefore, the detailed operation process and process parameters are not described herein.
It should be noted that the above steps S100 to S500 are only a schematic illustration of the heterojunction battery preparation method of the present application, and the sequence of the operation steps therein is not strictly limited. For example, a first intrinsic passivation layer may be formed on the front side of the silicon substrate first, and a second intrinsic passivation layer may be formed on the back side of the silicon substrate after the silicon substrate is turned over. And then forming a first doped layer on the first intrinsic passivation layer, and forming a second doped layer on the second intrinsic passivation layer after turning over the silicon substrate. And then forming a front transparent conductive layer on the first doping layer, and forming a semi-transparent and semi-reflective functional layer on the second doping layer after turning over the silicon substrate. And finally, forming a front metal electrode on the front transparent conductive layer, turning over the silicon substrate, and forming a back metal electrode on the semi-transparent semi-reflective functional layer. For another example, the first intrinsic passivation layer, the first doped layer, the front transparent conductive layer and the front metal electrode may be sequentially formed on the front surface of the silicon substrate, and then the silicon substrate may be turned over, and the second intrinsic passivation layer, the second doped layer, the semi-transparent and semi-reflective functional layer and the back metal electrode may be sequentially formed on the back surface of the silicon substrate. In addition, other deposition sequences are also suitable for the present application, as long as the heterojunction cell with the structure of the present application can be finally formed, and the other deposition sequences are not listed.
The application provides a heterojunction solar cell is through setting up semi-transparent semi-reflecting functional layer, and this functional layer is greater than 80% and long wave band (>900nm) light reflectivity to the transmissivity of short wave band (<700nm) light and is greater than 60% to the long wave band light that will reach the silicon chip back is reflected once more and is utilized, promotes the short-circuit current density of battery. In addition, the semi-transparent and semi-reflective functional layer contains the metal layer, and the metal layer can improve the transverse collection capacity of photo-generated holes on the back electrode, reduce resistance loss and improve the filling factor of the cell. Thereby, a heterojunction solar cell having a cell efficiency of 23% or more is finally obtained. Meanwhile, in the heterojunction solar cell, the thickness of the silicon substrate is 1-130 μm, so that the thickness of the finally manufactured cell is greatly reduced, the cell is ultrathin and can be bent in a large radian, and compared with the conventional heterojunction solar cell which can only be bent in a small radian, the heterojunction solar cell has very obvious application advantages.
In still another aspect, the present application further provides a solar cell module. Fig. 6 and 7 are schematic structural diagrams of the solar cell module, and as shown in fig. 6 or 7, the solar cell module includes a first flexible thin film layer 11, a first hot melt adhesive film layer 12, a flexible heterojunction solar cell 13, a second hot melt adhesive film layer 14, and a second flexible thin film layer 15, which are sequentially stacked, wherein the thickness of the flexible heterojunction solar cell 13 is 10 μm to 100 μm.
It is worth mentioning that, in this application the flexible heterojunction solar cell is established ties and/or parallelly connected by a plurality of flexible heterojunction solar cell pieces and forms, and specific flexible heterojunction solar cell's connected mode can include following two kinds.
In a first possible mode, as shown in fig. 6, the plurality of flexible heterojunction solar cells are welded in series and/or in parallel through tinned copper strips, and the thickness of the tinned copper strips is 25 μm-125 μm. The thickness of the solar cell module formed by the connection mode is 170-800 μm, and the power weight of the solar cell module is at least more than 0.30W/g.
In a second possible way, as shown in fig. 7, the plurality of flexible heterojunction solar cells are connected in series and/or in parallel by conductive adhesives, the thickness of the solar cell module in a pair is 140 μm to 600 μm, and the power weight of the solar cell module is at least greater than 0.35W/g.
In the embodiment of the present application, the material of the first flexible film layer 11 and the second flexible film layer 15 is transparent fluoropolymer or PMMA. The transparent fluorine polymer comprises one or more of ECTFE, ETFE and UBSF 512.
Further, the thickness of the first flexible film layer and the second flexible film layer is 25 μm to 100 μm.
Specifically, the first hot melt adhesive film layer and the second hot melt adhesive film layer are made of an ionic crosslinking polymer material or EVA and POE. The thickness of the first hot melt adhesive film layer and the second hot melt adhesive film layer is 25-100 μm.
In summary, the solar cell module realized by using the flexible heterojunction solar cell has the following advantages:
(1) the solar cell can solve the problem of low photoelectric conversion efficiency, the adopted heterojunction solar cell has high structural symmetry, has the characteristics of double-sided power generation, low temperature coefficient, no light attenuation, no potential induced attenuation and the like, and the actual outdoor power generation capacity is higher than that of a common crystalline silicon cell by more than 20%.
(2) The adopted heterojunction solar cell adopts the amorphous silicon thin film deposition technology to manufacture the PN junction, a thinner monocrystalline silicon wafer can be used, the weight of the obtained cell is less than one fifth of that of a common cell, and the power-weight ratio of the manufactured ultra-light heterojunction solar cell module is up to more than 0.35W/g.
(3) The flexible and bendable solar cell module is manufactured by adopting the heterojunction solar cell and the flexible packaging material, and the heterojunction solar cell piece has very good flexibility, and the solar cell module packaged by matching with the ultrathin and flexible polymer material and the adhesive film also has very good flexibility, so that different bending surface designs or applications can be met.
To illustrate the performance of the heterojunction solar cells provided by the present application, the applicant conducted the following test examples.
Test example 1
Test objects:
battery A: heterojunction solar cells of conventional construction. Namely, the heterojunction solar cell includes: the semiconductor device comprises a first intrinsic passivation layer, an n-type doping layer, a front transparent conducting layer and a front metal electrode, wherein the first intrinsic passivation layer, the n-type doping layer and the front transparent conducting layer are sequentially formed on the front surface of a silicon substrate; and the second intrinsic passivation layer, the p-type doping layer, the back transparent conducting layer and the back metal electrode are sequentially formed on the back of the silicon substrate. Wherein the thickness of the silicon substrate is 180 μm, the thicknesses of the first intrinsic passivation layer and the second intrinsic passivation layer are both 8nm, the thicknesses of the n-type doping layer and the p-type doping layer are both 20nm, and the front transparent conductive layer and the back transparent conductive layer are both made of ITO (In) with the thickness of 80nm2O3:SnO290: 10).
Battery B: the only difference compared to cell a is that the thickness of the silicon substrate is 70 μm.
Battery C: a heterojunction solar cell of the structure shown in figure 3 of the present application. Namely, the heterojunction solar cell includes: the semiconductor device comprises a first intrinsic passivation layer, an n-type doping layer, a front transparent conducting layer and a front metal electrode, wherein the first intrinsic passivation layer, the n-type doping layer and the front transparent conducting layer are sequentially formed on the front surface of a silicon substrate; and the second intrinsic passivation layer, the p-type doping layer, the first back transparent conducting layer, the first metal layer, the second back transparent conducting layer and the second metal layer are sequentially formed on the back surface of the silicon substrate, and the back metal electrode is arranged on the second metal layer. And the thicknesses of the first intrinsic passivation layer, the second intrinsic passivation layer, the n-type doped layer, the p-type doped layer and the front transparent conductive layer are all the same as those of the battery A. The silicon substrate had a thickness of 70 μm, and the first back transparent conductive layer was ITO (In) having a thickness of 70nm2O3:SnO290:10), the first metal layer being an Ag layer with a thickness of 6nm, the second back side transparent conductive layer being an AZO layer with a thickness of 90nm, the second metal layer being an Ag layer with a thickness of 12 nm.
A battery D: the only difference compared to cell C is that the thickness of the silicon substrate is 120 μm.
A battery E: the only difference compared to cell C is that the thickness of the silicon substrate is 40 μm.
Photoelectric conversion efficiency (Eta) and open circuit voltage (V) for the cells A to EOC) Short-circuit current (J)SC) And Fill Factor (FF), as shown in table 1 below.
Table 1:
type of battery
|
Eta[%]
|
VOC[mV]
|
JSC[mA/cm2]
|
FF[%]
|
Battery A
|
23.65
|
739.7
|
38.63
|
82.79
|
Battery B
|
22.90
|
747.9
|
37.25
|
82.19
|
Battery C
|
23.42
|
749.5
|
37.86
|
82.54
|
Battery D
|
23.35
|
748.7
|
37.69
|
82.75
|
Battery E
|
23.53
|
750.8
|
37.95
|
82.58 |
As can be seen from table 1, the photoelectric conversion efficiency of the heterojunction solar cell C-E of the present application is very different from that of the cell a of the conventional structure, but the cell a can only be bent in a small arc due to the thicker silicon substrate, while the cell C-E has flexibility due to the greatly reduced silicon substrate thickness, and can be bent in a large arc (i.e., one side of the cell C-E is connected to, i.e., surrounded, by another side). Cell B can also achieve a large curvature due to the same thickness of the silicon substrate as cell C, but the photoelectric conversion efficiency of cell B is significantly less than that of cells C-E. Therefore, the battery C-E provided by the application can realize large-radian bending while ensuring high photoelectric conversion efficiency, and has the characteristics of ultrathin property, flexibility and high efficiency.
It is worth mentioning that the weight of the single piece of the battery C is 5.38g, which is converted to a gram weight of 0.95g/W per watt of the battery. The technical advantages of the heterojunction solar cell of the present application are self evident compared to the monolithic weight (8-11g) of the existing heterojunction solar cells.
Test example 2
The reflectance of the back transparent conductive layer of the cell B and the reflectance of the transflective functional layer of the cell C were measured by a comparative test, and fig. 5 shows a reflectance comparison curve of the two. As can be seen from fig. 5, the transflective functional layer of cell C has a transmittance of more than 80% for short wavelength band (<700nm) light and a reflectance of more than 60% for long wavelength band (>900nm) light, while cell B is almost completely non-reflective for wavelength band >500nm light. Compared with the battery B, the battery C can reflect and utilize the long-wave band light reaching the back surface of the silicon wafer again, and the short-circuit current density of the battery is improved.
Therefore, compared with a single-layer transparent conductive layer, the laminated structure of the transparent conductive layer and the metal layer can improve the short-circuit current density of the battery. Moreover, the metal layer can improve the transverse collection capability of the photo-generated holes on the back electrode, reduce resistance loss and improve the Fill Factor (FF) of the cell. Finally, the stack structure of the transparent conductive layer and the metal layer improves the efficiency of the cell.
To sum up, the heterojunction solar cell's that this application provided battery efficiency reaches more than 23%, and battery monolithic weight greatly reduced can realize big radian simultaneously and crooked, has ultra-thin, flexibility, efficient advantage concurrently. Compare in the higher manufacturing cost of current flexible solar cell, the solar cell low in production cost of this application can realize extensive volume production.
It should be understood that the terms "first," "second," and the like, as used herein, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another.
Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.