CN114744055B - Solar cell and contact structure, battery assembly and photovoltaic system thereof - Google Patents
Solar cell and contact structure, battery assembly and photovoltaic system thereof Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022466—Electrodes made of transparent conductive layers, e.g. TCO, ITO layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0684—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells double emitter cells, e.g. bifacial solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Abstract
The application is applicable to the technical field of solar cells and provides a solar cell, a contact structure thereof, a cell assembly and a photovoltaic system. The contact structure of the solar cell includes: a doped region disposed on the silicon substrate; the surface passivation layer is arranged on the doped region and is provided with a first opening region; the functional layer is arranged on the first opening area, and a second opening area is arranged on the functional layer; and a metal electrode disposed on the second opening region. Thus, the functional layer can not only generate a blocking effect, but also serve as seeds to realize the preparation of the metal electrode. Furthermore, the functional layer and the metal electrode are firmly bonded, so that the adhesiveness between the metal electrode and the solar cell is improved.
Description
Technical Field
The application belongs to the technical field of solar cells, and particularly relates to a solar cell, a contact structure of the solar cell, a cell assembly and a photovoltaic system.
Background
Solar cell power generation is a sustainable clean energy source that uses the photovoltaic effect of semiconductor p-n junctions to convert sunlight into electrical energy.
The related art solar cell is generally provided with a metal electrode on a transparent conductive film to increase the output of current conducted to the metal electrode. Specifically, the photo-generated carriers in the solar cell can flow to the metal electrode through the transparent conductive film, so that the residence time of the photo-generated carriers in the cell is reduced, and the current output can be more effectively performed. However, the adhesion between the metal electrode and the transparent conductive film is poor, and the metal electrode is easily separated from the solar cell.
Based on this, how to design the contact structure of the solar cell to improve the adhesion of the metal electrode is a technical problem to be solved.
Disclosure of Invention
The application provides a solar cell, a contact structure thereof, a cell assembly and a photovoltaic system, and aims to solve the problem of how to design the contact structure of the solar cell so as to improve the adhesiveness of a metal electrode.
In a first aspect, the present application provides a contact structure for a solar cell. The contact structure of the solar cell includes:
a doped region disposed on the silicon substrate;
the surface passivation layer is arranged on the doped region, and a first opening region is arranged on the surface passivation layer;
The functional layer is arranged on the first opening area, and a second opening area is arranged on the functional layer; and
And a metal electrode disposed on the second opening region.
In a second aspect, the present application provides a solar cell. The solar cell is a back contact cell, the back contact cell comprises a silicon substrate, a first contact area and a second contact area, the polarities of the first contact area and the second contact area are opposite and are alternately arranged on the back surface of the silicon substrate, and the first contact area and/or the second contact area adopt any contact structure.
In a third aspect, the present application provides a solar cell. The solar cell is a double-sided contact cell, the double-sided contact cell comprises a silicon substrate, a third contact area and a fourth contact area, the polarities of the third contact area and the fourth contact area are opposite and are respectively arranged on the front side and the back side of the silicon substrate, and the third contact area and/or the fourth contact area adopt the contact structure of any one of the above.
In a fourth aspect, the present application provides a cell assembly comprising a solar cell as described in any one of the preceding claims.
In a fifth aspect, the present application provides a photovoltaic system comprising a cell assembly as described in any one of the preceding claims.
In the solar cell, the contact structure thereof, the cell assembly and the photovoltaic system, the functional layer is arranged in the first opening area formed in the surface passivation layer, and the metal electrode is arranged in the second opening area formed in the functional layer, so that the functional layer can not only generate a blocking effect, but also serve as seeds to realize the preparation of the metal electrode. Furthermore, the functional layer and the metal electrode are firmly bonded, so that the adhesiveness between the metal electrode and the solar cell is improved.
Drawings
Fig. 1 is a schematic structural view of a solar cell according to an embodiment of the present application;
fig. 2 is a schematic structural view of a solar cell according to another embodiment of the present application;
fig. 3-6 are schematic structural diagrams of contact structures of solar cells according to various embodiments of the present application.
Description of main reference numerals:
the back contact cell 1001, the double-sided contact cell 1002, the contact structure 100, the silicon substrate 101, the doped region 10, the first doped layer 11, the first passivation layer 12, the second doped layer 13, the second passivation layer 14, the third doped layer 15, the surface passivation layer 20, the first opening region 21, the functional layer 30, the second opening region 31, the metal electrode 40, the first conductive portion 41, the second conductive portion 42.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In the related art, the adhesiveness of the metal electrode is poor, and the functional layer is arranged in the first opening area formed in the surface passivation layer and the metal electrode is arranged in the second opening area formed in the functional layer, so that the functional layer can not only generate a blocking effect, but also serve as a seed to realize the preparation of the metal electrode. Furthermore, the functional layer and the metal electrode are firmly bonded, so that the adhesiveness between the metal electrode and the solar cell is improved.
Example 1
The photovoltaic system of the embodiment of the present application includes the battery assembly of the second embodiment.
In the photovoltaic system of the embodiment of the application, the functional layer is arranged in the first opening area formed in the surface passivation layer and the metal electrode is arranged in the second opening area formed in the functional layer due to the contact structure of the solar cell in the cell assembly, so that the functional layer can not only generate a blocking effect, but also serve as seeds to realize the preparation of the metal electrode. Furthermore, the functional layer and the metal electrode are firmly bonded, so that the adhesiveness between the metal electrode and the solar cell is improved.
Specifically, the photovoltaic system may further include a junction box connecting the battery modules and an inverter connecting the junction box. It can be understood that the battery assembly converts solar energy into direct current, the direct current and the alternating current are converged through the converging box, the voltage grade of the photovoltaic system connected to the power station is determined after direct current and alternating current of the inverter are inverted, and the voltage is boosted by the transformer and then is inserted into a medium-voltage or high-voltage power grid.
Other explanations and illustrations of this embodiment are made to other parts of this document, and are not repeated here to avoid redundancy.
Example two
The battery pack of the embodiment of the present application includes the solar cell of the third embodiment or the fourth embodiment.
In the battery assembly of the embodiment of the application, the functional layer is arranged in the first opening area formed in the surface passivation layer and the metal electrode is arranged in the second opening area formed in the functional layer due to the contact structure of the solar battery, so that the functional layer can not only generate a blocking effect, but also serve as seeds to realize the preparation of the metal electrode. Furthermore, the functional layer and the metal electrode are firmly bonded, so that the adhesiveness between the metal electrode and the solar cell is improved.
In particular, the battery assembly may further include photovoltaic glass, adhesive gel, solder strips, back sheet, silicone and junction boxes. The photovoltaic glass may have a light transmittance of greater than 92%. The adhesive colloid comprises EVA or POE, has good light transmittance and aging resistance, and is used for bonding the photovoltaic glass and the solar cell into a whole. The solder strip can be copper solder strip used for connecting solar cells in series and conducting current. The backboard is positioned on the back of the solar cell, plays a role in protecting and supporting the solar cell, and has reliable insulativity, water resistance and aging resistance. The silica gel can seal photovoltaic glass and solar cells, is waterproof and dampproof, bonds battery pack and frame, protects battery pack and reduces the impact of external force. The junction box can be used for connecting and protecting the battery assembly and conducting current generated by the battery assembly out for users to use.
Other explanations and illustrations of this embodiment are made to other parts of this document, and are not repeated here to avoid redundancy.
Example III
Referring to fig. 1, the solar cell in the embodiment of the present application is a back contact cell 1001, where the back contact cell 1001 includes a silicon substrate 101, a first contact region 110 and a second contact region 120, the first contact region 110 and the second contact region 120 are opposite in polarity and are alternately disposed on the back surface of the silicon substrate 101, and the first contact region 110 and/or the second contact region 120 adopts the contact structure 100 in the fifth embodiment.
In the solar cell of the embodiment of the application, the contact structure 100 is provided with the functional layer in the first opening area formed in the surface passivation layer and the metal electrode in the second opening area formed in the functional layer, so that the functional layer can not only generate a blocking effect, but also serve as a seed to realize the preparation of the metal electrode. Furthermore, the functional layer and the metal electrode are firmly bonded, so that the adhesiveness between the metal electrode and the solar cell is improved.
Specifically, the front surface of the silicon substrate 101 may be provided with a front surface passivation layer. The explanation and description of this portion will be made with reference to the following description of the surface passivation layer, and will not be repeated here to avoid redundancy.
Specifically, in the example of fig. 1, the first contact region 110 and the second contact region 120 each employ the contact structure 100 in embodiment five.
Specifically, one of the first contact region 110 and the second contact region 120 is a P-type contact region, and the other is an N-type contact region.
It will be appreciated that in other examples, the contact structure 100 of embodiment five may be employed by the first contact region 110, and the contact structure 100 of embodiment five may not be employed by the second contact region 120; the first contact region 110 may also be formed without the contact structure 100 of the fifth embodiment, and the second contact region 120 may be formed with the contact structure 100 of the fifth embodiment.
Other explanations and illustrations of this embodiment are made to other parts of this document, and are not repeated here to avoid redundancy.
Example IV
Referring to fig. 2, the solar cell in the embodiment of the present application is a double-sided contact cell 1002, where the double-sided contact cell 1002 includes a silicon substrate 101, a third contact region 130 and a fourth contact region 140, the third contact region 130 and the fourth contact region 140 are opposite in polarity and are disposed on the front surface and the back surface of the silicon substrate 101, respectively, and the third contact region 130 and/or the fourth contact region 140 adopts the contact structure 100 in the fifth embodiment.
In the solar cell of the embodiment of the application, the contact structure 100 is provided with the functional layer in the first opening area formed in the surface passivation layer and the metal electrode in the second opening area formed in the functional layer, so that the functional layer can not only generate a blocking effect, but also serve as a seed to realize the preparation of the metal electrode. Furthermore, the functional layer and the metal electrode are firmly bonded, so that the adhesiveness between the metal electrode and the solar cell is improved.
Specifically, the front surface of the silicon substrate 101 may be provided with a front surface passivation layer. The explanation and description of this portion will be made with reference to the following description of the surface passivation layer, and will not be repeated here to avoid redundancy.
Specifically, in the example of fig. 2, the third contact region 130 and the fourth contact region 140 each employ the contact structure 100 in embodiment five.
Specifically, one of the third contact region 130 and the fourth contact region 140 is a P-type contact region, and the other is an N-type contact region.
It will be appreciated that in other examples, the third contact region 130 may employ the contact structure 100 of embodiment five, and the fourth contact region 140 may not employ the contact structure 100 of embodiment five; the third contact region 130 may also be implemented without the contact structure 100 of the fifth embodiment, and the fourth contact region 140 may be implemented with the contact structure 100 of the fifth embodiment.
Other explanations and illustrations of this embodiment are made to other parts of this document, and are not repeated here to avoid redundancy.
Example five
Referring to fig. 3, a contact structure 100 of a solar cell according to an embodiment of the present application includes: a doped region 10 disposed on the silicon substrate 101; a surface passivation layer 20 disposed on the doped region 10, the surface passivation layer 20 having a first opening region 21 disposed thereon; a functional layer 30 disposed on the first opening region 21, the functional layer 30 being provided with a second opening region 31; and a metal electrode 40 disposed on the second opening region 31.
In the contact structure 100 of the solar cell in the embodiment of the application, the functional layer 30 is disposed in the first opening area 21 formed in the surface passivation layer 20, and the metal electrode 40 is disposed in the second opening area 31 formed in the functional layer 30, so that the functional layer 30 can not only generate a blocking effect, but also serve as a seed to realize the preparation of the metal electrode 40. Further, this makes the functional layer 30 more firmly bonded to the metal electrode 40, thereby improving the adhesion of the metal electrode 40 to the solar cell.
It can be understood that the functional layer 30 has a compact structure, and can block diffusion of the metal electrode 40, and the functional layer 30 has a better electroplating effect due to the conductive effect under the combined action of the seed layer and the functional layer during electroplating.
Specifically, the silicon substrate 101 has a front side that faces the sun and a back side that faces away from the sun during normal operation. The front surface is the light receiving surface of the solar cell, and the back surface is arranged on the other side of the silicon substrate 101, which is away from the front surface. That is, the front surface and the back surface are located on opposite sides of the silicon substrate 101. In the present embodiment, the silicon substrate 101 is an N-type single crystal silicon wafer. It will be appreciated that in other embodiments, the silicon substrate 101 may be a polycrystalline silicon wafer or a quasi-monocrystalline silicon wafer, and the silicon substrate 101 may be a P-type silicon wafer. As such, the silicon substrate 101 may be provided according to actual use needs, and the specific form of the silicon substrate 101 is not limited here.
Alternatively, the front surface of the silicon substrate 101 may be formed with an anti-reflection structure. Such as random pyramid structures, inverted pyramid structures, spherical cap structures, V-groove structures. The anti-reflection structure may be formed by texturing the front surface of the silicon substrate 101. Thus, the reflection of sunlight on the front surface can be reduced, and the photoelectric conversion efficiency can be improved.
Alternatively, the back surface of the silicon substrate 101 may be a polished surface. For example, an alkaline polished surface, an acid polished surface, a mechanical polished surface, and the like.
Referring to fig. 3, the width of the first opening region 21 is optionally 30 μm to 2000 μm. For example 30 μm, 32 μm, 50 μm, 100 μm, 800 μm, 1000 μm, 1300 μm, 1500 μm, 2000 μm. In this way, the width of the first opening region 21 is made to be in a proper range, providing a sufficient space for the functional layer 30 and the second opening region 31.
Preferably, the width of the first opening area 21 is 800 μm to 1200 μm. For example 800 μm, 850 μm, 900 μm, 960 μm, 1000 μm, 1100 μm, 1150 μm, 1200 μm.
Specifically, the first opening area 21 may be elongated, and the doped region 10 and the surface passivation layer 20 enclose a groove; alternatively, the surface passivation layer 20 is provided with a plurality of spaced through holes, and the plurality of spaced through holes form the first opening region 21.
Further, the bottom surface of the groove may be rectangular. Thus, the grooves are regular, which facilitates the manufacture of the grooves on the surface passivation layer 20 and the placement of the functional layer 30 in the grooves. It will be appreciated that in other embodiments, the bottom surface of the groove may be elliptical, racetrack, or other irregular shape.
In particular, a plurality of spaced vias may be located on the same line. Thus, the plurality of through holes are regular in shape, which facilitates the fabrication of the through holes on the surface passivation layer 20 and the arrangement of the functional layer 30 in the through holes. It is understood that in other embodiments, the plurality of spaced vias may not be in the same line.
Referring to fig. 3, the functional layer 30 may alternatively include a semiconductor film or a conductive film. In this way, the functional layer 30 can conduct electricity, and the photo-generated carriers generated inside the solar cell can flow not only directly to the metal electrode 40, but also to the metal electrode 40 through the functional layer 30, so that the residence time of the photo-generated carriers inside the solar cell can be reduced, and the current output can be more effectively performed.
Specifically, the semiconductor film is a doped semiconductor film. Such as doped polysilicon, doped amorphous silicon, doped silicon carbide, and the like.
Specifically, the conductive film is a transparent conductive film, and the transparent conductive film is one or more of an ITO film, an AZO film, a GZO film, an FTO film, an IWO film and a graphene film. Thus, the transparent conductive film has high transmittance and can reduce reflection, and can reduce loss of sunlight. Thus, the photoelectric conversion efficiency is advantageously improved.
For example, the transparent conductive film is an ITO thin film; as another example, the transparent conductive film includes a laminated ITO film and AZO film; for another example, the transparent conductive film includes a GZO film, an FTO film, and an IWO film, which are laminated. The specific form of the conductive film is not limited herein.
Optionally, the functional layer 30 has a thickness of less than 200nm. For example, 0.2nm, 1nm, 10nm, 30nm, 50nm, 80nm, 100nm, 150nm, 190nm, 199nm. In this way, the thickness of the functional layer 30 is made to be in a proper range, thereby ensuring the blocking effect, the seed effect, and the adhesion effect of the functional layer 30.
Preferably, the functional layer 30 has a thickness in the range of 80nm to 120nm. For example 80nm, 85nm, 90nm, 96nm, 100nm, 107nm, 110nm, 120nm.
Specifically, the functional layers 30 are continuously distributed in the areas of the first opening area 21 other than the second opening area 31. In this way, the functional layer 30 is brought into sufficient contact with the doped region 10, which is advantageous for sufficiently conducting out the current.
Referring to fig. 3, optionally, the ratio of the area of the second opening area 31 to the area of the first opening area 21 is less than 0.3. For example 0.1, 0.13, 0.15, 0.18, 0.2, 0.21, 0.225, 0.28, 0.29. In this way, an excessively large area occupation ratio of the second opening regions 31 is avoided, and thus the resulting poor effect of the functional layer 30 is avoided.
Preferably, the ratio of the area of the second opening area 31 to the area of the first opening area 21 is 0.13-0.17. For example 0.13, 0.14, 0.15, 0.16, 0.17.
Referring to fig. 3, the second opening area 31 is optionally a continuous recess or a spaced through hole. In other words, the second opening area 31 is elongated, and the doped region 10 and the functional layer 30 enclose a groove; alternatively, the functional layer 30 is provided with a plurality of spaced through holes, and the plurality of spaced through holes form the second opening region 31. In this way, the metal electrode 40 contacts the doped region 10 through the groove or the through hole on the functional layer 30, so that current is led out.
Specifically, the bottom surface of the groove may be rectangular. Thus, the grooves are regular, which facilitates the manufacture of the grooves on the functional layer 30 and the arrangement of the metal electrodes 40 in the grooves. It will be appreciated that in other embodiments, the bottom surface of the groove may be elliptical, racetrack, or other irregular shape.
In particular, a plurality of spaced vias may be located on the same line. Thus, the plurality of through holes are regular, which facilitates the fabrication of the through holes on the functional layer 30 and the arrangement of the metal electrodes 40 in the through holes. It is understood that in other embodiments, the plurality of spaced vias may not be in the same line.
Specifically, the diameter of the through hole is less than 50 μm. For example, 2 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 49 μm.
Preferably, the diameter of the through hole is 20 μm to 30 μm. For example 20 μm, 22 μm, 25 μm, 28 μm, 30 μm.
Referring to fig. 3, the metal electrode 40 may alternatively include a seed layer and a metal layer, and the seed layer is located between the metal layer and the doped region. In this way, the seed layer may form a lot of core centers on the doped region 10, avoiding island-like distribution of metal without the seed layer, which may result in a more uniform distribution of the metal layer in the second opening region 31.
Specifically, the metal layer is one or more of magnesium, copper, tin, aluminum, silver, gold, chromium, iron, nickel, zinc, ruthenium, palladium, and platinum. For example, the metal layer is aluminum; as another example, the metal layer is a stack of aluminum and silver; for another example, the metal layer is a laminate of aluminum, silver, and gold.
Specifically, the metal electrodes 40 are continuously distributed in the second opening area 31. In this way, the metal electrode 40 is fully contacted with the doped region 10, which is beneficial to fully drawing current.
Specifically, the seed layer is one or more of copper, tin, aluminum, silver, gold, chromium, iron, nickel, zinc, ruthenium, palladium, and platinum. For example, the seed layer is copper; as another example, the seed layer is a stack of copper and tin; for another example, the seed layer is a stack of copper, tin, and aluminum.
Specifically, the seed layer can also be an alloy material, the seed layer comprises a main component and a strengthening component, the main component is one or more metals with the wavelength range of 850-1200 and the average refractive index of less than 2, the strengthening component comprises any one or more of molybdenum (Mo), nickel (Ni), titanium (Ti), tungsten (W), chromium (Cr), manganese (Mn), palladium (Pd), bismuth (Bi), niobium (Nb), tantalum (Ta), protactinium (Pa), silicon (Si) and vanadium (V), the main component comprises any one or more of aluminum (Al), silver (Ag), copper (Cu) and magnesium (Mg), and the content of the main component is more than 50 percent.
Therefore, the seed layer formed by fusing the main component and the strengthening component has stronger bonding force with the metal layer and the silicon substrate, and the light trapping effect of the solar cell is improved.
The wavelengths of the main components are, for example, 850, 880, 900, 950, 1000, 1100, 1200. The average refractive index of the main component is, for example, 1.9, 1.8, 1.7, 1.6, 1.5, 1.4, 1.3, 1.2, 1.1. The content of the main component is, for example, 51%, 55%, 60%, 70%, 80%, 90%, 100%.
Further, the main component is aluminum (Al), and the content is more than or equal to 70 percent. For example, 70%, 72%, 75%, 80%, 85%, 90%, 95%, 100%. The strengthening component is one or more of molybdenum (Mo), nickel (Ni), titanium (Ti) and tungsten (W), and the content is less than or equal to 30 percent. For example, 30%, 29%, 25%, 20%, 15%, 10%, 5%, 100%.
In the prior art, ni (nickel) is generally adopted as a barrier layer for Cu (copper) diffusion, and meanwhile, a silicon substrate and a Cu electrode can be well adhered, and the implementation scheme is as follows: the silicon substrate after being prepared for coating, laser film opening, ni electroplating and Cu electroplating. However, in the research process, it is found that a larger defect exists in the Ni serving as a Cu barrier layer, the long-wave-band reflection effect is lower, the light trapping effect of the battery is reduced, and the conversion efficiency of the battery is further reduced.
The comparative data of the optical properties of the battery using Ni+Cu and Ag as electrode materials are shown in the following table:
As can be seen from the above table, the combination of Ni+Cu greatly reduces the short-circuit current of the battery, wherein the simulation result predicts that the short-circuit current density will be reduced by 0.75mA/cm 2 The experimental result is reduced by 1.36mA/cm 2 Is larger than would be theoretically predicted.
The following we analyze the common metal trapping effects:
at present, the thickness of the finished battery silicon wafer is about 150um, light with the wavelength of more than 850nm can effectively penetrate through the thickness, and meanwhile, because the forbidden bandwidth of Si is 1.12eV, light with the wavelength of more than 1200nm is difficult to excite electron hole pairs, so that the light trapping effect is considered to be mainly focused on the wave band of 850-1200 nm. The following table shows the interfacial reflectivities of the different metals and the market price found in 2 months 2022:
as can be seen from the table, the interface reflectivity difference between different metals is larger, wherein four metals of Ag/Al/Cu/Mg can obtain relatively ideal short-circuit current results, and can form effective light trapping effects in the seed layer; further analysis: cu cannot be applied as a seed layer, since one important function of the seed layer is to block Cu; mg chemistry is too reactive and not a good choice; the price of Ag is higher and is not a good choice; al is an ideal seed layer metal with excellent back reflectivity effect, relatively stable chemical properties, and low cost, 1/223 of Ag and 1/3 of Cu.
However, a simple Al metal is used as a seed layer, which introduces another problem: the adhesion between Al and other metals is weaker, and the technology of using pure Al as a seed layer can lead the reliability of the product not to reach the standard, and the stress of welding spots can lead the Al to be separated from the outer metal in cold-hot alternation or bending or component welding, thereby generating falling and causing failure.
The bonding force between Al and Cu is poor, and the grid line formed into a sheet is easy to fall off. To solve this problem, we have tried various improvement methods, such as increasing the contact area of Al/silicon substrate, heating the sample to promote intermetallic interdiffusion, inserting new materials such as TiW between Al/Cu materials, etc., none of which is ideal; finally, it is found that if a strengthening component capable of forming good interconnection with Cu is added to the Al material as a seed layer, no additional annealing treatment is required even after Cu electroplating, i.e., good seed layer/electroplated layer cross-connection has been formed, thereby greatly improving the adhesion of the electroplated layer, and finally solving the problem.
Experiments prove that the four strengthening components Ni, mo, ti, W have obvious adhesive force improving effect.
Further, we know from the table that the four materials Ni, mo, ti, W have lower reflectivity, and if too much is added, the optical performance is reduced, wherein taking W as an example, we simply assume that the performance of the alloy component is a reinforced average value of the components, and the following estimation results are obtained as shown in the table below:
Wherein the current loss thereof is 0.36mA/cm when the W content is 30% 2 This causes a reduction in the conversion efficiency of the battery of about 0.2%, which is acceptable in view of cost reduction and solving the reliability problem by combining Cu instead of Ag, although it is large, and therefore, it is considered that the reinforcing component is 30% or less as recommended.
Further, the ratio of the strengthening components in the seed layer can be unevenly distributed, so that better performance effect can be obtained, and the principle is as follows: the portion close to the silicon substrate reduces the content of the strengthening component so that the reflection of light can be enhanced, and the portion in contact with the metal layer can relatively contain a higher strengthening component to improve the binding force with the metal layer.
The following table shows the weld pull force comparisons for different electrode technologies:
as can be seen from the table, the tensile force of the grid line of the pure Al seed layer is lower than that of the conventional Ag electrode, and the welding tensile force of the Al and Cu directly inserted into the TiW material is improved, but the defects still exist, and the welding tensile force of the solar cell manufactured by adopting the Al alloy seed layer is even higher than that of the conventional Ag electrode.
Further, the thickness of the seed layer is preferably equal to or greater than 30nm, and experiments show that the seed layer with the thickness of 30nm is sufficient to block the diffusion of Cu metal, but the thickness is equal to or less than 300nm, and the main consideration is to control the cost, for example, the seed layer is manufactured by adopting a physical vapor deposition method, even if the price of Al is lower than that of other metals, the cost effect of an Al target is still not negligible, and in addition, the higher the thickness of the seed layer, the lower the equipment side productivity is, so that the popularization in mass production is not facilitated, and therefore, the seed layer thickness is preferably between 30 and 300 nm.
Referring to fig. 3, optionally, a metal electrode 40 is further disposed on the functional layer 30. In other words, the metal electrode 40 includes the first conductive portion 41 and the second conductive portion 42, the first conductive portion 41 protrudes from the second conductive portion 42 toward the doped region 10, and the first conductive portion 41, the second conductive portion 42, and the doped region 10 enclose a gap in which the functional layer 30 is disposed. In this way, the metal electrode 40 is not only disposed on the doped region 10, but also disposed on the functional layer 30, so that the contact between the metal electrode 40 and the functional layer 30 can be increased, and the effect of current guiding is better.
Specifically, the functional layer 30 entirely fills the gaps. In this way, the metal electrode 40 and the functional layer 30 are brought into close contact, so that the effect of current conduction is better, and at the same time, dust and moisture and the like can be prevented from accumulating in the gap.
It will be appreciated that in other embodiments, the functional layer 30 may also partially fill the gaps. Thus, the reflected sunlight may be re-reflected back to the silicon substrate 101 through the metal electrode 40, thereby improving photoelectric conversion efficiency.
Specifically, the first conductive portion 41 completely overlaps the second opening region 31 or is located in the second opening region 31, and the width of the orthographic projection of the second conductive portion 42 on the silicon substrate 10 is larger than the width of the orthographic projection of the first conductive portion 41 on the silicon substrate 10. Thus, the second conductive portion 42 has a wider width, which facilitates the fabrication of the metal electrode 40. It is understood that the region where the first conductive portion 41 contacts the doped region 10 is a conductive contact region.
Specifically, "the first conductive portions 41 completely overlap the second opening regions 31 or are located within the second opening regions 31" means that all the first conductive portions 41 completely overlap the corresponding second opening regions 31; or, all the first conductive portions 41 are located in the corresponding second opening regions 31; or, part of the first conductive portions 41 completely overlap the corresponding second opening regions 31, and part of the first conductive portions 41 are located in the corresponding second opening regions 31.
Specifically, in fig. 3, the first conductive portion 41 is located at an intermediate position of the second conductive portion 42. It will be appreciated that in other embodiments, the first conductive portion 41 may be located at an edge of the second conductive portion 42.
Specifically, the thickness of the first conductive portion 41 is 10nm to 1000nm. For example, 10nm, 12nm, 50nm, 100nm, 300nm, 500nm, 700nm, 980nm, 1000nm.
Specifically, the seed layer thickness is generally less than the first conductive portion 41 thickness.
Specifically, the second conductive portion 42 has a thickness of 1 μm to 800 μm. For example, 1 μm, 2 μm, 10 μm, 50 μm, 100 μm, 300 μm, 500 μm, 780 μm, 800 μm.
Referring to fig. 3, the doped region 10 may alternatively be a single crystal doped layer. Further, the single crystal doped layer may be formed by diffusion, ion implantation, source diffusion, or other processes. It will be appreciated that the doped region 10 is a diffusion structure formed on the silicon substrate 101 by incorporating different types of diffusion sources, and that the doped region 10 is not formed by growing on the basis of the silicon substrate 101, but rather the silicon substrate 101 is partially diffused into the doped region 10. Thus, the doped region 10 has a simple structure, which is beneficial to improving the production efficiency.
Referring to fig. 4, the doped region 10 may alternatively be a passivation contact structure. Specifically, the doped region 10 includes a first doped layer 11, a first passivation layer 12, and a second doped layer 13, which are sequentially stacked. In this way, the passivation contact structure is arranged, and double gettering can be performed through the first doped layer 11 and the second doped layer 13, so that the gettering effect is better.
Specifically, the thickness of the first doped layer 11 ranges from 50nm to 2000nm. For example, 50nm, 51nm, 60nm, 100nm, 500nm, 1000nm, 1500nm, 1900nm, 2000nm. In this way, contact resistance can be reduced and field passivation effects provided.
Specifically, the first doped layer 11 is a doped monocrystalline silicon layer. Further, the first doped layer 11 may be formed by diffusion, ion implantation, source diffusion, or other processes; the first doped layer 11 may also be formed in the silicon substrate 101 by passing the doping source directly through the first passivation layer 12 or through holes in the porous structure when preparing the second doped layer 13.
Specifically, the thickness of the first passivation layer 12 is 0.5nm to 20nm. For example, 0.5nm, 0.6nm, 1nm, 1.5nm, 5nm, 10nm, 12nm, 15nm, 18nm, 20nm.
Specifically, the first passivation layer 12 includes one or more of an oxide layer, a nitride layer, a oxynitride layer, a silicon carbide layer, and an amorphous silicon layer. Further, the oxide layer includes one or more of a silicon oxide layer and an aluminum oxide layer. In this way, an excellent interface passivation effect can be provided.
Further, the silicon carbide layer comprises a hydrogenated silicon carbide layer. In this way, hydrogen in the hydrogenated silicon carbide layer enters the silicon substrate 101 under the action of a diffusion mechanism and a thermal effect, so that dangling bonds on the back surface of the silicon substrate 101 can be neutralized, defects of the silicon substrate 101 are passivated, and therefore, the defect energy level in a forbidden band is reduced, and the probability that carriers enter the second doped layer 13 through the first passivation layer 12 is improved.
Referring to fig. 5, optionally, the first passivation layer 12 has a porous structure, and the first doped layer 11 and/or the second doped layer 13 are/is disposed in a hole region of the first passivation layer 12, and the first doped layer 11 and the second doped layer 13 are connected through the doped hole region. Further, the second doped layer 13 is connected with the silicon substrate 101 through the doped hole region and the first doped layer 11.
In this way, the conductive path is formed in the hole region of the first passivation layer 12, so that the first passivation layer 12 forms a good resistivity, and the sensitivity of the thickness of the first passivation layer 12 to the influence of resistance is reduced, thereby reducing the control requirement on the thickness of the first passivation layer 12. Meanwhile, the first doping layer 11 disposed between the silicon substrate 101 and the first passivation layer 12 may form a separation electric field enhancing surface electron holes, thereby improving a field passivation effect. Meanwhile, since the first doping layer 11 is different from the fermi level of the silicon substrate 101, the first doping layer 11 changes the fermi level, increases the solid concentration of impurities (transition group metals), and may form an additional gettering effect. Meanwhile, the second doped layer 13 is connected with the silicon substrate 101 through the doped hole area and the first doped layer 11 on the porous structure, so that the overall resistance of the prepared battery is further reduced, and the conversion efficiency of the battery is finally improved.
In one example, the hole region has a first doped layer 11 therein, and no second doped layer 13; in another example, the hole region has the second doped layer 13 therein, without the first doped layer 11; in a further example, the hole region has a first doped layer 11 and a second doped layer 13. In addition, the first doped layer 11 and/or the second doped layer 13 may fill one or more holes, may fill a portion of one or more holes, and may have a portion of holes not filled in the first doped layer 11 and the second doped layer 13. The specific doping form of the hole region is not limited here.
It will be appreciated that in other embodiments, the first passivation layer 12 may also be a completely continuous structure. In other words, the first passivation layer 12 may not include holes.
Optionally, the average pore size of the pores of the first passivation layer 12 is less than 1000nm. For example, 4nm, 10nm, 16nm, 50nm, 480nm, 830nm, 960nm, 999nm. Thus, the average pore diameter of the porous structure is nano-scale, so that the overall contact area of the second doped layer 13 with the silicon substrate 101 is greatly reduced, and recombination losses can be reduced. Further, the average pore size of the porous structure is less than 500nm. In this way, the overall contact area of the second doped layer 13 with the silicon substrate 101 is further reduced, thereby further reducing recombination losses. Still further, 90% of the vias may have an average pore size of less than 1000nm. Therefore, a certain floating space is provided, the product yield can be ensured, the production efficiency is improved, and the additional processes such as laser perforation and the like are not required to be added under the condition of ensuring less composite loss, so that the preparation process is simple.
Optionally, the area of the hole region of the first passivation layer 12 accounts for less than 20% of the total area of the first passivation layer 12. Thus, the total area of the hole region is controlled by the area ratio of the hole region, so that the total contact area between the second doped layer 13 and the silicon substrate 101 is smaller, and the recombination loss is reduced under the condition of ensuring low contact resistance.
Alternatively, the holes of the first passivation layer 12 are prepared by thermal diffusion impingement. Specifically, the temperature range of the thermal diffusion impact is 500 ℃ to 1200 ℃. For example, 500 ℃, 510 ℃, 550 ℃, 600 ℃, 700 ℃, 800 ℃, 820 ℃, 900 ℃, 950 ℃, 1000 ℃, 1050 ℃, 1100 ℃, 1150 ℃ 1200 ℃. Preferably, the thermal diffusion impact temperature is 800 ℃ to 1100 ℃. For example, 800 ℃, 820 ℃, 900 ℃, 950 ℃, 1000 ℃, 1050 ℃, 1100 ℃. Therefore, the formed porous structure holes are smaller, the average pore diameter is smaller than 1000nm, and the composite loss is reduced. In addition, the surface density of the holes is higher and can reach 10 6 -10 8 /cm 2 The transverse transportation distance can be reduced, the current crowding effect is eliminated, the resistance loss is reduced, and the resistance reducing effect is better. It will be appreciated that in other embodiments, the porous structure may also be formed by chemical etching, dry etching or other means of preparation.
Optionally, the holes of the first passivation layer 12 are sparsely distributed over the first passivation layer 12. Therefore, the distribution state of the holes does not need to be strictly controlled, and the production efficiency is improved.
Further, the first doped layer 11 is discretely locally distributed in each hole region of the first passivation layer 12. In this way, in the case of discrete distribution of the first doped layer 11, the orthographic projection of the holes of the first passivation layer 12 on the silicon substrate 101 can be covered by the orthographic projection of the first doped layer 11 on the silicon substrate 101, so that the second doped layer 13 cannot directly contact the silicon substrate 101, and serious recombination caused by the direct contact of the second doped layer 13 with the silicon substrate 101 is avoided.
Further, the first doping layer 11 is disposed entirely continuously between the silicon substrate 101 and the first passivation layer 12. In this way, since the first doped layer 11 is completely continuously disposed, the orthographic projection of the hole of the first passivation layer 12 on the silicon substrate 101 must be covered by the orthographic projection of the first doped layer 11 on the silicon substrate 101, and the second doped layer 13 cannot directly contact the silicon substrate 101, so that serious recombination caused by the direct contact of the second doped layer 13 on the silicon substrate 101 is avoided.
Further, the distribution of the first doped layer 11 may be controlled by the duration of doping. The longer the doping time, the more the amount of doping, the higher the proportion of the first doped layer 11 that is continuous will be, until a completely covered layer of the first doped layer 11 is formed on the silicon substrate 101. Further, the junction depth of the first doped layer 11 is less than 1.5 μm. Thus, the contact resistance can be reduced, and the field effect passivation can be improved.
Specifically, the thickness of the second doped layer 13 ranges from 0nm to 500nm. For example, 0.1nm, 50nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm. Thus, the thickness range of the second doped layer 13 is wider, and the method can adapt to different requirements in actual production.
Preferably, the thickness of the second doped layer 13 ranges from 100nm to 500nm. For example, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm. Thus, the thicker second doping layer 13 can prevent the conductive layer from burning through the second doping layer 13, reduce contact recombination, improve open circuit voltage, improve process width and ensure product yield.
Specifically, the second doped layer 13 includes a doped polysilicon layer, a doped silicon carbide layer, or a doped amorphous silicon layer. Preferably, the second doped layer 13 comprises a doped silicon carbide layer. Therefore, the silicon carbide material has wide optical band gap and low absorption coefficient, so that parasitic absorption can be reduced, and the short-circuit current density can be effectively improved. Further, the doped silicon carbide layer is composed of at least one doped silicon carbide film of different refractive index, and the refractive index of each doped silicon carbide film is sequentially lowered from the silicon substrate 101 to the outside. Thus, a refractive index gradient can be formed, and a gradient extinction effect is formed. Further, the doped silicon carbide layer in the second doped layer 13 comprises a doped hydrogenated silicon carbide layer having a conductivity of greater than 0.01S cm and a thickness of greater than 10nm. Thus, the electrical conductivity requirement of the second doped layer 13 can be satisfied, the parasitic absorption is lower, and the short-circuit current is improved.
Referring to fig. 6, the doped region 10 may alternatively be a passivation contact structure. Specifically, the doped region 10 includes a second passivation layer 14 and a third doped layer 15 stacked in this order.
In this way, the arrangement of the front passivation contact structure is achieved. It will be appreciated that the second passivation layer 14 is disposed between the substrate 101 and the third doped layer 15, and acts as a tunneling structure, with the second passivation layer 14 enabling selective transport of one carrier through the tunneling principle, while the other carrier is difficult to tunnel through the second passivation layer 14 due to the potential barrier and the presence of the field effect of the third doped layer 15. In this way, one carrier can tunnel into the third doped layer 15 and block the other carrier from passing through, so that the recombination of the interface can be significantly reduced, and the solar cell 100 has higher open-circuit voltage and short-circuit current, thereby improving the photoelectric conversion efficiency.
Specifically, the thickness of the second passivation layer 14 ranges from 0.1nm to 20nm. For example, 0.1nm, 0.2nm, 0.5nm, 1nm, 5nm, 10nm, 15nm, 19nm, 20nm.
Specifically, the second passivation layer 14 includes one or more of intrinsic amorphous silicon, intrinsic silicon carbide. Preferably, the second passivation layer 14 is an intrinsic silicon carbide layer. Therefore, the silicon carbide material has wide optical band gap and low absorption coefficient, so that parasitic absorption can be reduced, and the short-circuit current density can be effectively improved.
Further, when the second passivation layer 14 is an intrinsic silicon carbide layer, it may be prepared by Hot Wire Chemical Vapor Deposition (HWCVD) in which the Hot Wire temperature is preferably 1500-1800 ℃ and the deposition pressure is 0.05-2mbar, the substrate temperature is RT-400 ℃ and the deposition gas is SiH 3 (CH 3 ) H and H 2 Or may also include N 2 At this time N 2 Does not participate in the reaction at a temperature below 1800 ℃.
Further, when the second passivation layer 14 is an intrinsic silicon carbide layer, it may be prepared by a plasma enhanced chemical vapor deposition (PECVD, plasma Enhanced Chemical Vapor Deposition) method in which SiH is used as a deposition gas at a deposition temperature of 100-400 DEG C 4 CH (CH) 4 And its CH 4 Flow rate of (2) and SiH 4 CH (CH) 4 Is greater than the total flow ratio CH 4 /(SiH 4 +CH 4 ) 0.1-1.
Specifically, the thickness of the third doped layer 15 ranges from 10nm to 300nm. For example, 10nm, 11nm, 15nm, 20nm, 50nm, 100nm, 150nm, 180nm, 200nm, 250nm, 290nm, 300nm.
Specifically, the third doped layer 15 includes one or more of doped amorphous silicon, doped silicon carbide. Preferably, the third doped layer 15 is a doped silicon carbide layer. Because the silicon carbide material has wide optical band gap and low absorption coefficient, parasitic absorption can be reduced, and the short-circuit current density can be effectively improved. Further, the doped silicon carbide layer is composed of at least one doped silicon carbide film of different refractive index, and the refractive index of each doped silicon carbide film is sequentially lowered from the silicon substrate 101 to the outside. Thus, a refractive index gradient can be formed, and a gradient extinction effect is formed. Further, the doped silicon carbide layer in the third doped layer 15 comprises a doped hydrogenated silicon carbide layer having a conductivity of greater than 0.01S cm and a thickness of greater than 10nm. In this way, the conductivity requirement of the third doped layer 15 can be met, and the parasitic absorption is lower, so that the short-circuit current is improved.
Specifically, the surface of the silicon substrate 101 in contact with the second passivation layer 14 forms a plurality of inner diffusion regions corresponding to the third doped layer 15. It will be appreciated that during the process of preparing the third doped layer 15, the thinner second passivation layer 14 will be partially broken due to the high temperature process, and the high temperature diffusion process will adhere to the broken portion of the second passivation layer 14 and the silicon substrate 101, so that the surface of the silicon substrate 101 contacted with the second passivation layer 14 forms a plurality of inner diffusion regions corresponding to the third doped layer 15.
Specifically, a tunneling oxide layer may be further disposed between the second passivation layer 14 and the substrate 101.
Further, the thickness of the tunneling oxide layer is less than 3nm. For example, 0.1nm, 0.5nm, 0.8nm, 1nm, 1.2nm, 1.5nm, 2nm, 2.3nm, 2.8nm, 3nm.
Further, the tunneling oxide layer includes one or more of a silicon oxide layer and an aluminum oxide layer. Preferably, the tunnel oxide layer is a silicon oxide layer. In this way, the silicon oxide layer and the second passivation layer 14 may reduce the interface state density between the substrate 101 and the third doped layer 15 through chemical passivation.
Further, the tunnel oxide layer may be prepared by thermal oxidation and solution oxidation. Further, in the case of preparing the tunnel oxide layer by thermal oxidation, oxygen and nitrogen may be introduced at 500-800 ℃ for thermal oxidation for 5-30min, thereby forming a silicon oxide layer on the substrate 101. In the case of tunnel oxide layers prepared by solution oxidation, H may be used in a solution ratio of 4:1 to 1:4 2 SO 4 And H is 2 O 2 The mixed solution of the solutions is prepared by oxidation, thereby forming a silicon oxide layer on the substrate 101.
Referring to fig. 3, the surface passivation layer 20 may optionally include one or more of an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, a silicon carbide layer, an amorphous silicon layer, and a silicon oxide layer.
Alternatively, the surface passivation layer 20 may be composed of at least one passivation film having a different refractive index, and the refractive index of each passivation film is sequentially reduced from the silicon substrate 101 to the outside. Thus, a refractive index gradient can be formed, and a gradient extinction effect is formed.
Optionally, the surface passivation layer 20 covers the entire area of the doped region 10 except for the functional layer 30 and the metal electrode 40. Thus, leakage can be avoided.
Other explanations and illustrations of this embodiment are made to other parts of this document, and are not repeated here to avoid redundancy.
The foregoing description of the preferred embodiment of the present invention is not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.
Claims (21)
1. A contact structure of a solar cell, comprising:
a doped region disposed on the silicon substrate;
The surface passivation layer is arranged on the doped region, and a first opening region is arranged on the surface passivation layer, and the width of the first opening region is 30-2000 mu m;
the functional layer is arranged on the first opening area, a second opening area is arranged on the functional layer, the functional layer comprises a semiconductor film or a conductive film, and the second opening area is a continuous groove or a through hole with intervals; and
And the metal electrode is arranged on the second opening area and is also arranged on the functional layer.
2. The contact structure of claim 1, wherein the conductive film is a transparent conductive film, and the transparent conductive film is one or more of an ITO film, an AZO film, a GZO film, an FTO film, an IWO film, and a graphene film.
3. The contact structure of claim 1, wherein the functional layer has a thickness of less than 200nm.
4. The contact structure of claim 1 wherein the ratio of the area of the second open area to the area of the first open area is less than 0.3.
5. The contact structure of claim 1, wherein the diameter of the via is less than 50 μm.
6. The contact structure of claim 1, wherein the doped region comprises a first doped layer, a first passivation layer, and a second doped layer stacked in sequence.
7. The contact structure of claim 6, wherein the first passivation layer is a porous structure, the first doped layer and/or the second doped layer are provided in a hole region of the first passivation layer, and the first doped layer and the second doped layer are connected through a doped hole region.
8. The contact structure of claim 7, wherein the pores of the first passivation layer have an average pore size of less than 1000nm.
9. The contact structure of claim 7, wherein an area of the hole region of the first passivation layer is less than 20% of an overall area of the first passivation layer.
10. The contact structure of claim 7, wherein the holes of the first passivation layer are formed by thermal diffusion impingement.
11. The contact structure of claim 7, wherein individual holes of the first passivation layer are sparsely distributed over the first passivation layer.
12. The contact structure of claim 1, wherein the doped region comprises a second passivation layer and a third doped layer stacked in sequence.
13. The contact structure of claim 1, wherein the metal electrode comprises a seed layer and a metal layer, the seed layer being located between the metal layer and the doped region.
14. The contact structure of claim 13 wherein the seed layer is one or more of copper, tin, aluminum, silver, gold, chromium, iron, nickel, zinc, ruthenium, palladium, and platinum.
15. The contact structure of claim 13 wherein said seed layer is an alloy material, said seed layer comprising a primary component and a strengthening component, said primary component being one or more metals having a wavelength in the range of 850-1200 and an average refractive index less than 2, said strengthening component comprising any one or more of molybdenum, nickel, titanium, tungsten, chromium, manganese, palladium, bismuth, niobium, tantalum, protactinium, silicon, vanadium, said primary component comprising any one or more of aluminum, silver, copper, magnesium, said primary component being present in an amount of >50%.
16. The contact structure of claim 15, wherein the main component is aluminum, and the content is not less than 70%; the strengthening component is one or more of molybdenum, nickel, titanium and tungsten, and the content is less than or equal to 30 percent.
17. The contact structure of claim 13 wherein the metal layer is one or more of magnesium, copper, tin, aluminum, silver, gold, chromium, iron, nickel, zinc, ruthenium, palladium, and platinum.
18. A solar cell, characterized in that the solar cell is a back contact cell, the back contact cell comprises a silicon substrate, a first contact region and a second contact region, the first contact region and the second contact region are opposite in polarity and are alternately arranged on the back surface of the silicon substrate, and the first contact region and/or the second contact region adopts the contact structure as claimed in any one of claims 1-17.
19. A solar cell, characterized in that the solar cell is a double-sided contact cell, the double-sided contact cell comprises a silicon substrate, a third contact region and a fourth contact region, the third contact region and the fourth contact region are opposite in polarity and are respectively arranged on the front surface and the back surface of the silicon substrate, and the third contact region and/or the fourth contact region adopts the contact structure of any one of claims 1-17.
20. A battery assembly comprising the solar cell of claim 18 or 19.
21. A photovoltaic system comprising the cell assembly of claim 20.
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