CN210575979U

CN210575979U - Solar cell module

Info

Publication number: CN210575979U
Application number: CN201920961032.6U
Authority: CN
Inventors: 李华; 童洪波; 张洪超; 刘继宇
Original assignee: Taizhou Lerri Solar Technology Co Ltd
Current assignee: Taizhou Longi Solar Technology Co Ltd
Priority date: 2019-06-24
Filing date: 2019-06-24
Publication date: 2020-05-19
Anticipated expiration: 2029-06-24

Abstract

The utility model provides a solar module relates to solar photovoltaic technical field. The solar cell module includes: the solar cell comprises a plurality of p-type crystalline silicon solar cells and a plurality of lead groups for connecting the adjacent p-type crystalline silicon solar cells; the lead group comprises a preset number of leads which are arranged in parallel; the preset number is 4-30; the lead includes a base wire; the lead further comprises a hot-melt conductive layer at least wrapping the surface of the base line; the hot-melting conducting layer comprises a first hot-melting conducting layer used for hot-pressing connection or adhesive connection of a front metal electrode of one p-type crystalline silicon solar cell and a second hot-melting conducting layer used for hot-pressing connection or adhesive connection of a back metal electrode of another adjacent p-type crystalline silicon solar cell; the width of the conducting wire is greater than or equal to 50 micrometers and less than or equal to 1000 micrometers. The photoelectric conversion device reduces the assembly loss, reduces the transmission loss of current, and is high in photoelectric conversion efficiency.

Description

Solar cell module

Technical Field

The utility model relates to a solar photovoltaic technology field especially relates to a solar module.

Background

The solar cell module is used for converting solar energy into electric energy, or transmitting the electric energy to a storage battery for storage, or pushing a load to work.

At present, the structure of a solar cell module mainly comprises: a plurality of single solar cells are welded into a cell string through a welding strip, and then the cell string is packaged into a cell module capable of outputting power to the outside.

The solar cell module formed by welding the solder strip has large assembly loss.

SUMMERY OF THE UTILITY MODEL

The utility model provides a solar module aims at solving solar module, the big problem of equipment loss.

According to the utility model discloses an aspect provides a solar module, include: the solar cell comprises a plurality of p-type crystalline silicon solar cells and a plurality of lead groups for connecting the adjacent p-type crystalline silicon solar cells;

the p-type crystalline silicon solar cell includes:

a p-type crystalline silicon substrate;

the local P + + type doped region is formed on the front surface of the P-type crystal silicon substrate;

the front antireflection layer is deposited on the front side of the p-type crystal silicon substrate;

a front metal electrode penetrating through the front anti-reflection layer and contacting the local p + + type doped region;

the n-type doped silicon film layer is formed on the back surface of the P-type crystal silicon substrate;

the back passivation layer is deposited on the back of the n-type doped silicon film layer;

and a back metal electrode penetrating the back passivation layer and contacting the n-type doped silicon film layer;

the lead group comprises a preset number of leads which are arranged in parallel; the preset number is 4-30;

the lead includes a base wire; the base string comprises a first connecting section positioned at one end of the base string, a second connecting section positioned at the other end of the base string, and a middle section positioned between the first connecting section and the second connecting section; the lead further comprises a hot-melt conductive layer at least wrapping the surface of the base line; the hot melting conducting layer comprises a first hot melting conducting layer used for hot-pressing or adhesive connection of a front metal electrode of one p-type crystalline silicon solar cell and a second hot melting conducting layer used for hot-pressing or adhesive connection of a back metal electrode of another adjacent p-type crystalline silicon solar cell; the first hot-melt conductive layer is wrapped on the surface of the first connecting section; the second hot-melt conductive layer is wrapped on the surface of the second connecting section; the width of the conducting wire is greater than or equal to 50 micrometers and less than or equal to 1000 micrometers.

Optionally, the cross-sectional shape of the wire is at least one of circular, rectangular or trapezoidal; the preset number is 10-18.

Optionally, the base line is at least one of a copper base line or an aluminum base line.

Optionally, the hot-melt conductive layer is a metal simple substance or a metal alloy with a melting point of 70-180 ℃.

Optionally, the hot-melt conductive layer is at least one of silver, bismuth, cadmium, gallium, indium, lead, tin, titanium, and zinc.

Optionally, the hot-melt conductive layer is conductive resin with a softening temperature of 90-120 ℃.

Optionally, the conductive resin includes: a resin base material and conductive particles provided inside the resin base material; the resin substrate is selected from: at least one of cellulose acetate, fluorine resin, polysulfone resin, polyester resin, polyamide resin, polyurethane resin, and polyolefin resin; the conductive particles are selected from: at least one of gold, silver, copper, aluminum, zinc, nickel, and graphite.

Optionally, the conductive particles are in the shape of granules and/or flakes.

Optionally, all the first connection segments in the wire group are embedded in a thermoplastic polymer film; all the second connecting sections in the lead group are embedded in another thermoplastic polymer film; the thermoplastic polymer film is selected from: at least one of a polyvinyl butyral film, a polyolefin film, or an ethylene-vinyl acetate copolymer film.

Optionally, the thickness of the hot-melt conductive layer is greater than or equal to 1 micrometer and less than or equal to 10 micrometers.

Optionally, the p-type crystalline silicon solar cell further includes: and the p + type doping layer is doped in a region which is formed between the front antireflection layer and the p-type crystal silicon substrate and is outside the local p + + type doping region.

Optionally, the back metal electrode and/or the front metal electrode include: a plurality of thin gate lines and a plurality of main gate lines; the arrangement directions of the thin grid lines and the main grid lines are not coincident; the main gate line is connected to each of the thin gate lines.

Optionally, the fine grid lines are radially distributed.

Optionally, the main gate line is composed of a plurality of pads and a connecting gate line between the pads.

Optionally, the p-type crystalline silicon solar cell further includes: and the passivation tunneling layer is deposited between the n-type doped silicon film layer and the p-type crystal silicon substrate.

According to a second aspect of the present invention, there is provided a solar module production method for producing a solar module as described above; the method comprises the following steps:

providing a lead group;

stacking the lead group and the p-type crystalline silicon solar cells so that the back metal electrode of one p-type crystalline silicon solar cell corresponds to the second hot melting conducting layer and the front metal electrode of the other adjacent p-type crystalline silicon solar cell corresponds to the first hot melting conducting layer;

heating the hot-melting conducting layer to a preset temperature, so that the hot-melting conducting layer is in hot-pressing connection or adhesive connection with the back metal electrode of the p-type crystalline silicon solar cell, and is in hot-pressing connection or adhesive connection with the front metal electrode of the p-type crystalline silicon solar cell adjacent to the p-type crystalline silicon solar cell, and a solar cell assembly is obtained; the preset temperature is less than or equal to 180 ℃.

Optionally, the back metal electrode and/or the front metal electrode include: a plurality of thin gate lines and a plurality of main gate lines; the arrangement directions of the thin grid lines and the main grid lines are not coincident; the main grid line is connected with each thin grid line; the fine grid lines are formed by deposition, and the main grid lines are formed at least by printing and sintering electrode paste.

Optionally, the main gate line is composed of a plurality of pads and a connecting gate line located between the pads; the pad is formed by printing and sintering electrode paste; the connecting grid line is formed by deposition.

Optionally, the deposition is selected from: at least one of laser transfer, electroless plating, sputtering, electrodeposition, physical vapor deposition, chemical vapor deposition, atomic layer deposition.

According to the utility model discloses a third aspect still provides a solar module production facility, solar module production facility includes: an interface, a bus, a memory and a processor, wherein the interface, the memory and the processor are connected through the bus, the memory is used for storing an executable program, and the processor is configured to run the executable program to realize the steps of the solar cell module production method according to any one of the preceding claims.

According to a fourth aspect of the present invention, there is also provided a computer-readable storage medium storing thereon an executable program executed by a processor to implement the steps of the solar cell module production method according to any one of the preceding claims.

Compared with the prior art, in the case that a plurality of solar cells are welded into a cell string through a welding strip and then packaged into a cell module capable of outputting power to the outside, the lead further comprises a hot-melt conducting layer at least wrapping the surface of the base line, the first hot-melt conducting layer is in hot-press connection or adhesive connection with a front metal electrode of one p-type crystalline silicon solar cell, the second hot-melt conducting layer is in hot-press connection or adhesive connection with a back metal electrode of another adjacent p-type crystalline silicon solar cell, the heating temperature of the hot-press connection or adhesive connection is lower than the welding temperature, the heating temperature of the hot-press connection or adhesive connection area of each p-type crystalline silicon solar cell is lower, and further the thermal stress of the area is lower, so that the damage to a silicon wafer and an aluminum back surface field of the area can be reduced; moreover, in the prior art, in order to guarantee better welding reliability, the width of solder strip is wider usually, if the width of solder strip is 600 to 1200 microns usually, lead to sheltering from more to the light, lead to the fact the encapsulation loss, and in this application, because the width of single wire is thinner, through setting up more wire, not only increased the connection reliability, total shading area has still been reduced, moreover, current everywhere can select the wire transmission that the distance is nearer, can reduce the transmission distance of electric current, the transmission loss of electric current has been reduced, be favorable to reducing the equipment loss. Meanwhile, for the p-type crystalline silicon solar cell, the heterojunction formed by the n-type doped silicon film layer and the p-type crystalline silicon substrate is positioned on the back surface of the p-type crystalline silicon substrate, so that a back emitter is formed, the back surface of the p-type crystalline silicon substrate is smoother, the performance of the formed heterojunction is better, and the open-circuit voltage can be improved to a certain extent; and compared with the heterojunction positioned on the front side of the p-type crystalline silicon substrate, the heterojunction positioned on the back side of the p-type crystalline silicon substrate does not reduce effective incident light entering the p-type crystalline silicon substrate, and has less optical loss. Meanwhile, in the p-type crystalline silicon cell with the structure, the front metal electrode is in contact with the local p + + type doped region with high doping concentration to form good ohmic contact, so that the contact resistance can be reduced to a great extent; meanwhile, the back metal electrode is not directly contacted with the p-type crystal silicon substrate, and the back metal electrode is contacted with the n-type doped silicon film layer to form good ohmic contact, so that the contact resistance can be reduced to a great extent; the contact area recombination caused by the direct contact of the front metal electrode and the back metal electrode with the p-type crystal silicon substrate is avoided, and the open-circuit voltage and the conversion efficiency of the battery can be further improved; meanwhile, the p-type crystalline silicon solar cell with the structure has the advantages that the processing process is compatible with the existing processing technology, and the manufacturing is simple and convenient.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive labor.

Fig. 1 is a schematic structural diagram of a battery string in a solar battery module according to an embodiment of the present invention;

fig. 2 shows a schematic structural diagram of a first p-type crystalline silicon solar cell in an embodiment of the present invention;

fig. 3 is a schematic structural diagram of a battery string in a solar battery module according to another embodiment of the present invention;

fig. 4 shows a schematic structural diagram of another solar cell module in an embodiment of the present invention;

fig. 5 shows a schematic structural diagram of a second p-type crystalline silicon solar cell in an embodiment of the present invention;

fig. 6 shows a schematic structural diagram of a third p-type crystalline silicon solar cell in an embodiment of the present invention;

fig. 7 shows a schematic structural diagram of a fourth p-type crystalline silicon solar cell in an embodiment of the present invention;

fig. 8 shows a schematic structural diagram of a front metal electrode or a back metal electrode in an embodiment of the present invention;

fig. 9 is a flow chart illustrating steps of a method for manufacturing a solar cell module according to an embodiment of the present invention;

fig. 10 shows a schematic structural diagram of a solar module production apparatus in an embodiment of the present invention.

Description of the figure numbering:

1-p-type crystalline silicon solar cell, 2-p-type crystalline silicon solar cell adjacent to the p-type crystalline silicon solar cell 1, 3-lead, 31-base line, 32-hot melt conductive layer, 4-thermoplastic polymer film, 5-upper cover plate, 6-lower cover plate, 7-upper packaging layer, 8-lower packaging layer, 12-p-type crystalline silicon substrate, 15-local p + + type doped region, 14-front antireflection layer, 13-front metal electrode, 16-n type doped silicon film layer, 17-back passivation layer, 11-back metal electrode, 131-fine grid line, 132-main grid line, 1321-pad, 1322-connecting grid line, 18-p + type doped layer, 19-passivation tunneling layer, 71-interface, 72-processor, 73-memory, 74-bus.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, of the embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

Referring to fig. 1, the solar cell module includes: the solar cell structure comprises a plurality of p-type crystalline silicon solar cells and a plurality of lead groups for connecting the adjacent p-type crystalline silicon solar cells.

For convenience of explanation, two adjacent p-type crystalline silicon solar cells are respectively denoted as a p-type crystalline silicon solar cell 1 and a p-type crystalline silicon solar cell 2. Here, only the connection of the p-type crystalline silicon solar cell 1 and the p-type crystalline silicon solar cell 2 will be described, and the connection of the other p-type crystalline silicon solar cells will be understood with reference to the drawings.

The lead group comprises a preset number of leads 3 which are arranged in parallel, and the leads are mainly used for connecting the p-type crystalline silicon solar cells 1 and the p-type crystalline silicon solar cells 2 and transmitting current and the like. The width of the conducting wire 3 is more than or equal to 50 micrometers and less than or equal to 1000 micrometers; the preset number includes: 4-30.

In the embodiment of the present invention, the width of the conductive wire 3 is greater than or equal to 50 micrometers and less than or equal to 1000 micrometers, for example, the width of the conductive wire may be 100 micrometers. The light is shielded by the conducting wire within the width range to be small, the optical loss is less, and the assembly loss is reduced.

In the embodiment of the present invention, in order to ensure the reliability of the connection and provide a short transmission path for current transmission, the number of the wires may be 4-30. Because the width of single wire is thinner, through setting up more wire, not only increased the connection reliability, still reduced total shading area, moreover, current everywhere can select the wire transmission that the distance is nearer to transmit, can reduce the transmission distance of electric current, reduced the transmission loss of electric current, be favorable to reducing the equipment loss.

Optionally, the cross-sectional shape of the wire is at least one of circular, rectangular or trapezoidal; the preset number includes: 10-18. Specifically, the cross-sectional shape of the lead 3 is at least one of circular, rectangular and trapezoidal, and the solar rays can be reflected to the surface of the solar cell after irradiating the surfaces of the circular lead, the rectangular lead and the trapezoidal lead. For example, the vertically incident or obliquely incident solar rays can be reflected to the surface of the solar cell piece by the surfaces of the round wire, the rectangular wire and the trapezoidal wire, so that the solar rays in all directions are fully utilized, and the solar ray loss caused by the shielding of the wires is reduced. In addition, the contact area between the bottom of the lead and the solar cell or the main grid line of the solar cell is large, the series resistance is small, and the connection reliability is high.

Optionally, under the condition that the number of the wires 3 is 10-18, the connection reliability, the shading area, the current transmission path optimization and the like reach the optimal balance, the connection reliability is good, the shading area has small influence on the light utilization rate, and the wires with shorter distances can be selected for transmitting the current at each position, so that the transmission distance of the current can be reduced, the transmission loss of the current is reduced, and the assembly loss is favorably reduced.

Specifically, the lead 3 includes a base wire 31, and a thermally fusible conductive layer 32 at least partially wrapped around a surface of the base wire 31.

Alternatively, the material of the element wire 31 may be at least one of copper or aluminum. The base line 31 made of the material has good connection reliability and is beneficial to transmitting current.

Referring to fig. 2, fig. 2 shows a schematic structural diagram of a p-type crystalline silicon solar cell in an embodiment of the present invention. The p-type crystalline silicon solar cell may include: a p-type crystalline silicon substrate 12; a local P + + type doped region 15 formed on the front surface of the P-type crystalline silicon substrate 12; the doping concentration of the local p + + type doping area 15 is larger than that of the p-type crystalline silicon substrate 12; a front anti-reflection layer 14 deposited on the front surface of the p-type crystalline silicon substrate 12; the front metal electrode 13 penetrates through the front antireflection layer 14 and is in contact with the local p + + type doped region 15; an n-type doped silicon film layer 16 formed on the back surface of the P-type crystalline silicon substrate 12; a back passivation layer 17 deposited on the back of the n-type doped silicon film layer 16; and a back metal electrode 11, wherein the back metal electrode 11 penetrates through the back passivation layer 17 and is in contact with the n-type doped silicon film layer 16.

In the embodiment of the present invention, the p-type crystalline silicon substrate 12 in the p-type crystalline silicon solar cell can be mainly used for absorbing photons to generate photon-generated carriers.

In the embodiment of the present invention, the local p + + type doped region 15 and the p-type crystalline silicon substrate 12 may be doped with the same type, and the doping type may be a group III element, for example, a boron element. And the doping concentration of the local p + + type doping region 15 is greater than that of the p-type crystalline silicon substrate 12.

In the embodiment of the present invention, the front surface of the p-type crystalline silicon substrate 12, the region corresponding to the front surface metal electrode 13, is provided with the above-mentioned local p + + type doped region 15. That is, the local p + + type doped region 15 is formed on the front surface of the p-type crystalline silicon substrate 12, and the local p + + type doped region 15 corresponds to the front surface metal electrode 13 up and down.

In the embodiment of the present invention, optionally, the width of the local p + + type doped region 15 may be greater than or equal to the width of the front metal electrode 13. Furthermore, the front metal electrode can be completely contacted with the local p + + type doped region 15 to form good ohmic contact, so that the contact resistance can be reduced to a great extent; contact area recombination caused by direct contact of the front metal electrode 13 with the p-type crystalline silicon substrate 12 is avoided, and the open-circuit voltage and the conversion efficiency of the cell can be improved to a great extent.

In the present embodiment, the front metal electrode 13 is generally used to collect holes in photogenerated carriers. Optionally, the front metal electrode 13 may be selected from: any one of Al electrode, Al/Ag electrode, Ni/Cu electrode, Co/Cu electrode, Ni/Cu/Sn electrode, Co/Cu/Ag electrode and Ni/Cu/Ag electrode. For example, the front metal electrode 13 may be an Al electrode formed by screen printing.

The embodiment of the utility model provides an in, the selectivity of positive metal electrode is many, can select the lower positive metal electrode of cost to reduce heterojunction solar cell's cost. Further preferably, the front metal electrode 13 is selected from a Co/Cu electrode and a Co/Cu/Ag electrode, so that the metal cobalt Co is used as a bottom layer of the front metal electrode, which is beneficial to improving the blocking effect on copper and preventing copper from entering the p-type crystalline silicon solar cell as an impurity, and copper is easy to diffuse in the p-type crystalline silicon solar cell to cause charge recombination, thereby reducing carriers and reducing open-circuit voltage; meanwhile, the cost can be effectively reduced by adopting copper or partially adopting copper to replace silver.

In the embodiment of the present invention, optionally, the p-type crystal silicon substrate 12 may be selected from: a p-type monocrystalline silicon substrate or a p-type polycrystalline silicon substrate. That is, the p-type crystalline silicon substrate 12 may be a p-type single crystal silicon substrate, or the p-type crystalline silicon substrate 12 may be a p-type polycrystalline silicon substrate. In the embodiment of the present invention, this is not particularly limited.

In the embodiment of the present invention, the thickness of the p-type crystal silicon substrate 12 may be 50 to 300 μm. The thickness of the p-type crystalline silicon substrate 12 can absorb more photons and generate more photon-generated carriers. For example, the thickness of the p-type crystalline silicon substrate 12 may be 180 μm.

In the embodiment of the present invention, a front antireflection layer 14 is deposited on the front surface of the p-type crystalline silicon substrate 12. The front anti-reflection layer 14 can reduce reflection of front incident light on the surface of a p-type crystalline silicon substrate and the like to a great extent, and can form good surface passivation on the local p + + type doped region 15 and the like.

In the embodiment of the present invention, optionally, the material of the front antireflection layer 14 may be selected from: at least one of silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, silicon carbide, silicon oxycarbide, and amorphous silicon.

In the embodiment of the present invention, optionally, the thickness of the front antireflection layer 14 may be 40 to 100 nm. The front anti-reflection layer 14 with the thickness within the range can further reduce the reflection of front incident light on the surface of a p-type crystalline silicon substrate and the like, and can form better surface passivation on a local p + + type doped region 15 and the like.

For example, the front anti-reflection layer 14 may be a composite film layer formed of aluminum oxide and silicon nitride, the thickness of the aluminum oxide may be 15nm, the thickness of the silicon nitride may be 60nm, and the thickness of the front anti-reflection layer 14 may be 75 nm.

In the embodiment of the present invention, the front metal electrode 13 penetrates the front anti-reflective layer 14 and contacts the local p + + type doped region 15. Furthermore, the front metal electrode 13 is not in direct contact with the p-type crystalline silicon substrate 12, and the front metal electrode 13 is in contact with the local p + + type doped region 15 with higher doping concentration to form good ohmic contact, so that the contact resistance can be reduced to a great extent; contact area recombination caused by direct contact of the front metal electrode 13 with the p-type crystalline silicon substrate 12 is avoided, and the open-circuit voltage and the conversion efficiency of the cell can be improved to a great extent.

In the present embodiment, the back surface of the p-type crystalline silicon substrate 12 forms an n-type doped silicon film layer 16. And then the n-type doped silicon film layer 16 and the p-type crystalline silicon substrate 12 form a heterojunction which is positioned on the back surface of the p-type crystalline silicon substrate 12 to form a back emitter. The back surface of the p-type crystalline silicon substrate 12 is not required to be subjected to texturing generally, so that the back surface of the p-type crystalline silicon substrate 12 is smoother and smoother, the performance of a formed heterojunction is better, and the open-circuit voltage can be improved to a certain extent; and the heterojunction located on the back of the p-type crystalline silicon substrate 12 does not reduce the effective incident light entering the p-type crystalline silicon substrate 12 compared with the heterojunction located on the front of the p-type crystalline silicon substrate, and has less optical loss.

In the embodiment of the present invention, optionally, the material of the n-type doped silicon film layer 16 may include: at least one of microcrystalline silicon and polycrystalline silicon, and doped with a group V element. The n-type doped silicon film layer 16 may be microcrystalline silicon, the n-type doped silicon film layer 16 may be polycrystalline silicon, or the n-type doped silicon film layer 16 may be a combination of microcrystalline silicon and polycrystalline silicon. For the amorphous silicon with strong light absorption, the n-type doped silicon film layer 16 is made of: at least one of microcrystalline silicon and polycrystalline silicon is weak in light absorption capacity, so that effective incident light entering the p-type crystalline silicon substrate 12 cannot be reduced, optical loss is low, on one hand, photoelectric conversion efficiency is high, open-circuit voltage is large, on the other hand, the p-type crystalline silicon cell with the structure is low in optical loss, and further a transparent conductive film, low-temperature conductive silver paste and the like are not needed, so that the cost of the heterojunction solar cell is reduced to a great extent.

In the embodiment of the present invention, optionally, the n-type doped silicon film 16 is doped with a group V element. For example, the n-type doped silicon film layer 16 may be doped with phosphorus. In the embodiment of the present invention, this is not particularly limited.

In the embodiment of the present invention, optionally, the thickness of the n-type doped silicon film layer 16 may be 10nm to 500 nm. For example, the thickness of the n-type doped silicon film layer 16 may be 150 nm. The n-type doped silicon film layer 16 within this thickness range is beneficial to increasing the effective incident light entering the p-type crystalline silicon substrate 12 with less optical loss.

In an embodiment of the present invention, a back passivation layer 17 is deposited on the back side of the n-type doped silicon film 16. The back passivation layer 17 can largely reduce reflection of back incident light on the surface of a p-type crystalline silicon substrate or the like, and at the same time, can form good surface passivation with a heterojunction, a back emitter, or the like.

In the embodiment of the present invention, optionally, the material of the back passivation layer 17 may be selected from: at least one of silicon nitride, silicon oxide, silicon oxynitride, silicon oxycarbide, aluminum oxide, aluminum oxynitride, silicon carbide, and amorphous silicon.

In the embodiment of the present invention, optionally, the thickness of the back passivation layer 17 may be 40 to 200 nm. The back passivation layer 17 having the above thickness range can further reduce reflection of back incident light on the surface of the p-type crystalline silicon substrate or the like, and can form better surface passivation for a heterojunction or a back emitter or the like. For example, the surface passivation layer 6 may be silicon nitride and may have a thickness of 70 nm.

In the embodiment of the present invention, the back metal electrode 11 penetrates the back passivation layer 17 and contacts the n-type doped silicon film layer 16. The back metal electrode 11 is not in direct contact with the p-type crystalline silicon substrate 12, the back metal electrode 11 is in contact with the n-type doped silicon film layer 16 to form good ohmic contact, and therefore contact resistance can be reduced to a great extent; contact area recombination caused by direct contact of the back metal electrode 7 with the p-type crystalline silicon substrate 12 is avoided, and the open-circuit voltage and the conversion efficiency of the cell can be further improved.

In the present embodiment, the back metal electrode 11 is generally used to collect electrons in photogenerated carriers. Optionally, the back metal electrode 11 may include any one of an Ag electrode, a Ni/Cu electrode, a Co/Ag electrode, a Co/Cu/Sn electrode, a Co/Cu/Ag electrode, a Ni/Cu/Sn electrode, and a Ni/Cu/Ag electrode. For example, the back metal electrode 11 may be an Ag electrode formed by screen printing.

The embodiment of the utility model provides an in, back metal electrode's selectivity is many, can select the lower back metal electrode of cost to reduce heterojunction solar cell's cost. Further preferably, the back metal electrode 11 is selected from a Co/Cu electrode and a Co/Cu/Ag electrode, so that the metal cobalt Co is used as a bottom layer of the back metal electrode, which is beneficial to improving the blocking effect on copper and preventing copper from entering the p-type crystalline silicon solar cell as an impurity, and copper is easy to diffuse in the p-type crystalline silicon solar cell to cause charge recombination, thereby reducing carriers and reducing open-circuit voltage; meanwhile, the cost can be effectively reduced by adopting copper or partially adopting copper to replace silver.

The embodiment of the utility model provides an in, above-mentioned p type crystalline silicon solar cell is still through doping, the current manufacturing process preparation such as deposit, and the current manufacturing process of direct compatibility need not to adjust current manufacturing process, and this p type crystalline silicon solar cell manufacturing process is simple and convenient.

In the embodiment of the utility model, the heterojunction that forms is located the back of p type crystalline silicon basement, has formed the back projecting pole, and the back of p type crystalline silicon basement is more level and smooth with p type crystalline silicon basement, and then the heterojunction performance that forms is better, can improve open circuit voltage to a certain extent; and compared with the heterojunction positioned on the front side of the p-type crystalline silicon substrate, the heterojunction positioned on the back side of the p-type crystalline silicon substrate does not reduce effective incident light entering the p-type crystalline silicon substrate, and has less optical loss. Meanwhile, in the p-type crystalline silicon cell with the structure, the front metal electrode is not directly contacted with the p-type crystalline silicon substrate, and the front metal electrode is contacted with the local p + + type doping region with higher doping concentration to form good ohmic contact, so that the contact resistance can be reduced to a great extent; meanwhile, the back metal electrode is not directly contacted with the p-type crystal silicon substrate, and the back metal electrode is contacted with the n-type doped silicon film layer to form good ohmic contact, so that the contact resistance can be reduced to a great extent; the contact area recombination caused by the direct contact of the front metal electrode and the back metal electrode with the p-type crystal silicon substrate is avoided, and the open-circuit voltage and the conversion efficiency of the battery can be further improved; meanwhile, the p-type crystalline silicon solar cell with the structure has the advantages that the processing process is compatible with the existing processing technology, and the manufacturing is simple and convenient. In the embodiment of the present invention, the base line 31 includes a first connection section located at one end of the base line, a second connection section located at the other end of the base line, and an intermediate section located between the first connection section and the second connection section. The hot melt conductive layer 32 comprises a first hot melt conductive layer for hot-press bonding or adhesive bonding of the front metal electrode 13 of one p-type crystalline silicon solar cell 2 and a second hot melt conductive layer for hot-press bonding or adhesive bonding of the back metal electrode 11 of another adjacent p-type crystalline silicon solar cell 1; the first hot-melt conductive layer is wrapped on the surface of the first connecting section; the second hot-melt conductive layer is wrapped on the surface of the second connecting section.

Specifically, the hot-melt conductive layer 32 is mainly used for hot-press bonding or adhesive bonding of the back metal electrode 11 of one p-type crystalline silicon solar cell and hot-press bonding or adhesive bonding of the front metal electrode 13 of another adjacent p-type crystalline silicon solar cell. Compared with the prior art, a plurality of solar cells are welded into a cell string through a welding strip at about 220 ℃, and then the cell string is packaged into a cell module capable of outputting power externally, in the application, the back metal electrode 11 of one p-type crystalline silicon solar cell is connected in a hot-pressing mode or in an adhesive mode through the hot-melting conducting layer 32, the front metal electrode 13 of the other adjacent p-type crystalline silicon solar cell is connected in a hot-pressing mode or in an adhesive mode, the heating temperature of the hot-pressing connection or adhesive connection area of the p-type crystalline silicon solar cell is low, and therefore the thermal stress of the area is low, damage to the area can be reduced, and reduction of assembly loss is facilitated.

In the embodiment of the present invention, optionally, the hot-melt conductive layer is a metal simple substance or a metal alloy with a melting point of 70-180 ℃. Therefore, under the condition of 70-180 ℃, the hot melting conducting layer 32 can be melted, the heating temperature of the area of the p-type crystalline silicon solar cell in hot-pressing connection or adhesive connection is further reduced, and further the thermal stress on the area is smaller, so that the damage to the area can be reduced, and the assembly loss can be further reduced.

In an embodiment of the present invention, optionally, the hot-melt conductive layer is at least one of silver, bismuth, cadmium, gallium, indium, lead, tin, titanium, and zinc. Therefore, the resistance of the hot-melt conductive layer can be further reduced under the condition of ensuring a lower melting point, and the conductive performance can be improved.

In the embodiment of the present invention, optionally, the hot-melt conductive layer is a conductive resin with a softening temperature of 90-120 ℃. Therefore, under the condition of 90-120 ℃, the hot-melting conducting layer can be softened, so that the hot-pressing connection or the viscous connection between the conducting wire and the p-type crystalline silicon solar cell is realized, the heating temperature is low, the thermal stress on the area is low, the damage to the area of the p-type crystalline silicon solar cell can be reduced, and the reduction of the assembly loss is facilitated.

In the embodiment of the present invention, optionally, the conductive resin includes: a resin base material and conductive particles provided inside the resin base material; the resin base material includes: at least one of cellulose acetate, fluorine resin, polysulfone resin, polyester resin, polyamide resin, polyurethane resin, and polyolefin resin; the conductive particles include: at least one of gold, silver, copper, aluminum, zinc, nickel, and graphite.

In an embodiment of the present invention, the conductive particles mainly function to transmit current. Optionally, the conductive particles are in the shape of granules and/or flakes. The conductive particles with the shapes have small resistivity, and are beneficial to current transmission.

In the embodiment of the present invention, optionally, the thickness of the hot-melt conductive layer is greater than or equal to 1 micrometer and less than or equal to 10 micrometers. For example, the thickness of the thermally fusible conductive layer 32 may be 3 microns. The thickness of the hot-melt conductive layer is within the thickness range, so that the sufficient amount of the connecting agent or the adhesive can be ensured after the hot-melt conductive layer is softened and melted, and the conductive performance is not influenced by too much connecting agent or adhesive.

In the embodiment of the present invention, optionally, all the first connection segments in the wire group are embedded in a thermoplastic polymer film; all of the second connection segments in the wire set are embedded within another thermoplastic polymer film. The material of the thermoplastic polymer film comprises: at least one of polyvinyl butyral, polyolefin, or ethylene-vinyl acetate copolymer. This can facilitate the laying of the lead group and the accurate alignment with the metal electrode. Referring to fig. 3, fig. 3 is a schematic structural diagram of a battery string in a solar module according to another embodiment of the present invention. As shown in the upper diagram of fig. 3, all the first connection sections of the wires 3 connected or in contact with the front metal electrodes 13 of the p-type crystalline silicon solar cells are embedded in one thermoplastic polymer film 4, and all the second connection sections of the wires 3 connected or in contact with the back metal electrodes 11 of the p-type crystalline silicon solar cells are embedded in the other thermoplastic polymer film 4. As shown in the lower drawing of fig. 3, is an enlarged view of the oval dashed box in the upper drawing of fig. 3. In fig. 3, 31 is a base line, and 32 is a thermally fusible conductive layer. The material of the thermoplastic polymer film comprises: and at least one of polyvinyl butyral, polyolefin or ethylene-vinyl acetate copolymer, and then the lead and the p-type crystalline silicon solar cell are preliminarily bonded or connected through the thermoplastic polymer film 4, and in the subsequent hot-pressing treatment process, the lead and the p-type crystalline silicon solar cell have small relative displacement, so that the hot-pressing treatment is facilitated.

In the embodiment of the present invention, optionally, referring to fig. 4, fig. 4 shows a schematic structural diagram of another solar cell module in the embodiment of the present invention. The solar cell module may further include an upper encapsulation layer 7 on the front surface of the p-type crystalline silicon solar cell 1, an upper cover plate 5 on the front surface of the upper encapsulation layer, a lower encapsulation layer 8 on the back surface of the p-type crystalline silicon solar cell 1, and a lower cover plate 6 on the back surface of the lower encapsulation layer. The upper packaging layer 7 is used for sealing and bonding the p-type crystalline silicon solar cell with the upper cover plate 5, and the lower packaging layer 8 is used for sealing and bonding the p-type crystalline silicon solar cell with the lower cover plate 6.

In the embodiment of the present invention, optionally, the upper encapsulating layer 7 and the lower encapsulating layer 8 may include an EVA glue film, a POE glue film or a PVB film, and the thickness of the upper encapsulating layer 7 or the lower encapsulating layer 8 may be between 100 micrometers and 800 micrometers. For example, the upper package layer 7 or the lower package layer 8 may be 400 to 650 μm.

In the embodiment of the present invention, it is optional that the upper cover plate 5 and the lower cover plate 6 can be made of the same material or different materials, and it should be noted that the upper cover plate 5 needs to be made of a transparent material to transmit light to facilitate absorption of sunlight. The upper cover plate 5 includes but is not limited to tempered glass, and the material of the lower cover plate 6 includes but is not limited to tempered glass, or a polymer back plate such as TPT, TPE, KPE, KPK, KPC or KPF. The lower cover plate 6 may be a light-transmitting material or a light-impermeable material. The preferred lower cover plate 6 may be a high-cut ultraviolet material. In the embodiment of the present invention, this is not particularly limited.

In the embodiment of the utility model, compared with the prior art, when a plurality of solar cells are welded into a cell string by a welding strip, then packaged into a battery assembly capable of outputting power externally, in the application, the lead further comprises a hot-melt conductive layer at least wrapping the surface of the base line, the first hot-melt conductive layer is in hot-pressing connection or adhesive connection with a front metal electrode of one p-type crystalline silicon solar cell, the second hot-melt conductive layer is in hot-pressing connection or adhesive connection with a back metal electrode of another adjacent p-type crystalline silicon solar cell, the heating temperature of the hot-pressing connection or adhesive connection is less than the welding temperature, the heating temperature of the area of the thermocompression bonding or adhesive bonding of each p-type crystalline silicon solar cell is small, the thermal stress on the region is small, so that the damage to the silicon chip and the aluminum back surface field of the region can be reduced, and the assembly loss can be reduced; moreover, in the prior art, in order to guarantee better welding reliability, the width of solder strip is wider usually, if the width of solder strip is 600 to 1200 microns usually, lead to sheltering from more to the light, lead to the fact the encapsulation loss, and in this application, because the width of single wire is thinner, through setting up more wire, not only increased the connection reliability, total shading area has still been reduced, moreover, current everywhere can select the wire transmission that the distance is nearer, can reduce the transmission distance of electric current, the transmission loss of electric current has been reduced, be favorable to reducing the equipment loss. Meanwhile, for the p-type crystalline silicon solar cell, the heterojunction formed by the n-type doped silicon film layer and the p-type crystalline silicon substrate is positioned on the back surface of the p-type crystalline silicon substrate, so that a back emitter is formed, the back surface of the p-type crystalline silicon substrate is smoother, the performance of the formed heterojunction is better, and the open-circuit voltage can be improved to a certain extent; and the heterojunction located at the back of the p-type crystalline silicon substrate does not reduce effective incident light entering the p-type crystalline silicon substrate relative to the heterojunction located at the front of the p-type crystalline silicon substrate, and has less optical loss. Meanwhile, in the p-type crystalline silicon cell with the structure, the front metal electrode is not directly contacted with the p-type crystalline silicon substrate, and the front metal electrode is contacted with the local p + + type doping region with higher doping concentration to form good ohmic contact, so that the contact resistance can be reduced to a great extent; meanwhile, the back metal electrode is not directly contacted with the p-type crystal silicon substrate, and the back metal electrode is contacted with the n-type doped silicon film layer to form good ohmic contact, so that the contact resistance can be reduced to a great extent; the contact area recombination caused by the direct contact of the front metal electrode and the back metal electrode with the p-type crystal silicon substrate is avoided, and the open-circuit voltage and the conversion efficiency of the battery can be further improved; meanwhile, the p-type crystalline silicon solar cell with the structure has the advantages that the processing process is compatible with the existing processing technology, and the manufacturing is simple and convenient.

Referring to fig. 5, fig. 5 shows a schematic structural diagram of a second p-type crystalline silicon solar cell in an embodiment of the present invention.

Referring to fig. 5, the p-type crystalline silicon solar cell may further include, in addition to fig. 2: a p + -doped layer 18. The local p + + type doped region 15 and the p + type doped layer 18 have the same doping type, and the doping concentration of the p + type doped layer 18 is between the doping concentration of the local p + + type doped region 15 and the doping concentration of the p-type crystalline silicon substrate 12. And doping the region between the front antireflection layer 14 and the p-type crystalline silicon substrate 12 and outside the local p + + type doping region 15 to form a p + type doping layer 18.

Specifically, a p + type doping layer 18 is doped between the front antireflection layer 14 and the p-type crystalline silicon substrate 12 in a region outside the local p + + type doping region 15. That is, a p + -type doped layer 18 is doped around the local p + + -type doped region 15 between the front anti-reflection layer 14 and the p-type crystalline silicon substrate 12. The localized p + + type doped region 15 is doped with the same type as the p + type doped layer 18 and the same type as the p-type crystalline silicon substrate 12, and may be a group III element, such as boron. The doping concentration of the p + type doping layer 18 is between the doping concentration of the local p + + type doping region 15 and the doping concentration of the p-type crystalline silicon substrate 12, and then the local p + + type doping region 15 and the p + type doping layer 18 form a p + + p + type high-low junction, so that the contact region on the front side of the battery can be passivated, the surface recombination of the contact region is reduced, meanwhile, good ohmic contact can be formed with the front metal electrode 13, and the open-circuit voltage and the conversion efficiency of the battery are further improved.

In the present embodiment, referring to fig. 5, the width of the local p + + type doped region 15 is larger than the width of the front metal electrode 13. Furthermore, the front metal electrode 13 can be completely contacted with the local p + + type doped region 15 to form a good ohmic contact, so that the contact resistance can be reduced to a great extent; contact area recombination caused by direct contact of the front metal electrode 13 with the p-type crystalline silicon substrate 12 is avoided, and the open-circuit voltage and the conversion efficiency of the cell can be improved to a great extent.

The utility model discloses in the implementation, positive metal electrode 13 can not with p + type doping layer 18, positive metal electrode 13 can only contact with the higher local p + + type doping area 15 of doping concentration, and then form good ohmic contact, reduce contact resistance in the bigger degree.

In the implementation of the present invention, optionally, the doping concentration of the p-type crystal silicon substrate 12 may be: 1.3X 10¹⁵～1×10¹⁷(ii) a The doping concentration of the localized p + + type doped region 15 may be: 10¹⁹～10²¹cm^-3， The doping concentration of the P + doping layer 8 is: 10¹⁸～10²⁰cm^-3. In the doping concentration range, good ohmic contact is further formed, contact resistance is reduced to a greater extent, surface recombination of a contact region is reduced, and open-circuit voltage and conversion efficiency of the battery are further improved.

For example, the doping concentration of the p-type crystalline silicon substrate 12 is: 1.3X 10¹⁵～1×10¹⁷The resistivity corresponding to the p-type crystalline silicon substrate 12 can be 0.3-10 omega cm, and the open-circuit voltage and the conversion efficiency of the cell can be further improved.

In the embodiment of the present invention, optionally, the doping concentration of the P + doping layer 8 may be less than 10¹⁸Alternatively, the doping concentration of the P + doped layer 8 may be less than 10¹⁷. In the embodiment of the present invention, this is not particularly limited. For example, the doping concentration of the P + doping layer 8 may be 8 × 10¹⁶。

Referring to fig. 6, fig. 6 shows a schematic structural diagram of a third p-type crystalline silicon solar cell in an embodiment of the present invention.

Referring to fig. 6, the p-type crystalline silicon solar cell may further include, in addition to fig. 2: a passivation tunneling layer 19; a passivation tunneling layer 19 is deposited between the n-doped silicon film layer 16 and the p-type crystalline silicon substrate 12. The passivation tunneling layer 19 can passivate the heterojunction, the contact area of the battery emitter, and reduce surface recombination of the contact area.

In the embodiment of the present invention, optionally, the passivation tunneling layer 19 is a tunneling matrix doped with iii-group and/or v-group elements, and the tunneling matrix includes: the passivation tunneling layer can passivate a heterojunction and a contact region of a battery emitter, and surface recombination of the contact region is reduced; meanwhile, the group III and/or group V elements in the passivation tunneling layer 19 form quantum tunneling points, which are beneficial to transition of electrons and current transmission, and improve short-circuit current and open-circuit voltage.

In an embodiment of the invention, optionally, the concentration of the group iii element doped in the passivation tunneling layer 19 is greater than 10¹³cm^-3Of elements of group VThe concentration is greater than the concentration of the group III element. For example, if the passivation tunneling layer 19 is doped with both group III and group V elements, e.g., boron and phosphorus, the concentration of boron may be 2 × 10¹³cm^-3The concentration of the phosphorus element is greater than that of the boron element, and the concentration of the phosphorus element may be 10¹⁵cm^-3. If only group III elements are doped in the passivated tunneling layer 19, the concentration of group III elements is greater than 10¹³cm^-3For example, the concentration of boron element may be 2X 10¹³cm^-3. If only the passive tunneling layer 19 is doped with the group V element, the concentration of the group V element is greater than 10¹⁴cm^-3For example, the concentration of phosphorus element may be 10¹⁵cm^-3. Under the doping concentration, more quantum tunneling points are formed, transition of electrons and current transmission are facilitated, and short-circuit current and open-circuit voltage are further improved.

The embodiment of the present invention provides an alternative, the back metal electrode 11 may be a metal electrode not being the whole surface of the gate line electrode, which is favorable for reducing the cost.

The embodiment of the utility model provides an in, optional, the thickness of passivation tunneling layer 19 can be for 0.5 ~ 3 nm. The passivation tunneling layer 19 with the thickness range has a good passivation effect, and is more favorable for reducing the surface recombination of the contact region, so that the open-circuit voltage and the conversion efficiency of the battery are further improved. For example, the passivation tunneling layer 19 may be a 1.5nm silicon oxide layer.

Referring to fig. 7, fig. 7 shows a schematic structural diagram of a fourth p-type crystalline silicon solar cell in an embodiment of the present invention.

Referring to fig. 7, the p-type crystalline silicon solar cell may further include, in addition to fig. 2: a p + -doped layer 18 and a passivating tunneling layer 19. The positions, thicknesses, and the like of the p + -type doped layer 18 and the passivation tunneling layer 19 can be referred to the above description, and will not be described again to avoid redundancy.

As shown in fig. 7, in the p-type crystalline silicon solar cell, a p + + p + type high-low junction is formed between the local p + + type doped region 15 and the p + type doped layer 18 on the front surface of the p-type crystalline silicon substrate, so that the contact region on the front surface of the cell can be passivated, surface recombination of the contact region can be reduced, and open-circuit voltage and conversion efficiency of the cell can be further improved. On the reverse side of the p-type crystal silicon substrate, the passivation tunneling layer 19 can passivate a heterojunction and a contact region of a battery emitter, so that surface recombination of the contact region is reduced, and open-circuit voltage and conversion efficiency of the battery are further improved.

Referring to fig. 8, fig. 8 shows a schematic structural diagram of a front metal electrode or a back metal electrode in an embodiment of the present invention. The back metal electrode and/or the front metal electrode may include: a plurality of thin gate lines 131 and a plurality of main gate lines 132; the arrangement directions of the thin gate lines 131 and the main gate lines 132 are not overlapped; the main gate line 132 is connected to each thin gate line 131 as a thin gate line 131. Specifically, the main gate line 132 may be connected to each of the thin gate lines 131 as a connection electrode of the thin gate line 131.

In the embodiment of the present invention, the setting directions of the thin gate line 131 and the main gate line 132 are not overlapped, that is, the thin gate line 131 and the main gate line 132 may have a certain included angle. For example, referring to fig. 8, the thin gate lines 131 and the main gate lines 132 are arranged in directions perpendicular to each other.

In the embodiment of the present invention, it is optional that the thin grid lines are radially distributed. Specifically, the thin gate lines 131 are not arranged in parallel, and may be radially distributed around a convergence point of the circuit. Due to the convergence effect of the circuit, the current at the convergence point is large, the convergence point serves as the center, then, the number of the thin grid lines at the convergence point is large, the thickness of the thin grid lines at the convergence point is thick, and the current at the convergence point is large, so that the alternating current collection effect is favorably improved, and the battery efficiency is favorably improved.

In the embodiment of the present invention, optionally, each thin gate line 131 may be equal or unequal in length, and the thin gate line 131 may be straight, bent or curved. In the embodiment of the present invention, this is not particularly limited.

In the embodiment of the present invention, it is optional that, toward the direction in which the current converges, the interval between the thin gate lines becomes smaller. Specifically, the step of reducing the distance between the fine gate lines may include: the pitch between the thin gate lines may be gradually decreased. Towards the direction that the electric current assembles, the interval between the thin grid line 131 diminishes, accords with the characteristics that the current transmission assembles, does benefit to the collection route of optimizing the electric current, can improve the collection ability of electric current, promotes solar cell's generating efficiency.

Referring to fig. 8, alternatively, the bus bar may be composed of a plurality of pads and a connecting bar between the pads. Specifically, the main grid line 132 is composed of a plurality of bonding pads 1321 and connecting grid lines 1322 located between the bonding pads 1321, and the bonding pads 1321 are connected through the connecting grid lines 1322, so that compared with the prior art, the number of the bonding pads 1321 is small, consumption of silver paste is reduced, and cost is reduced; meanwhile, the number of the bonding pads 1321 is small, and the shading area is reduced. Meanwhile, the arrangement of the bonding pad 1321 can effectively ensure the yield and reliability of the battery strings connected in series.

Referring to fig. 9, fig. 9 is a flow chart illustrating steps of a method for producing a solar cell module according to an embodiment of the present invention. The method may be applied to the production of any of the solar cell modules described in the above embodiments. The method specifically comprises the following steps:

step 101, providing a lead group.

In the embodiment of the present invention, the description of the embodiment of the solar cell module can be referred to for the wire group, and the description is omitted here for avoiding redundancy.

And 102, stacking the lead group and the p-type crystalline silicon solar cells to enable a back metal electrode of one p-type crystalline silicon solar cell to correspond to the second hot melting conducting layer, and enable a front metal electrode of the other adjacent p-type crystalline silicon solar cell to correspond to the first hot melting conducting layer.

The embodiment of the utility model provides an in, can stack above-mentioned wire group and p type crystalline silicon solar cell through arm etc for a p type crystalline silicon solar cell's back metal electrode corresponds with second hot melt conducting layer, and another adjacent p type crystalline silicon solar cell's front metal electrode corresponds with first hot melt conducting layer.

103, heating the hot-melting conducting layer to a preset temperature, so that the hot-melting conducting layer is in hot-pressing connection or adhesive connection with a back metal electrode of one p-type crystalline silicon solar cell, and is in hot-pressing connection or adhesive connection with a front metal electrode of the p-type crystalline silicon solar cell adjacent to the one p-type crystalline silicon solar cell, and a solar cell assembly is obtained; the preset temperature is less than or equal to 180 ℃.

In the embodiment of the present invention, the hot-melt conductive layer is heated to a predetermined temperature of less than or equal to 180 ℃, so that the hot-melt conductive layer is hot-pressed or adhesively bonded to the back metal electrode of the p-type crystalline silicon solar cell, and the hot-pressed or adhesively bonded to the front metal electrode of the p-type crystalline silicon solar cell.

Specifically, the hot-melt conductive layer can be heated to a preset temperature of less than or equal to 180 ℃ by means of laser heating and the like. In the embodiment of the present invention, this is not particularly limited.

In an embodiment of the present invention, optionally, the back metal electrode and/or the front metal electrode includes: a plurality of thin gate lines and a plurality of main gate lines; the arrangement directions of the thin grid lines and the main grid lines are not coincident; the main gate line is connected to each of the thin gate lines. The fine grid lines are formed by deposition, and the main grid lines are formed at least by printing and sintering electrode paste.

Specifically, the structure of the back metal electrode and/or the front metal electrode may refer to fig. 8 and the related description of fig. 8, and is not repeated herein to avoid redundancy. The fine gate lines 131 may be formed by deposition, and the main gate lines 132 may be formed at least by printing and sintering an electrode paste. The printing may include screen printing or the like.

In the embodiment of the present invention, optionally, the main gate line with reference to fig. 8 is composed of a plurality of pads and a connecting gate line located between the pads; the pad is formed by printing and sintering electrode paste; the connecting grid line is formed by deposition. That is, the pads are formed by printing, which may include screen printing or the like, and sintering the electrode paste, which may reduce costs and ensure good soldering reliability. And depositing a metal layer between the adjacent bonding pads to form a connecting grid line, thereby obtaining the main grid line.

In the embodiment of the present invention, optionally, the deposition manner includes: at least one of laser transfer, electroless plating, sputtering, electrodeposition, physical vapor deposition, chemical vapor deposition, atomic layer deposition.

Specifically, the thin gate lines 131 or the connecting gate lines 1322 may be formed by any one of the 7 deposition methods or a combination of a plurality of methods. In the embodiment of the present invention, this is not particularly limited.

In the embodiment of the present invention, the thin gate lines 131 or the connecting gate lines 1322 formed by deposition may have a single-layer or two or more metal stack structures. Each layer of metal may be formed by the same deposition means or by different deposition means. In the embodiment of the present invention, this is not particularly limited.

For example, the first layer metal may be formed by electroless plating, the second layer may be formed by electrodeposition, or the first layer may be formed by sputtering or laser transfer, or the like. In the embodiment of the present invention, this is not particularly limited.

In the embodiment of the utility model provides an in, because the process of deposit does not need silver, and resistivity is lower, then, thin grid line, connecting grid line or p type crystalline silicon solar cell etc. of formation, it is with low costs and electrically conductive effectual. Meanwhile, the thin grid lines and the connecting grid lines formed by deposition have good connection reliability, the body resistance and the series resistance of the front metal electrode or the back metal electrode are reduced, and the photoelectric conversion efficiency of the solar cell module is improved.

It should be noted that, for the above method embodiment, the solar cell module, the wires, the p-type crystalline silicon solar cell, and the relevant portions of each layer or each region of the p-type crystalline silicon solar cell may refer to the relevant portions in the foregoing solar cell module embodiment, and therefore, in order to avoid repetition, the details are not repeated here.

It should be noted that, for simplicity of description, the method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the embodiments are not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the embodiments. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the embodiments of the application. Fig. 10 shows a schematic structural diagram of a solar module production apparatus according to a fifth embodiment of the present invention.

As shown in fig. 10, the solar cell module production apparatus provided by the embodiment of the present invention may include: an interface 71, a processor 72, a memory 73, and a bus 74; wherein, the bus 74 is used for realizing the connection communication among the interface 71, the processor 72 and the memory 73; the memory 73 stores executable programs, and the processor 72 is configured to execute the executable programs stored in the memory 73 to implement the steps of fig. 9 or solar cell module production, and achieve the same or similar effects, which is not described herein again to avoid repetition. The utility model provides a computer readable storage medium, computer readable storage medium stores one or more executable program, one or more executable program can be carried out by one or more treater to realize like FIG. 9, or the step of solar module production, and can reach the same or similar effect, avoid repetition, no longer describe here.

While the embodiments of the present invention have been described with reference to the accompanying drawings, the present invention is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many modifications may be made by one skilled in the art without departing from the spirit and scope of the present invention as defined in the appended claims.

Claims

1. A solar cell module, comprising: the solar cell comprises a plurality of p-type crystalline silicon solar cells and a plurality of lead groups for connecting the adjacent p-type crystalline silicon solar cells;

the p-type crystalline silicon solar cell includes:

a p-type crystalline silicon substrate;

the lead includes a base wire; the base string comprises a first connecting section positioned at one end of the base string, a second connecting section positioned at the other end of the base string, and a middle section positioned between the first connecting section and the second connecting section;

the wire further comprises a heat-fusible conductive layer at least partially wrapped around the base string surface; the hot melting conducting layer comprises a first hot melting conducting layer used for hot-pressing or adhesive connection of a front metal electrode of one p-type crystalline silicon solar cell and a second hot melting conducting layer used for hot-pressing or adhesive connection of a back metal electrode of another adjacent p-type crystalline silicon solar cell; the first hot-melt conductive layer is wrapped on the surface of the first connecting section; the second hot-melt conductive layer is wrapped on the surface of the second connecting section;

the width of the conducting wire is greater than or equal to 50 micrometers and less than or equal to 1000 micrometers.

2. The solar cell module of claim 1, wherein the cross-sectional shape of the wire is at least one of circular, rectangular, or trapezoidal; the preset number is 10-18;

the base line is at least one of a copper base line or an aluminum base line.

3. The solar cell module according to claim 1, wherein the thermally fusible conductive layer is a metal element or a metal alloy having a melting point of 70-180 ℃.

4. The solar cell module of claim 3 wherein the thermally fused conductive layer is at least one of silver, bismuth, cadmium, gallium, indium, lead, tin, titanium, zinc.

5. The solar cell module according to claim 1, wherein the thermally fused conductive layer is a conductive resin having a softening temperature of 90-120 ℃;

the conductive resin includes: a resin base material and conductive particles provided inside the resin base material;

the resin substrate is selected from at least one of cellulose acetate, fluorine resin, polysulfone resin, polyester resin, polyamide resin, polyurethane resin and polyolefin resin;

the conductive particles are selected from: at least one of gold, silver, copper, aluminum, zinc, nickel, and graphite;

the shape of the conductive particles is granular and/or flake.

6. The solar cell module as claimed in claim 1, wherein all of the first connecting segments of the wire set are embedded in a thermoplastic polymer film; all the second connecting sections in the lead group are embedded in another thermoplastic polymer film;

the thermoplastic polymer film is selected from: at least one of a polyvinyl butyral film, a polyolefin film, or an ethylene-vinyl acetate copolymer film.

7. The solar cell module as claimed in claim 1, wherein the thickness of the thermally fusible conductive layer is 1 micron or more and 10 microns or less.

8. The solar cell module as claimed in claim 7, wherein the p-type crystalline silicon solar cell further comprises: and the p + type doping layer is doped in a region which is formed between the front antireflection layer and the p-type crystal silicon substrate and is outside the local p + + type doping region.

9. The solar cell assembly according to claim 7, wherein the back side metal electrode and/or the front side metal electrode comprises: a plurality of thin gate lines and a plurality of main gate lines; the arrangement directions of the thin grid lines and the main grid lines are not coincident; the main grid line is connected with each thin grid line;

the thin grid lines are distributed in a radial shape;

the main grid line is composed of a plurality of bonding pads and connecting grid lines positioned between the bonding pads.

10. The solar cell module according to any one of claims 1 to 9, wherein the p-type crystalline silicon solar cell further comprises: and the passivation tunneling layer is deposited between the n-type doped silicon film layer and the p-type crystal silicon substrate.