CN111900175A - 一种显示面板的制作方法和显示面板 - Google Patents
一种显示面板的制作方法和显示面板 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 28
- 229910052751 metal Inorganic materials 0.000 claims abstract description 162
- 239000002184 metal Substances 0.000 claims abstract description 161
- 238000004070 electrodeposition Methods 0.000 claims abstract description 85
- 229910000881 Cu alloy Inorganic materials 0.000 claims abstract description 77
- 239000000758 substrate Substances 0.000 claims abstract description 75
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- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 52
- 229910052750 molybdenum Inorganic materials 0.000 claims description 51
- 239000011733 molybdenum Substances 0.000 claims description 51
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- 239000000126 substance Substances 0.000 claims description 27
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- 238000006722 reduction reaction Methods 0.000 claims description 20
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 claims description 19
- 229910052802 copper Inorganic materials 0.000 claims description 18
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 17
- 239000011651 chromium Substances 0.000 claims description 16
- 238000000151 deposition Methods 0.000 claims description 16
- ZCDOYSPFYFSLEW-UHFFFAOYSA-N chromate(2-) Chemical compound [O-][Cr]([O-])(=O)=O ZCDOYSPFYFSLEW-UHFFFAOYSA-N 0.000 claims description 15
- 229910052804 chromium Inorganic materials 0.000 claims description 15
- 229910001431 copper ion Inorganic materials 0.000 claims description 13
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- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
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- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- TWRXJAOTZQYOKJ-UHFFFAOYSA-L Magnesium chloride Chemical compound [Mg+2].[Cl-].[Cl-] TWRXJAOTZQYOKJ-UHFFFAOYSA-L 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- WCUXLLCKKVVCTQ-UHFFFAOYSA-M Potassium chloride Chemical compound [Cl-].[K+] WCUXLLCKKVVCTQ-UHFFFAOYSA-M 0.000 description 2
- FAPWRFPIFSIZLT-UHFFFAOYSA-M Sodium chloride Chemical compound [Na+].[Cl-] FAPWRFPIFSIZLT-UHFFFAOYSA-M 0.000 description 2
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- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 description 1
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- DBMJMQXJHONAFJ-UHFFFAOYSA-M Sodium laurylsulphate Chemical compound [Na+].CCCCCCCCCCCCOS([O-])(=O)=O DBMJMQXJHONAFJ-UHFFFAOYSA-M 0.000 description 1
- 229920002125 Sokalan® Polymers 0.000 description 1
- GXDVEXJTVGRLNW-UHFFFAOYSA-N [Cr].[Cu] Chemical compound [Cr].[Cu] GXDVEXJTVGRLNW-UHFFFAOYSA-N 0.000 description 1
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- 239000011362 coarse particle Substances 0.000 description 1
- 229910000365 copper sulfate Inorganic materials 0.000 description 1
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 1
- XTVVROIMIGLXTD-UHFFFAOYSA-N copper(II) nitrate Chemical compound [Cu+2].[O-][N+]([O-])=O.[O-][N+]([O-])=O XTVVROIMIGLXTD-UHFFFAOYSA-N 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
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- 239000004584 polyacrylic acid Substances 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
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- 239000001103 potassium chloride Substances 0.000 description 1
- 235000011164 potassium chloride Nutrition 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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Abstract
本申请公开了一种显示面板的制作方法和显示面板,包括形成阵列基板的制程,形成阵列基板的制程包括步骤:在玻璃基板上形成预设图案的缓冲层;将形成有缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层;对铜合金金属层进行加热退火处理,形成第一金属层;在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层,其中,第一金属层包括缓冲层和铜合金金属层。本方案中,由于使用电化学沉积的方式,省去了刻蚀工艺,从而提升良率。
Description
技术领域
本申请涉及显示技术领域,尤其涉及一种显示面板的制作方法和显示面板。
背景技术
在显示面板中,显示面板包括TFT(Thin Film Transistor,薄膜晶体管),其中TFT包括栅极、源极和漏极,栅极、源极和漏极是由金属构成,通常使用的是Al(铝),Al/Mo(铝/钼),Al/Ti(铝/钛)等组合而成,但是随着对显示面板的需求越来越高,Al由于低的电导率已很难满足快速的电子传输需求,Cu(铜)工艺由于诸多优点已成为下一代TFT的开发趋势和工艺需求。
通常Cu制程会存在一些问题,例如刻蚀问题,刻蚀差异使得图形化面临良率低和成本高的难题。
发明内容
本申请的目的是提供一种显示面板的制作方法和显示面板,节能环保,改善电镀的高污染高能耗问题。
本申请公开了一种显示面板的制作方法,包括形成阵列基板的制程,形成所述阵列基板的制程包括步骤:
在玻璃基板上形成预设图案的缓冲层;
将形成有缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层;
对铜合金金属层进行加热退火处理,形成第一金属层;以及
在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层;
其中,第一金属层包括缓冲层和铜合金金属层。
可选的,所述在玻璃基板上形成预设图案的缓冲层的步骤中,所述缓冲层包括钼缓冲层或钼合金缓冲层。
可选的,所述将形成有缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层的步骤包括子步骤:
将形成有钼缓冲层或钼合金缓冲层的玻璃基板和对电极放入电化学沉积液中;
施加脉冲电压使对电极和钼缓冲层或钼合金缓冲层形成电流回路以生成一种或多种金属单质;以及
一种或多种金属单质沉积在钼缓冲层或钼合金缓冲层的表面形成铜合金金属层。
可选的,所述将形成有缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层,所述电化学沉积液中包括二价铜离子和铬酸根离子。
可选的,所述施加脉冲电压使对电极和钼缓冲层或钼合金缓冲层形成电流回路以生成一种或多种金属单质的步骤包括子步骤:
先施加电位为0.3419V的脉冲电压40秒至80秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中二价铜离子发生还原反应,生成铜单质;
然后施加电位为-0.740V的脉冲电压5秒至10秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,生成铬单质,以获得铜合金金属层。
可选的,所述将形成有缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层的步骤包括子步骤:
将形成有钼缓冲层或钼合金缓冲层的玻璃基板放入含有二价铜离子的电化学沉积液中,沉积30秒至100秒,生成铜金属单质;以及
放入含有铬酸根离子的电化学沉积液中,沉积5秒至30秒,生成铬金属单质,以形成铜合金金属层。
可选的,所述对铜合金金属层进行加热退火处理,形成第一金属层的步骤包括:
对铜合金金属层进行加热,加热温度为300摄氏度至500摄氏度,加热时间为30分钟至120分钟,使得铬扩散到表面,形成位于铜合金金属层表面的钝化保护层。
可选的,所述在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层的步骤中,其中形成第二金属层的步骤包括:
在有源层上沉积预设图案的钼缓冲层或钼合金缓冲层;
将形成有钼缓冲层或钼合金缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层;以及
对铜合金金属层进行加热退火处理,形成第二金属层;
其中,第二金属层包括缓冲层和铜合金金属层。
本申请还公开了一种显示面板的制作方法,包括形成阵列基板的制程,形成所述阵列基板的制程包括步骤:
在玻璃基板上形成预设图案的钼缓冲层或钼合金缓冲层;
将形成有钼缓冲层或钼合金缓冲层的玻璃基板,以及共同形成电流回路的对电极,放入含有铜金属离子和铬金属离子的电化学沉积液中,通过短路条,由扫描线施加脉冲电压,使对电极和钼缓冲层或钼合金缓冲层形成电流回路;
施加电位为0.3419V的脉冲电压40秒至80秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中二价铜离子发生还原反应,生成铜单质;之后施加电位为-0.740V的脉冲电压5秒至10秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中铬酸根发生还原反应,生成铬单质,以获得铜合金金属层;
对铜合金金属层进行加热,加热温度为300摄氏度至500摄氏度,加热时间为30分钟至120分钟,使得铬扩散到表面,形成位于铜合金金属层表面的钝化保护层,形成的缓冲层和铜合金金属层作为栅极金属层和/或扫描线金属层;以及
在栅极金属层和/或扫描线金属层上依次形成绝缘层、有源层、源漏极金属层和/或数据线金属层、钝化层和透明电极层。
本申请还公开了一种显示面板,包括采用上述所述的显示面板的制作方法制成的阵列基板,以及与所述阵列基板相对设置的彩膜基板。
相对于在形成第一金属层时需要刻蚀铜的方案来说,本申请通过先在玻璃基板上形成与第一金属层对应的预设图案的缓冲层,然后将形成有预设图案的缓冲层放入电化学沉积装置中,沉积铜合金金属层,经过加热退火处理形成预设图案的铜合金金属层第一金属层。在形成铜合金金属层作为第一金属层时,不需要经过刻蚀工艺,因此节省了刻蚀工艺,因此可以避免因刻蚀工艺带来的良率低和成本高的问题,提升了产品良率以及降低成本。
附图说明
所包括的附图用来提供对本申请实施例的进一步的理解,其构成了说明书的一部分,用于例示本申请的实施方式,并与文字描述一起来阐释本申请的原理。显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。在附图中:
图1是本申请的一实施例的一种显示面板的制作方法的流程示意图;
图2是本申请图1的流程图中步骤S2的过程流程示意图;
图3是本申请的一实施例电化学沉积装置示意图;
图4是本申请图1的流程图中步骤S2另一实施例的过程流程示意图;
图5是本申请的一实施例的一种显示面板的第二金属层的制作方法流程示意图;
图6是本申请的另一实施例的一种显示面板的制作方法流程示意图;
图7是本申请的一实施例的一种显示面板的阵列基板的结构示意图。
其中,100、玻璃基板;110、缓冲层;120、栅极;130、绝缘层;140、有源层;150、源极;160、漏极;170、铜合金金属层;180、脉冲电源;190、对电极。
具体实施方式
需要理解的是,这里所使用的术语、公开的具体结构和功能细节,仅仅是为了描述具体实施例,是代表性的,但是本申请可以通过许多替换形式来具体实现,不应被解释成仅受限于这里所阐述的实施例。
在本申请的描述中,术语“第一”、“第二”仅用于描述目的,而不能理解为指示相对重要性,或者隐含指明所指示的技术特征的数量。由此,除非另有说明,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征;“多个”的含义是两个或两个以上。术语“包括”及其任何变形,意为不排他的包含,可能存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
另外,“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系的术语,是基于附图所示的方位或相对位置关系描述的,仅是为了便于描述本申请的简化描述,而不是指示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。
此外,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连,或是两个元件内部的连通。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本申请中的具体含义。
一种显示面板,包括TFT(Thin Film Transistor,薄膜晶体管),薄膜晶体管包括栅极、源极和漏极,显示面板还包括数据线,其中栅极、源漏电极和数据线是由金属构成,常规使用的是Al(铝),Al/Mo(铝/钼),Al/Ti(铝/钛)等组合而成,随着对显示面板的需求越来越高,Cu工艺由于诸多优点已成为下一代TFT的开发趋势和工艺需求。但是在实际的TFT开发过程中,Cu的刻蚀问题一直是影响铜制程的关键因素。
下面参考附图和可选的实施例对本申请作详细说明。
图1是本申请的一实施例的一种显示面板的制作方法的流程示意图,如图1所示,本申请公开了一种显示面板的制作方法,包括形成阵列基板的制程,形成所述阵列基板的制程包括步骤:
S1:在玻璃基板上形成预设图案的缓冲层;
S2:将形成有预设图案的缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与预设图案的缓冲层对应的铜合金金属层,其中,铜合金金属层的位置与预设图案的缓冲层的位置对应;
S3:对铜合金金属层进行加热退火处理,形成包括预设图案的缓冲层和铜合金金属层的第一金属层;以及
S4:在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层;
其中,预设图案的形状与第一金属层的图案形状对应。
相对于在形成第一金属层时需要刻蚀铜的方案来说,本申请通过先在玻璃基板上形成与第一金属层对应的预设图案的缓冲层,然后将形成有预设图案的缓冲层放入电化学沉积装置中,沉积铜合金金属层,经过加热退火处理形成预设图案的铜合金金属层第一金属层。在形成铜合金金属层作为第一金属层时,不需要经过刻蚀工艺,因此节省了刻蚀工艺,因此可以避免因刻蚀工艺带来的良率低和成本高的问题,提升了产品良率以及降低成本。
具体的,当阵列基板上形成的薄膜晶体管(TFT)为底栅型的结构时,第一金属层包括通过电化学沉积同层形成的栅极和扫描线,当然TFT也可以为顶栅型的结构,也适用电化学沉积的方法形成栅极。
其中,电化学沉积的技术原理为:电化学沉积是指在外电场作用下电流通过电解质溶液中正负离子的迁移并在电极上发生得失电子的氧化还原反应而形成镀层的技术。
具体的,所述在玻璃基板上形成预设图案的缓冲层的步骤中,所述缓冲层包括钼缓冲层或钼合金缓冲层。通过设置钼缓冲层或钼合金缓冲层,这样有利于提高与玻璃基板的附着力,当然,所述缓冲层还可以包括Ti(钛)/MoN(氮化钼)等。
图2是本申请图1的流程图中步骤S2的过程流程示意图,图3是本申请的一实施例电化学沉积装置示意图,如图2和如图3所示,在玻璃基板上形成预设图案的缓冲层的步骤S1之后,进行将形成有预设图案的缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与预设图案的缓冲层对应的铜合金金属层的步骤S2,包括子步骤:
S21:将形成有预设图案的钼缓冲层或钼合金缓冲层的玻璃基板和对电极放入电化学沉积液中;
S22:施加脉冲电压使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中金属阳离子发生还原反应,生成一种或多种金属单质;以及
S23:所述一种或多种金属单质沉积在钼缓冲层或钼合金缓冲层的表面形成与预设图案的缓冲层对应的铜合金金属层;
其中,电化学沉积装置包括电化学沉积液、脉冲电源180、连接于所述脉冲电源一端的对电极190,所述脉冲电源190的另一端连接于所述钼缓冲层或钼合金缓冲层。
通过将形成有含有钼或钼合金的缓冲层的玻璃基板以及提供体系电流的对电极放入电化学沉积液中,施加脉冲电压从而形成整个电流回路。通过施加电压的方式,可以定量控制沉中的金属元素比例,使得形成的不同金属的成分可以得到较精确的控制。其中,对电极作为阳极,含有钼缓冲层或者钼合金缓冲层的玻璃基板作为阴极,电化学沉积液中的金属阳离子在阴极发生还原反应,生成金属单质沉积在玻璃基板表面,电化学性质稳定,形成金属单质也比较稳定。电化学沉积操作的持续时间为1分钟。一般的我们需要的膜层的厚度为3000-4000埃米,电化学沉积操作的持续时间为1分钟形成的厚度比较合适。
所述将形成有预设图案的缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与预设图案的缓冲层对应的铜合金金属层,所述电化学沉积液中包括二价铜离子和铬酸根离子。通过控制电化学沉积液中二价铜离子(Cu2+)和铬酸根离子(CrO4 2-)的浓度,从而使得形成的铜-铬合金结合强度更好。
其中,在所述施加脉冲电压使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中金属阳离子发生还原反应,生成一种或多种金属单质的步骤包括子步骤:
施加电位为0.3419V的脉冲电压40秒至80秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中二价铜离子发生还原反应,生成铜单质;以及
之后施加电位为-0.740V的脉冲电压5秒至10秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中铬酸根发生还原反应,生成铬单质,以获得铜合金金属层。
对于控制沉积的合金成分通过调节电压来实现控制的方案来说,由于cu和cr的还原电位电位不一样,通过施加不同的还原电位以及控制施加对应不同电位的持续时间,进行控制沉积的速率,从而可以较精确的控制合金成分沉积的量,有利于提升形成的合金的性能。而且通过电压进行控制的方式,操作简单,容易控制。
其中,Cu2+和CrO4 2-对应的还原表达式为:Cu2++2e=Cu;CrO4 2-+4H2O+6e→Cr+8OH-。铜金属离子的还原电位为0.3419V,铬金属离子的还原电位为-0.740V。比如CrO4 2-还原为Cr3+的电位是-0.740V,在较小的电位下,Cu2+是无法被还原的,只能还原Cr3+,我们可以通过控制电化学沉积液中各离子浓度和电位结合的方法进行控制,比如开始在较高的电位下(即大于0.3419V),电解液中有Cu2+,没有CrO4 2-或者量很少,只能进行Cu2+的还原沉积,在较低电位下(-0.740V到0.3419V),只能进行CrO4 2-的还原,这时在电解液中添加一定浓度的CrO4 2-进行合金离子的沉积。
控制合金成分的沉积量可以通过调节脉冲电压的方式控制,还可以通过控制浓度的方式实现控制。图4是本申请图1的流程图中步骤S2另一实施例的过程流程示意图,如图4所示,具体的,所述将形成有预设图案的缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与预设图案的缓冲层对应的铜合金金属层的步骤S2包括子步骤:
S21:将形成有预设图案的钼缓冲层或钼合金缓冲层的玻璃基板放入含有二价铜离子的电化学沉积液中,沉积30秒至100秒,生成铜金属单质;以及
S22:放入含有铬酸根离子的电化学沉积液中,沉积5秒至30秒,生成铬金属单质,以形成铜合金金属层。
通过单独放入不同的电化学沉积中,即不同的电化学沉积液中含有不同的离子,且浓度都相对于比较高,通过控制电化学沉积液的浓度,从而得到不同占比的合金成分,有利于有利于提升形成的合金的性能。
以含有Cu2+的电化学沉积液为例,具体的组成成分以及对应的浓度范围为:Cu2+,例如硫酸铜,硝酸铜,氯化铜等,浓度范围为120-250g/L,酸,例如硫酸、盐酸、磷酸等,浓度范围为30-100g/L,光亮剂,例如十二醇硫酸醋钠,聚氧乙烯类,丙烯磺酸钠等,浓度范围为0.3-1ml/L,氯离子,例如氯化钠、氯化钾、氯化镁等,浓度范围为30-120mg/L,整平剂,例如聚苯乙烯,聚丙烯酸,聚乙烯醇等,浓度范围为0.1-0.8ml/L,还包括其他添加剂,例如润湿、开杠剂等,浓度范围为0.1-1.5ml/L。
在将形成有预设图案的缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与预设图案的缓冲层对应的铜合金金属层的步骤之后,进行对铜合金金属层进行加热退火处理形成包括预设图案的缓冲层和铜合金金属层的第一金属层的步骤,具体包括子步骤:
对铜合金金属层进行加热,加热温度为300摄氏度至500摄氏度,加热时间为30分钟至120分钟,使得铬扩散到表面,形成位于铜合金金属层表面的钝化保护层。
在加热退火的过程中,退火可以将沉积Cu和Cr原子晶格重排,形成我们需要的晶格结构,另外利用合金的自扩散性,温度不同,扩散系数不同,其中,铬的热扩散系数相对较大,使得铬扩散到表面,形成一层钝化保护层,形成的钝化层保护层可以对Cu起到保护作用,阻止Cu向其他层扩散,从而提高器件性能。
图5是本申请的一实施例的一种显示面板的第二金属层的制作方法流程示意图,如图5所示,所述在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层以形成阵列基板的步骤S4中,其中形成第二金属层的步骤包括:
S41:在有源层上沉积预设图案的钼缓冲层或钼合金缓冲层;
S42:将形成有预设图案的钼缓冲层或钼合金缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与预设图案的缓冲层对应的铜合金金属层;以及
S43:对铜合金金属层进行加热退火处理形成包括预设图案的缓冲层和铜合金金属层的第二金属层。
通过先在有源层上形成与第一金属层对应的预设图案的缓冲层,然后将形成有预设图案的缓冲层放入电化学沉积装置中,沉积铜合金金属层,经过加热退火处理形成预设图案的铜合金金属层第二金属层。在形成铜合金金属层作为第二金属层时,不需要经过刻蚀工艺,因此节省了刻蚀工艺,因此可以避免因刻蚀工艺带来的良率低和成本高的问题,提升了产品良率以及降低成本。另外缓冲层包括钼金属缓冲层和钼合金缓冲层可以提升附着力。
图6是本申请的另一实施例的一种显示面板的制作方法流程示意图,如图6所示,作为本申请的另一实施例,本申请还公开了一种显示面板的制作方法,包括形成阵列基板的制程,形成所述阵列基板的制程包括步骤:
S1:在玻璃基板上形成预设图案的钼缓冲层或钼合金缓冲层;
S21:将形成有预设图案的钼缓冲层或钼合金缓冲层的玻璃基板,以及共同形成电流回路的对电极,放入含有铜金属离子和铬金属离子的电化学沉积液中;通过短路条,由扫描线施加脉冲电压,使对电极和钼缓冲层或钼合金缓冲层形成电流回路;
S22:施加电位为0.3419V的脉冲电压40秒至80秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中二价铜离子发生还原反应,生成铜单质;然后施加电位为-0.740V的脉冲电压5秒至10秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中铬酸根发生还原反应,生成铬单质,以获得铜合金金属层;
S3:对铜合金金属层进行加热,加热温度为300摄氏度至500摄氏度,加热时间为30分钟至120分钟,使得铬扩散到表面,形成位于铜合金金属层表面的钝化保护层,形成的预设图案的缓冲层和铜合金金属层作为栅极金属层和/或扫描线金属层;以及
S4:在栅极金属层和/或扫描线金属层上依次形成绝缘层、有源层、源漏极金属层和/或数据线金属层、钝化层和透明电极层以形成阵列基板。
本申请通过先在玻璃基板上形成与第一金属层对应的预设图案的缓冲层,然后将形成有预设图案的缓冲层放入电化学沉积装置中,沉积铜合金金属层,经过加热退火处理形成预设图案的铜合金金属层第一金属层。在形成铜合金金属层作为第一金属层时,不需要经过刻蚀工艺,因此节省了刻蚀工艺,因此可以避免因刻蚀工艺带来的良率低和成本高的问题,提升了产品良率以及降低成本。在热退火的过程中,利用合金的自扩散性,温度不同,扩散系数不同,形成一层钝化保护层,形成的钝化层保护层可以对Cu起到保护作用,阻止Cu向其他层扩散,从而提高器件性能。采用电化学沉积工艺,在常温液相中制备,避免因形成粗大的颗粒而导致表面平整度差引起电导率下降的问题。
图7是本申请的一实施例的一种显示面板的结构示意图,如图7所示,本申请还公开了一种显示面板,采用上述的显示面板的制作方法制成的阵列基板,以及与所述阵列基板相对设置的彩膜基板。所述阵列基板包括玻璃基板100、缓冲层110、栅极120、绝缘层130、有源层140、源极150、漏极160、钝化层和透明电极层,所述缓冲层设置在所述玻璃基板上;所述栅极设置在所述缓冲层上;所述绝缘层覆盖所述栅极;所述有源层设置在所述绝缘层上;所述源极和漏极设置在所述有源层的两侧;在源极和漏极上依次形成钝化层和透明电极层。
需要说明的是,本方案中涉及到的各步骤的限定,在不影响具体方案实施的前提下,并不认定为对步骤先后顺序做出限定,写在前面的步骤可以是在先执行的,也可以是在后执行的,甚至也可以是同时执行的,只要能实施本方案,都应当视为属于本申请的保护范围。
本申请的技术方案可以广泛用于各种显示面板,如TN(Twisted Nematic,扭曲向列型)显示面板、IPS(In-Plane Switching,平面转换型)显示面板、VA(VerticalAlignment,垂直配向型)显示面板、MVA(Multi-Domain Vertical Alignment,多象限垂直配向型)显示面板,当然,也可以是其他类型的显示面板,如OLED(Organic Light-EmittingDiode,有机发光二极管)显示面板,均可适用上述方案。
以上内容是结合具体的可选实施方式对本申请所作的进一步详细说明,不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说,在不脱离本申请构思的前提下,还可以做出若干简单推演或替换,都应当视为属于本申请的保护范围。
Claims (10)
1.一种显示面板的制作方法,其特征在于,包括形成阵列基板的制程,形成所述阵列基板的制程包括步骤:
在玻璃基板上形成预设图案的缓冲层;
将形成有缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层;
对铜合金金属层进行加热退火处理,形成第一金属层;以及
在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层;
其中,第一金属层包括缓冲层和铜合金金属层。
2.如权利要求1所述的一种显示面板的制作方法,其特征在于,所述在玻璃基板上形成预设图案的缓冲层的步骤中,所述缓冲层包括钼缓冲层或钼合金缓冲层。
3.如权利要求2所述的一种显示面板的制作方法,其特征在于,所述将形成有缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层的步骤包括子步骤:
将形成有钼缓冲层或钼合金缓冲层的玻璃基板和对电极放入电化学沉积液中;
施加脉冲电压使对电极和钼缓冲层或钼合金缓冲层形成电流回路,以生成一种或多种金属单质;以及
一种或多种金属单质沉积在钼缓冲层或钼合金缓冲层的表面形成铜合金金属层。
4.如权利要求3所述的一种显示面板的制作方法,其特征在于,所述将形成有缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层,所述电化学沉积液中包括二价铜离子和铬酸根离子。
5.如权利要求4所述的一种显示面板的制作方法,其特征在于,
所述施加脉冲电压使对电极和钼缓冲层或钼合金缓冲层形成电流回路以生成一种或多种金属单质的步骤包括子步骤:
先施加电位为0.3419V的脉冲电压40秒至80秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中二价铜离子发生还原反应,生成铜单质;
然后施加电位为-0.740V的脉冲电压5秒至10秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,生成铬单质,以获得铜合金金属层。
6.如权利要求1所述的一种显示面板的制作方法,其特征在于,所述将形成有缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层的步骤包括子步骤:
将形成有钼缓冲层或钼合金缓冲层的玻璃基板放入含有二价铜离子的电化学沉积液中,沉积30秒至100秒,生成铜金属单质;以及
放入含有铬酸根离子的电化学沉积液中,沉积5秒至30秒,生成铬金属单质,以形成铜合金金属层。
7.如权利要求1所述的一种显示面板的制作方法,其特征在于,所述对铜合金金属层进行加热退火处理,形成第一金属层的步骤包括:
对铜合金金属层进行加热,加热温度为300摄氏度至500摄氏度,加热时间为30分钟至120分钟,使得铬扩散到表面,形成位于铜合金金属层表面的钝化保护层。
8.如权利要求1所述的一种显示面板的制作方法,其特征在于,所述在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层的步骤中,其中形成第二金属层的步骤包括:
在有源层上沉积预设图案的钼缓冲层或钼合金缓冲层;
将形成有钼缓冲层或钼合金缓冲层的玻璃基板放入电化学沉积装置中,进行电化学沉积,形成与缓冲层对应的铜合金金属层;以及
对铜合金金属层进行加热退火处理,形成第二金属层;
其中,第二金属层包括缓冲层和铜合金金属层。
9.一种显示面板的制作方法,其特征在于,包括形成阵列基板的制程,形成所述阵列基板的制程包括步骤:
在玻璃基板上形成预设图案的钼缓冲层或钼合金缓冲层;
将形成有钼缓冲层或钼合金缓冲层的玻璃基板,以及共同形成电流回路的对电极,放入含有铜金属离子和铬金属离子的电化学沉积液中,通过短路条,由扫描线施加脉冲电压,使对电极和钼缓冲层或钼合金缓冲层形成电流回路;
施加电位为0.3419V的脉冲电压40秒至80秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中二价铜离子发生还原反应,生成铜单质;之后施加电位为-0.740V的脉冲电压5秒至10秒,使对电极和钼缓冲层或钼合金缓冲层形成电流回路,促使电化学沉积液中铬酸根发生还原反应,生成铬单质,以获得铜合金金属层;
对铜合金金属层进行加热,加热温度为300摄氏度至500摄氏度,加热时间为30分钟至120分钟,使得铬扩散到表面,形成位于铜合金金属层表面的钝化保护层,形成的缓冲层和铜合金金属层作为栅极金属层和/或扫描线金属层;以及
在栅极金属层和/或扫描线金属层上依次形成绝缘层、有源层、源漏极金属层和/或数据线金属层、钝化层和透明电极层。
10.一种显示面板,其特征在于,包括采用如权利要求1至9任意一项所述的显示面板的制作方法制成的阵列基板,以及与所述阵列基板相对设置的彩膜基板。
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