CN111916353B - 一种显示面板的制作方法和显示面板 - Google Patents

一种显示面板的制作方法和显示面板 Download PDF

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CN111916353B
CN111916353B CN202010741292.XA CN202010741292A CN111916353B CN 111916353 B CN111916353 B CN 111916353B CN 202010741292 A CN202010741292 A CN 202010741292A CN 111916353 B CN111916353 B CN 111916353B
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layer
preset pattern
activating
forming
metal layer
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CN111916353A (zh
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夏玉明
叶利丹
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HKC Co Ltd
Chuzhou HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Chuzhou HKC Optoelectronics Technology Co Ltd
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Priority to US17/343,772 priority patent/US11830887B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1292—Multistep manufacturing methods using liquid deposition, e.g. printing
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1603—Process or apparatus coating on selected surface areas
    • C23C18/1607—Process or apparatus coating on selected surface areas by direct patterning
    • C23C18/1608—Process or apparatus coating on selected surface areas by direct patterning from pretreatment step, i.e. selective pre-treatment
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
    • C23C18/1689—After-treatment
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/18—Pretreatment of the material to be coated
    • C23C18/1851—Pretreatment of the material to be coated of surfaces of non-metallic or semiconducting in organic material
    • C23C18/1872—Pretreatment of the material to be coated of surfaces of non-metallic or semiconducting in organic material by chemical pretreatment
    • C23C18/1875—Pretreatment of the material to be coated of surfaces of non-metallic or semiconducting in organic material by chemical pretreatment only one step pretreatment
    • C23C18/1879—Use of metal, e.g. activation, sensitisation with noble metals
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31—Coating with metals
    • C23C18/38—Coating with copper
    • C23C18/40—Coating with copper using reducing agents
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/13629—Multilayer wirings
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0005—Production of optical devices or components in so far as characterised by the lithographic processes or materials used therefor
    • G03F7/0007—Filters, e.g. additive colour filters; Components for display devices

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Abstract

本申请公开了一种显示面板的制作方法和显示面板，包括形成阵列基板的制程，形成阵列基板的制程包括步骤：在玻璃基板上形成缓冲层；在缓冲层上形成光阻层；将形成有光阻层的基板放入活化剂中进行活化处理，活化剂与光阻层接触的对应位置形成第一预设图案的活化液粒子层；活化剂与缓冲层接触的对应位置形成第二预设图案的活化液粒子层；去除光阻层及形成第一预设图案的活化液粒子层；进行化学镀操作，对应与缓冲层接触的第二预设图案的活化液粒子层的位置，形成第一金属层。本方案中，由于使用化学镀操作，不需要通电，从而形成第一金属层，这样节能环保，改善电镀的高污染高能耗问题。

Description

一种显示面板的制作方法和显示面板
技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板的制作方法和显示面板。
背景技术
在显示面板中，显示面板包括TFT(Thin Film Transistor，薄膜晶体管)，其中TFT包括栅极、源极和漏极，栅极、源极和漏极是由金属构成，通常使用的是Al(铝)，Al/Mo(铝/钼),Al/Ti(铝/钛)等组合而成，但是随着对显示面板的需求越来越高，AL由于低的电导率已很难满足快速的电子传输需求，Cu(铜)工艺由于诸多优点已成为下一代TFT的开发趋势和工艺需求。
通常采用电镀的方法制成铜金属层，首先在基板上形成电极图案作为缓冲层，随后利用电镀的方法在缓冲层上镀铜金属，该方法采用的电镀工艺是一种高污染行业，其中涉及的电镀液处理问题是项重要的环保问题，目前很难大面积推广使用。
发明内容
本申请的目的是提供一种显示面板的制作方法和显示面板，节能环保，改善电镀的高污染高能耗问题。
本申请公开了一种显示面板的制作方法，包括形成阵列基板的制程，形成所述阵列基板的制程包括步骤：
在玻璃基板上形成缓冲层；
在缓冲层上形成第一预设图案的光阻层；
将形成有第一预设图案的光阻层的玻璃基板放入活化剂中进行活化处理，活化剂与第一预设图案的光阻层接触的对应位置形成第一预设图案的活化粒子层，活化剂与缓冲层接触的对应位置形成第二预设图案的活化粒子层；
去除第一预设图案的光阻层及第一预设图案的活化粒子层；
进行化学镀操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的第一金属层；以及
在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层。
可选的，所述进行化学镀操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的第一金属层的步骤之后还包括：
将缓冲层未被第二预设图案的第一金属层覆盖的位置蚀刻去除，形成第二预设图案的缓冲层；
其中，所述缓冲层包括钼缓冲层或钼合金缓冲层。
可选的，所述活化剂为活化液，所述活化处理为浸泡活化处理，所述活化粒子层为活化液粒子层；所述活化液的温度为10摄氏度至30摄氏度，所述浸泡活化处理的浸泡时间为10秒至100秒。
可选的，所述进行化学镀操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的第一金属层的步骤包括：
进行化学镀铜操作或化学镀镍操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的铜金属层或镍金属层作为第一金属层。
可选的，所述进行化学镀铜操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的铜金属层作为第一金属层的步骤包括：
在化学镀铜液中进行化学镀铜操作；
对应第二预设图案的活化粒子层的位置，形成第二预设图案的铜金属层作为第一金属层；
其中，所述化学镀铜液包括铜盐、还原剂、络合剂、加速剂、表面活性剂。
可选的，所述化学镀铜液的温度为50摄氏度至100摄氏度，所述化学镀铜操作的持续时间是0.1分钟至10分钟。
可选的，所述进行化学镀铜操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的铜金属层作为第一金属层的步骤之后还包括：
将形成有第二预设图案的铜金属层的玻璃基板放入温水中去除残余的化学镀铜液；
对去除残余化学镀铜液的玻璃基板进行退火处理；
其中，所述温水的温度为40摄氏度至60摄氏度。
可选的，所述在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层的步骤包括：
在有源层上形成钼缓冲层或钼合金缓冲层；
在钼缓冲层或钼合金缓冲层上形成第三预设图案的光阻层；
将形成有第三预设图案的光阻层的玻璃基板放入活化液中进行浸泡活化处理，活化液与第三预设图案的光阻层接触的对应位置形成第三预设图案的活化液粒子层，活化液与钼缓冲层接触的对应位置形成第四预设图案的活化液粒子层；
去除第三预设图案的光阻层及第三预设图案的活化液粒子层；
进行化学镀铜操作，对应第四预设图案的活化液粒子层的位置，形成第四预设图案的铜金属层作为第二金属层；以及
在第二金属层上依次形成钝化层和透明电极层。
本申请还公开了一种显示面板的制作方法，包括形成阵列基板的制程，形成所述阵列基板的制程包括步骤：
在玻璃基板上金属溅射形成钼缓冲层；
在钼缓冲层上形成第一预设图案的光阻层；
将形成有第一预设图案的光阻层的玻璃基板放入温度为10摄氏度至30摄氏度的活化液中进行浸泡活化处理，浸泡10秒至100秒；
活化液与第一预设图案的光阻层接触的对应位置形成第一预设图案的活化液粒子层，活化液与钼缓冲层接触的对应位置形成第二预设图案的活化液粒子层；
去除第一预设图案的光阻层及第一预设图案的活化液粒子层；
将去除第一预设图案的光阻层及第一预设图案的活化液粒子层并形成有第二预设图案的活化液粒子层的玻璃基板，放入温度为75摄氏度至90摄氏度的化学镀铜液中进行化学镀铜操作，持续0.3分钟至3分钟；
对应第二预设图案的活化液粒子层的位置，形成第二预设图案的铜金属层作为栅极金属层和/或扫描线金属层；
将形成有第二预设图案的铜金属层的玻璃基板，放入温度为40摄氏度至60摄氏度的温水中去除残余的化学镀铜液；
对去除残余的化学镀铜液的玻璃基板进行退火处理；
用干法蚀刻工艺将钼缓冲层对应未被第二预设图案的铜金属层覆盖的位置蚀刻去除，形成第二预设图案的钼缓冲层；以及
在栅极金属层和/或扫描线金属层上依次形成绝缘层、有源层、源漏极金属层和/或数据线金属层、钝化层和透明电极层；
其中，所述化学镀铜液包括铜盐、还原剂、络合剂、加速剂、表面活性剂。
本申请还公开了一种显示面板，采用上述的显示面板的制作方法制成的阵列基板，以及与所述阵列基板相对设置的彩膜基板。
相对于采用电镀的方法在玻璃基板上形成电极图案作为缓冲层，随后利用电镀的方法在缓冲层上镀铜的方案来说，本方案中，在缓冲层上，预先通过光阻层和活化处理得到第二预设图案的活化粒子层，然后在化学镀操作中形成与第二预设图案的活化粒子层对应的第一金属层。其中，由于使用第一金属层通过化学镀形成，化学镀是依据氧化还原反应原理，不需要通电，这样节能环保，改善电镀的高污染高能耗问题，同时节省了蚀刻工艺。
附图说明
所包括的附图用来提供对本申请实施例的进一步的理解，其构成了说明书的一部分，用于例示本申请的实施方式，并与文字描述一起来阐释本申请的原理。显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1是本申请的一实施例的一种显示面板的制作方法的流程示意图；
图2是本申请图1的流程图中步骤S5的过程流程示意图；
图3是本申请的一实施例的形成第二金属层的方法流程示意图；
图4是本申请的一实施例的形成第一金属层的制备过程示意图；
图5是本申请的另一实施例的一种显示面板的制作方法流程示意图；
图6是本申请的一实施例的一种显示面板的结构示意图。
其中，100、玻璃基板；110、缓冲层；120、栅极；130、绝缘层；140、有源层；150、源极；160、漏极。
具体实施方式
需要理解的是，这里所使用的术语、公开的具体结构和功能细节，仅仅是为了描述具体实施例，是代表性的，但是本申请可以通过许多替换形式来具体实现，不应被解释成仅受限于这里所阐述的实施例。
在本申请的描述中，术语“第一”、“第二”仅用于描述目的，而不能理解为指示相对重要性，或者隐含指明所指示的技术特征的数量。由此，除非另有说明，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征；“多个”的含义是两个或两个以上。术语“包括”及其任何变形，意为不排他的包含，可能存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
另外，“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系的术语，是基于附图所示的方位或相对位置关系描述的，仅是为了便于描述本申请的简化描述，而不是指示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。
此外，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，或是两个元件内部的连通。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
采用电镀的方法制成铜金属层，首先在玻璃基板上形成电极图案作为缓冲层，随后利用电镀的方法在缓冲层上镀铜金属层，该方法可以节省Cu的蚀刻工艺，解决了Cu刻蚀效果差的问题，但是该方法采用的电镀工艺是一种高污染行业，其中涉及的电镀液处理问题是项重要的环保问题，目前很难大面积推广使用。
下面参考附图和可选的实施例对本申请作详细说明。
图1是本申请的一实施例的一种显示面板的制作方法的流程示意图，如图1所示，本申请公开了一种显示面板的制作方法，包括形成阵列基板的制程，形成所述阵列基板的制程包括步骤：
S1：在玻璃基板上形成缓冲层；
S2：在缓冲层上形成第一预设图案的光阻层；
S3：将形成有第一预设图案的光阻层的玻璃基板放入活化剂中进行活化处理，活化剂与第一预设图案的光阻层接触的对应位置形成第一预设图案的活化粒子层，活化剂与缓冲层接触的对应位置形成第二预设图案的活化粒子层；
S4：去除第一预设图案的光阻层及第一预设图案的活化粒子层；
S5：进行化学镀操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的第一金属层；
S6：在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层。
相对于采用电镀的方法制成第一金属层(例如铜金属层)的方案来说，首先在玻璃基板上形成电极图案作为缓冲层，随后利用电镀的方法在缓冲层上镀金属，该方法采用的电镀工艺是一种高污染行业，难以大面积推广使用。本方案中，在缓冲层上，预先通过光阻层和活化处理得到第二预设图案的活化粒子层，并在化学镀操作中，通过化学反应形成与第二预设图案的活化粒子层相对应的第一金属层。其中，由于使用第一金属层通过化学镀形成，化学镀是依据氧化还原反应原理，不需要通电，这样节能环保，改善电镀的高污染高能耗问题，同时节省了蚀刻工艺。
其中，化学镀操作的技术原理：化学镀是一种不需要通电，依据氧化还原反应原理，利用强还原剂(如钯粒子和次亚磷酸钠等)在含有金属离子的溶液中，将金属离子还原成金属而沉积在各种材料表面形成致密镀层的方法。
具体的，当阵列基板上形成的薄膜晶体管(TFT)为底栅型的结构时，第一金属层包括通过化学镀操作同层形成的栅极和扫描线，当然TFT也可以为顶栅型的结构，也适用化学镀的方法形成栅极。
另外，当缓冲层为透明且非导电材质时，可以不蚀刻，例如TFT设置在色阻层上，缓冲层为色阻层，当缓冲层是金属层时，则需要将缓冲层对应透明区域位置进行蚀刻去除。
具体的，所述进行化学镀操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的第一金属层的步骤S5之后还包括：
将缓冲层对应未被第二预设图案的第一金属层覆盖的位置蚀刻去除，形成第二预设图案的缓冲层；
其中，所述缓冲层包括钼缓冲层或钼合金缓冲层。
其中，形成的缓冲层包括钼缓冲层或者钼合金缓冲层，这样有利于提高附着力，当然，所述缓冲层还可以包括Ti(钛)/MoN(氮化钼)等。在进行化学镀操作形成第二预设图案的第一金属层之后，用干法蚀刻将未被第二预设图案的第一金属层覆盖的缓冲层的位置蚀刻掉，防止残余的钼缓冲层或者钼合金缓冲层对其他结构层产生影响。
本申请中，该活化剂是用于形成第二预设图案的活化粒子层，该第二预设图案的活化粒子层是作为化学镀操作中的催化剂使用，以形成第二预设图案的第一金属层。具体的，在所述将形成有第一预设图案的光阻层的玻璃基板放入活化剂中进行活化处理，活化剂与第一预设图案的光阻层接触的对应位置形成第一预设图案的活化粒子层，活化剂与缓冲层接触的对应位置形成第二预设图案的活化粒子层的步骤S3中，所述活化剂为活化液，所述活化处理为浸泡活化处理，所述活化粒子层为活化液粒子层，所述活化液的温度为10摄氏度至30摄氏度，所述浸泡活化处理的浸泡时间为10秒至100秒。其中，该活化粒子层除了可以通过活化液形成外，还可以通过物理气相沉积(PVD)，采用磁控溅射的方式来形成。
将形成有第一预设图案的光阻层的玻璃基板放入活化液中浸泡活化处理，浸泡活化处理在与缓冲层接触的表面沉积一层活性液粒子层，形成的活化液粒子层有利于化学镀的操作。具体的活化液的温度是在常温下将玻璃基板浸泡在活化剂中大约10至100秒，中途翻动，使玻璃基板整体均匀活化，不需要水洗。其中，该活化剂以及该活化液粒子层包括如下成分:HCl(氯化氢)+SnCl2(氯化亚锡)+PdCl2(氯化钯)或者HCl(氯化氢)+NaCl(氯化钠)+SnCl2(氯化亚锡)+PdCl2(氯化钯)或者HCl(氯化氢)+KCl(氯化钾)+SnCl2(氯化亚锡)+PdCl2(氯化钯)等，其中，活化液粒子层是由活化液在一定温度(一般在10至30℃范围内)沉积而来。
其中，活化液的温度控制在10摄氏度至30摄氏度的范围，且浸泡活化处理的浸泡时间为10秒至100秒，这样可以提高附着力。若活化液的温度过高的话，金属沉积的沉积速率快，浸泡活化处理不均匀；另外，浸泡活化处理的温度为常温环境，反应的环境容易实现，工艺要求较低，有利于减少成本；而且，避免高温或低温对玻璃基板的损坏，从而保护玻璃基板的完整性。
关于化学镀操作，在进行化学镀操作的时候，可以进行镀铜操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的铜金属层作为第一金属层。镀的金属为铜金属，形成的铜金属层比较致密，有很好的结合力。另外形成的铜金属层相对于其他的金属形成的金属层有很好的电导率，减小信号延迟时间，提高刷新率和减小充电时间。当然，还可以进行化学镀镍操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的镍金属层作为第一金属层。
图2是本申请图1的流程图中步骤S5的过程流程示意图，如图2所示，所述进行化学镀铜操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的铜金属层作为第一金属层的步骤S5包括：
S51：将去除第一预设图案的光阻层及第一预设图案的活化粒子层，形成有第二预设图案的活化粒子层的玻璃基板放入化学镀铜液中进行化学镀铜操作；
S52：对应第二预设图案的活化粒子层的位置，形成第二预设图案的铜金属层作为第一金属层；
其中，所述化学镀铜液包括铜盐、还原剂、络合剂、加速剂、表面活性剂。
通过将浸泡活化处理后的玻璃基板放入化学镀铜液中，使得玻璃基板与化学镀铜液整体接触均匀，通过化学反应形成铜金属层，形成的铜金属层致密，具有较好的附着力，且化学镀铜稳定性高。使用的化学镀铜液无强酸强碱、无氰物质，并且不需要通电，节能环保，更好的改善电镀的高污染高能耗问题。
具体的，铜盐包括硫酸铜、氯化铜、醋酸铜、硝酸铜等，还原剂包括乙醛酸、次磷酸钠、二甲基胺苯烷等，络合剂包括乙二胺四乙酸(EDTA)、三乙醇胺(TEA)、三异丙醇胺等，加速剂包括吡啶类物质，表面活性剂包括聚乙二醇-1000，脂肪酸硫化物等。
对于所使用的化学镀铜液，具体的，化学镀铜液的温度为50摄氏度至100摄氏度，化学镀铜操作的持续时间是0.1分钟至10分钟。低温液相中制备(50-100℃)，这样不会引起铜金属层颗粒粗大而导致表面平整度差引起电导率下降的问题和铜金属层的氧化问题。当化学镀铜的温度过低时，小于50摄氏度时，沉积铜金属的速率慢，在玻璃基板上形成的膜致密度差，不能形成连续的膜，容易导致沉积到铜金属层与玻璃基板的附着力较差；而化学镀铜的温度较高时，大于100摄氏度时，沉积铜金属的速率较快，容易使得沉积的铜膜鼓泡,也影响附着力。化学镀铜液的更适合的温度范围是75摄氏度至90摄氏度。而一般的我们需要的膜层的厚度为3000-5000埃米，化学镀铜操作的持续时间为0.5分钟至3分钟较合适。
在所述进行化学镀铜操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的铜金属层作为第一金属层的步骤S5之后还包括：
将形成有第二预设图案的铜金属层的玻璃基板放入温水中去除残余的化学镀铜液；
对去除残余化学镀铜液的玻璃基板进行退火处理；
其中，所述温水的温度为40摄氏度至60摄氏度。温水去除残余化学镀铜液以便对后续制程造成影响，同时，进行退火处理，提高CU与缓冲层的附着力。将温水的温度设置在40-60摄氏度之间，提供了一个温度梯度，当温度小于40摄氏度时，温度太小容易影响附着力；当温度大于60摄氏度时，温度太高的话，达不到缓慢降温的目的。
图3是本申请的一实施例的形成第二金属层的方法流程示意图，如图3所示，结合图1可知，所述在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层的步骤S6包括：
S61：在有源层上形成钼缓冲层或钼合金缓冲层；
S62：在钼缓冲层或钼合金缓冲层上形成第三预设图案的光阻层；
S63：将形成有第三预设图案的光阻层的玻璃基板放入活化液中进行浸泡活化处理，活化液与第三预设图案的光阻层接触的对应位置形成第三预设图案的活化液粒子层，活化液与钼缓冲层接触的对应位置形成第四预设图案的活化液粒子层；
S64：去除第三预设图案的光阻层及第三预设图案的活化液粒子层；
S65：进行化学镀铜操作，对应第四预设图案的活化液粒子层的位置，形成第四预设图案的铜金属层作为第二金属层；
S66：在第二金属层上依次形成钝化层和透明电极层。
本方案中，在钼缓冲层或钼合金缓冲层上，预先通过光阻层和活化处理得到预设图案的活化粒子层，然后该活化粒子层在化学镀铜操作中，形成与第四预设图案的活化层图案相对应的铜金属层。其中，使用化学镀铜液无强酸强碱、无氰物质，无环保问题并且不需要通电，节能环保，改善电镀的高污染高能耗问题。而且化学镀镀的金属为铜金属，用化学镀铜形成致密的铜金属层，有极佳的结合力，稳定性高。在有源层上形成钼缓冲层或钼合金缓冲层可以很好的保护铜金属层，当然，没有钼缓冲层或钼合金缓冲层也是可以的。
图4是本申请的一实施例的形成第一金属层的制备过程示意图，图5是本申请的另一实施例的一种显示面板的制作方法流程示意图，如图4和图5所示，结合图1至图3，本申请还公开了一种显示面板的制作方法，包括形成阵列基板的制程，形成所述阵列基板的制程包括步骤：
S1：在玻璃基板上金属溅射形成钼缓冲层；
S2：在钼缓冲层上形成第一预设图案的光阻层；
S31：将形成有第一预设图案的光阻层的玻璃基板放入温度为10摄氏度至30摄氏度的活化液中进行浸泡活化处理，浸泡10秒至100秒；
S32：活化液与第一预设图案的光阻层接触的对应位置形成第一预设图案的活化液粒子层，活化液与钼缓冲层接触的对应位置形成第二预设图案的活化液粒子层；
S4：去除第一预设图案的光阻层及第一预设图案的活化液粒子层；
S51：将去除第一预设图案的光阻层及第一预设图案的活化液粒子层并形成有第二预设图案的活化液粒子层的玻璃基板，放入温度为75摄氏度至90摄氏度的化学镀铜液中进行化学镀铜操作，持续0.3分钟至3分钟；
S52：对应第二预设图案的活化液粒子层的位置，形成第二预设图案的铜金属层作为栅极金属层和/或扫描线金属层；
S53：将形成有第二预设图案的铜金属层的玻璃基板，放入温度为40摄氏度至60摄氏度的温水中去除残余的化学镀铜液；
S54：对去除残余的化学镀铜液的玻璃基板进行退火处理；
S55：用干法蚀刻工艺将钼缓冲层对应未被第二预设图案的铜金属层覆盖的位置蚀刻去除，形成第二预设图案的钼缓冲层；
S6：在栅极金属层和/或扫描线金属层上依次形成绝缘层、有源层、源漏极金属层和/或数据线金属层、钝化层和透明电极层；
其中，所述化学镀铜液包括铜盐、还原剂、络合剂、加速剂、表面活性剂。在玻璃基板上溅射钼形成钼缓冲层，钼缓冲层提高附着力，防止脱离，同时，提高致密性，防止底切问题。在缓冲层上，预先通过光阻层和活化处理得到预设图案的活化液粒子层，然后该活化液粒子层在化学镀铜操作中，形成与活化层图案相对应的铜层，其中，由于使用化学镀铜操作，不需要通电，依据氧化还原反应原理，从而形成第一金属层，这样节省了蚀刻工艺。通过化学反应一层，而且原子离子层面的结合，增加了致密性。使用化学镀液无强酸强碱、无氰物质，无环保问题并且不需要通电，节能环保，改善电镀的高污染高能耗问题，化学镀铜稳定性高，工作温度和溶液浓度适用范围较宽。铜金属层致密，有极佳的结合力。采用化学镀，在低温液相中制备(50-100℃)，不会引起铜颗粒粗大而导致表面平整度差引起电导率下降的问题和铜金属层的氧化问题。
图6是本申请的一实施例的一种显示面板的结构示意图，如图6所示，本申请还公开了一种显示面板，采用上述的显示面板的制作方法制成的阵列基板，以及与所述阵列基板相对设置的彩膜基板。所述阵列基板包括玻璃基板100、缓冲层110、栅极120、绝缘层130、有源层140、源极150、漏极160、钝化层和透明电极层，所述缓冲层设置在所述玻璃基板上；所述栅极设置在所述缓冲层上；所述绝缘层覆盖所述栅极；所述有源层设置在所述绝缘层上；所述源极和漏极设置在所述有源层的两侧；在源极和漏极上依次形成钝化层和透明电极层。
需要说明的是，本方案中涉及到的各步骤的限定，在不影响具体方案实施的前提下，并不认定为对步骤先后顺序做出限定，写在前面的步骤可以是在先执行的，也可以是在后执行的，甚至也可以是同时执行的，只要能实施本方案，都应当视为属于本申请的保护范围。
本申请的技术方案可以广泛用于各种显示面板，如TN(Twisted Nematic，扭曲向列型)显示面板、IPS(In-Plane Switching，平面转换型)显示面板、VA(VerticalAlignment，垂直配向型)显示面板、MVA(Multi-Domain Vertical Alignment，多象限垂直配向型)显示面板，当然，也可以是其他类型的显示面板，如OLED(Organic Light-EmittingDiode，有机发光二极管)显示面板，均可适用上述方案。
以上内容是结合具体的可选实施方式对本申请所作的进一步详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本申请的保护范围。

Claims (5)

1.一种显示面板的制作方法，其特征在于，包括形成阵列基板的制程，形成所述阵列基板的制程包括步骤：
在玻璃基板上形成缓冲层；
在缓冲层上形成第一预设图案的光阻层；
将形成有第一预设图案的光阻层的玻璃基板放入活化剂中进行活化处理，活化剂与第一预设图案的光阻层接触的对应位置形成第一预设图案的活化粒子层，活化剂与缓冲层接触的对应位置形成第二预设图案的活化粒子层；
去除第一预设图案的光阻层及第一预设图案的活化粒子层；
进行化学镀操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的第一金属层；以及
在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层；
所述活化剂为活化液，所述活化处理为浸泡活化处理，所述活化粒子层为活化液粒子层；
所述活化液的温度为10摄氏度至30摄氏度，所述浸泡活化处理的浸泡时间为10秒至100秒；
所述进行化学镀操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的第一金属层的步骤包括：
在化学镀铜液中进行化学镀铜操作；
对应第二预设图案的活化粒子层的位置，形成第二预设图案的铜金属层作为第一金属层；
其中，所述化学镀铜液包括铜盐、还原剂、络合剂、加速剂、表面活性剂；所述化学镀铜液的温度为75摄氏度至90摄氏度，所述化学镀铜操作的持续时间是0.5分钟至3分钟；
所述进行化学镀铜操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的铜金属层作为第一金属层的步骤之后还包括：
将形成有第二预设图案的铜金属层的玻璃基板放入温水中去除残余的化学镀铜液；
对去除残余化学镀铜液的玻璃基板进行退火处理；
其中，所述温水的温度为40摄氏度至60摄氏度。
2.如权利要求1所述的一种显示面板的制作方法，其特征在于，
所述进行化学镀操作，对应第二预设图案的活化粒子层的位置，形成第二预设图案的第一金属层的步骤之后还包括：
将缓冲层未被第二预设图案的第一金属层覆盖的位置蚀刻去除，形成第二预设图案的缓冲层；
其中，所述缓冲层包括钼缓冲层或钼合金缓冲层。
3.如权利要求1所述的一种显示面板的制作方法，其特征在于，所述在第一金属层上依次形成绝缘层、有源层、第二金属层、钝化层和透明电极层的步骤包括：
在有源层上形成钼缓冲层或钼合金缓冲层；
在钼缓冲层或钼合金缓冲层上形成第三预设图案的光阻层；
将形成有第三预设图案的光阻层的玻璃基板放入活化液中进行浸泡活化处理，活化液与第三预设图案的光阻层接触的对应位置形成第三预设图案的活化液粒子层，活化液与钼缓冲层接触的对应位置形成第四预设图案的活化液粒子层；
去除第三预设图案的光阻层及第三预设图案的活化液粒子层；
进行化学镀铜操作，对应第四预设图案的活化液粒子层的位置，形成第四预设图案的铜金属层作为第二金属层；以及
在第二金属层上依次形成钝化层和透明电极层。
4.一种显示面板的制作方法，其特征在于，包括形成阵列基板的制程，形成所述阵列基板的制程包括步骤：
在玻璃基板上金属溅射形成钼缓冲层；
在钼缓冲层上形成第一预设图案的光阻层；
将形成有第一预设图案的光阻层的玻璃基板放入温度为10摄氏度至30摄氏度的活化液中进行浸泡活化处理，浸泡10秒至100秒；
活化液与第一预设图案的光阻层接触的对应位置形成第一预设图案的活化液粒子层，活化液与钼缓冲层接触的对应位置形成第二预设图案的活化液粒子层；
去除第一预设图案的光阻层及第一预设图案的活化液粒子层；
将去除第一预设图案的光阻层及第一预设图案的活化液粒子层并形成有第二预设图案的活化液粒子层的玻璃基板，放入温度为75摄氏度至90摄氏度的化学镀铜液中进行化学镀铜操作，持续0.3分钟至3分钟；
对应第二预设图案的活化液粒子层的位置，形成第二预设图案的铜金属层作为栅极金属层和/或扫描线金属层；
将形成有第二预设图案的铜金属层的玻璃基板，放入温度为40摄氏度至60摄氏度的温水中去除残余的化学镀铜液；
对去除残余的化学镀铜液的玻璃基板进行退火处理；
用干法蚀刻工艺将钼缓冲层对应未被第二预设图案的铜金属层覆盖的位置蚀刻去除，形成第二预设图案的钼缓冲层；以及
在栅极金属层和/或扫描线金属层上依次形成绝缘层、有源层、源漏极金属层和/或数据线金属层、钝化层和透明电极层；
其中，所述化学镀铜液包括铜盐、还原剂、络合剂、加速剂、表面活性剂。
5.一种显示面板，其特征在于，采用如权利要求1至4任意一项所述的显示面板的制作方法制成的阵列基板，以及与所述阵列基板相对设置的彩膜基板。
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