CN111883486B - 阵列基板及其制造方法、显示装置 - Google Patents
阵列基板及其制造方法、显示装置 Download PDFInfo
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- CN111883486B CN111883486B CN202010697170.5A CN202010697170A CN111883486B CN 111883486 B CN111883486 B CN 111883486B CN 202010697170 A CN202010697170 A CN 202010697170A CN 111883486 B CN111883486 B CN 111883486B
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- carbon film
- passivation layer
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- array substrate
- conductive pad
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- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
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- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- Electroluminescent Light Sources (AREA)
Abstract
本申请提供一种阵列基板及其制造方法、显示装置,制造方法包括如下步骤:于阵列基板上形成钝化层,阵列基板包括薄膜晶体管以及导电垫,钝化层覆盖薄膜晶体管以及导电垫;于钝化层形成上形成整面的碳膜;采用一次构图工艺对碳膜以及钝化层进行图案化以去除导电垫对应的钝化层以及碳膜,得到阵列基板。通过以碳膜作为遮光层,且采用一道构图工艺完成碳膜以及钝化层的图案化,以减少光罩使用数目。
Description
技术领域
本申请涉及显示技术领域,尤其涉及一种阵列基板及其制造方法、显示装置。
背景技术
发光二极管微型化发展成未来显示技术的热点之一,和目前的液晶显示器(Liquid Crystal Display,LCD)以及有机发光二极管(Organic Light Emitting,OLED)显示器件相比,具有反应快、高色域、高分辨率(Pixels Per Inch,PPI)以及低能耗等优势。然而,发光二极管微型化技术难点多且技术复杂,特别是其关键技术巨量转移技术、有机发光二极管(Light Emitting Diode,LED)颗粒微型化成为技术瓶颈,而亚毫米发光二极管(Mini-LED)背板作为微型发光二极管与背板结合的产物,其具有高对比度、高显色性能等可与有机发光二极管显示器件相媲美的特点,其成本稍高于液晶显示器且仅为有机发光二极管显示器件的六成左右,相对微型发光二极管(Micro-LED)、有机发光二极管显示器件更易实施,所以亚毫米发光二极管成为各大面板厂商布局热点。
如图1所示,其为传统亚毫米发光二极管背光模组的示意图。传统亚毫米发光二极管背光模组包括阵列层以及图案化黑色有机光阻层104,阵列层包括薄膜晶体管101、用于绑定亚毫米发光二极管的导电电极102、用于绑定覆晶薄膜的绑定引脚(未示出)以及覆盖薄膜晶体管101且使导电电极102以及绑定引脚显露的钝化层103,图案化黑色有机光阻层104对应薄膜晶体管101设置。由于钝化层103的图案化以及黑色有机光阻层的图案化分别需要一个光罩,使得传统亚毫米发光二极管背光模组的光罩使用数目较多。
因此,有必要提出一种技术方案以减少传统亚毫米发光二极管背光模组制造过程中光罩的使用数目。
发明内容
本申请的目的在于提供一种阵列基板及其制造方法、显示装置,以减少制造阵列基板所需的光罩使用数目。
为实现上述目的,本申请提供一种阵列基板的制造方法,所述制造方法包括如下步骤:
于阵列基板上形成钝化层,所述阵列基板包括薄膜晶体管以及导电垫,所述钝化层覆盖所述薄膜晶体管以及所述导电垫;
于所述钝化层上形成整面的碳膜;
采用一次构图工艺去除所述导电垫对应的所述钝化层以及所述碳膜,得到所述阵列基板。
在上述阵列基板的制造方法中,采用一次构图工艺去除所述导电垫对应的所述钝化层以及所述碳膜包括如下步骤:
于所述碳膜远离所述钝化层的表面形成光阻层;
利用光罩对所述光阻层进行曝光以及显影液显影后,得到图案化光阻层;
利用等离子体与所述图案化光阻层未覆盖的所述碳膜进行反应,以去除所述导电垫对应的碳膜。
在上述阵列基板的制造方法中,所述等离子体由氧气或氢气制备得到。
在上述阵列基板的制造方法中,去除所述导电垫对应的所述碳膜后,所述方法还包括:
利用干法蚀刻去除所述导电垫对应的所述钝化层。
在上述阵列基板的制造方法中,于所述钝化层上形成整面的碳膜包括如下步骤:
以石墨为靶材,利用溅射沉积于所述钝化层上形成整面的碳膜。
在上述阵列基板的制造方法中,所述碳膜的厚度大于100纳米。
一种阵列基板,所述阵列基板包括:
基板;
于所述基板上形成的阵列层,所述阵列层包括薄膜晶体管以及导电垫;
覆盖所述薄膜晶体管且使所述导电垫暴露的钝化层;
形成于所述钝化层上的图案化碳膜。
在上述阵列基板中,所述图案化碳膜的厚度大于100纳米。
在上述阵列基板中,所述阵列基板还包括发光元件,所述发光元件绑定于所述导电垫上。
一种显示装置,所述显示装置包括上述阵列基板。
有益效果:本申请提供一种阵列基板及其制造方法、显示装置,制造方法包括如下步骤:于阵列基板上形成钝化层,阵列基板包括薄膜晶体管以及导电垫,钝化层覆盖薄膜晶体管以及导电垫;于钝化层形成上形成整面的碳膜;采用一次构图工艺对碳膜以及钝化层进行图案化以去除导电垫对应的钝化层以及碳膜,得到阵列基板。通过以碳膜作为遮光层,且采用一道构图工艺完成碳膜以及钝化层的图案化,相对于传统技术中黑色有机层以及钝化层的制备分别需要一个光罩,本申请可以减少光罩使用数目。
附图说明
图1为传统亚毫米发光二极管背光模组的示意图;
图2为本申请阵列基板的制造方法的流程示意图;
图3为采用一次构图工艺去除导电垫对应的钝化层以及碳膜的流程示意图;
图4为本申请阵列基板的制造过程示意图。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
请参阅图2,其为本申请阵列基板的制造方法的流程示意图。制造方法包括如下步骤:
S101:于阵列基板上形成钝化层,阵列基板包括薄膜晶体管以及导电垫,钝化层覆盖薄膜晶体管以及导电垫。
具体地,首先,提供一个阵列基板,阵列基板包括基板以及阵列层,阵列层设置于基板上。阵列层包括薄膜晶体管、导电垫以及绑定引脚。薄膜晶体管作为驱动元件,以控制绑定于导电垫上的发光元件的工作状态。绑定引脚用于绑定覆晶薄膜,覆晶薄膜包括柔性膜以及设置于柔性膜上的驱动芯片。
其次,采用化学气相沉积形成覆盖阵列层的钝化层,钝化层的制备材料选自氮化硅以及氧化硅中的至少一种。具体地,钝化层为氮化硅层。
S102:于钝化层上形成整面的碳膜。
具体地,以石墨为靶材,利用溅射沉积于钝化层上形成整面的碳膜。溅射沉积为物理沉积。溅射沉积的工艺参数为常用参数,此处不做具体描述。利用物理溅射沉积得到的碳膜,工艺简单,且碳膜具有内应力低、热稳定性好、致密性好等特性,且能对薄膜晶体管起到遮光作用。
在本实施例中,碳膜的厚度大于100纳米,以起到良好的遮光作用。例如150纳米、200纳米、500纳米、1000纳米、1500纳米以及3000纳米等。
S103:采用一次构图工艺去除导电垫对应的钝化层以及碳膜,得到阵列基板。
具体地,采用一次黄光制程对钝化层205以及碳膜206进行图案化,以使碳膜206对薄膜晶体管起到遮光作用的同时,导电垫2043以及绑定引脚等暴露出来,将发光元件绑定于导电垫,且将覆晶薄膜绑定于绑定引脚上。其中,发光元件可以为亚毫米发光二极管(Mini-LED)、微型发光二极管(Micro-LED)或者有机发光二极管中的至少一种。
本申请阵列基板的制造方法以碳膜作为遮光层,且碳膜以及钝化层的图案化采用同一个光罩,相对于传统技术中有机黑色光阻层作为负性光阻层需要一个单独的光罩以实现图案化,本申请的制造方法实现对薄膜晶体管的遮光保护的同时,减少光罩的使用数目。
如图3所示,其为采用一次构图工艺去除导电垫对应的钝化层以及碳膜的流程示意图。采用一次构图工艺去除导电垫对应的钝化层以及碳膜包括如下步骤:
S1031:于碳膜远离钝化层的表面形成光阻层。
具体地,采用涂布的方式于钝化层表面形成正性光阻层。
S1032:利用光罩对光阻层进行曝光以及显影液显影后,得到图案化光阻层。
具体地,利用一个光罩对正性光阻层对应导电垫以及绑定引脚的区域进行曝光,利用显影液对曝光处理的光阻层进行显影,得到图案化光阻层。
S1033:利用等离子体与图案化光阻层未覆盖的碳膜进行反应,以去除导电垫对应的碳膜。
具体地,以氧气或氢气作为气源,对氧气或氢气进行等离子化处理,未被图案化光阻层覆盖的碳膜与等离子体发生反应生成气化的碳氢化合物或碳氧化合物,使得到未被图案化光阻层覆盖的碳膜被去除,即对应导电垫以及绑定引脚的碳膜被去除。图案化光阻层覆盖的碳膜为图案化光阻层保护。
再利用干法蚀刻去除导电垫以及绑定引脚对应的钝化层,去除剩余的图案化光阻层,得到导电垫以及绑定引脚暴露的阵列基板。
本申请还提供一种阵列基板,阵列基板包括:
基板;
于基板上形成的阵列层,阵列层包括薄膜晶体管以及导电垫;
覆盖薄膜晶体管且使导电垫暴露的钝化层;
形成于钝化层上的图案化碳膜。
在本实施例中,基板为玻璃基板。阵列层包括薄膜晶体管、导电垫以及绑定引脚,导电垫以及绑定引脚位于同一导电层。
在本实施例中,导电垫的制备材料包括钼、铝、钛以及铜中的至少一种。例如绑定引脚以及导电垫由依次叠置的MoTiNi合金层、铜层以及MoTiNi合金层组成,其中,MoTiNi合金层的厚度为300埃-600埃,铜层的厚度为4000埃-5000埃。
在本实施例中。钝化层的制备材料选自氮化硅以及氧化硅中的至少一种。钝化层的厚度为800埃-6000埃,例如为1500埃、1000埃或者3000埃等。
在本实施例中,图案化碳膜的厚度大于100纳米,例如为150纳米、200纳米或者350纳米。图案化碳膜至少对应薄膜晶体管设置且使导电垫暴露。
在本实施例中,阵列基板还包括发光元件,发光元件绑定于导电垫上。发光元件选自亚毫米发光二极管或微型发光二极管中的至少一种。
本申请还提供一种显示装置,显示装置包括背光模组,背光模组包括上述阵列基板。
以下结合具体实施例对上述方案进行详述。
S201:在基板上形成阵列层。
具体地,提供一基板200,于基板200的第一区域200a形成栅极201,第一区域200a用于形成薄膜晶体管。其中,栅极201的制备材料包括铜、钼以及铝中的至少一种。
形成覆盖栅极201以及基板200的栅极绝缘层202,于栅极绝缘层202上形成图案化半导体层,其中,图案化半导体层包括于第一区域200a形成的有源层2031。栅极绝缘层202的制备材料选自氮化硅或者氧化硅中的至少一种。图案化半导体层的制备材料可以为多晶硅、金属氧化物或者非晶硅等。
通过形成整面的金属层后,对金属层进行图案化后,在基板200的第一区域200a形成源漏电极(2041,2042)且在第二区域200b形成导电垫2043,如图4中的(A)所示。其中,源漏电极(2041,2042)以及导电垫2043同层形成。对金属层进行图案化后,还形成绑定引脚(未示出)。第二区域200b位于第一区域200a的一侧。
其中,图案化半导体层、源漏电极(2041,2042)以及导电垫2043等可以采用同一个半色调灰阶掩膜板制得到。例如,依次形成整面的半导体层以及整面的金属层,在金属层上形成光阻层,利用半色调灰阶掩膜板对光阻层进行曝光处理后,定义出光阻层的光阻完全保留区、光阻半保留区以及光阻完全去除区,经过对光阻完全去除区的金属层以及半导体层进行去除,以形成有源层、导电垫以及绑定引脚,再对光阻半保留区的金属层进行局部去除,得到源漏电极,去除剩余的光阻层。
S202:于阵列层上形成钝化层。
具体地,采用化学气相沉积形成覆盖源漏电极(2041,2042)、导电垫2043以及栅极绝缘层202的钝化层205,如图4中的(B)所示。钝化层205可以为氮化硅层、氧化硅层、氮化硅层和氧化硅层的叠层。
S203:于钝化层上形成碳膜。
具体地,采用物理溅射沉积在钝化层205上形成一层碳膜206,如图4中的(C)所示。
S204:利用一次构图工艺对碳膜以及钝化层进行图案化,使碳膜以及钝化层对应导电垫的部分去除,且将亚毫米发光二极管绑定于导电垫上,得到阵列基板。
在碳膜206上涂布整面的正性光阻层,利用光罩对正性光阻层进行曝光,再采用显影液对曝光的正性光阻层进行显影处理,得到图案化正性光阻层207,如图4中的(D)所示。其中,导电垫2043对应的碳膜206没有正性光阻层保护。
用氧气以及氢气制备得到的等离子体轰击基板,未被图案化光阻层保护的碳膜206与等离子体反应生成碳氢化合物以及碳氧化合物,碳膜206对应导电垫2043的部分被去除,如图4中的(E)所示;再采用干法蚀刻去除暴露出来的钝化层205,使得导电垫2043暴露,如图4中的(F)所示。
将亚毫米发光二极管208绑定于导电垫2043上,且将覆晶薄膜(未示出)绑定于绑定引脚(未示出)上,得到阵列基板,如图4中的(G)所示。
以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想;本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。
Claims (6)
1.一种阵列基板的制造方法,其特征在于,所述制造方法包括如下步骤:
于阵列层上形成钝化层,所述阵列层包括薄膜晶体管以及导电垫,所述钝化层覆盖所述薄膜晶体管以及所述导电垫;
于所述钝化层上形成整面的碳膜;
采用一次构图工艺去除所述导电垫对应的所述钝化层以及所述碳膜,得到所述阵列基板。
2.根据权利要求1所述阵列基板的制造方法,其特征在于,所述采用一次构图工艺去除所述导电垫对应的所述钝化层以及所述碳膜包括如下步骤:
于所述碳膜远离所述钝化层的表面形成光阻层;
利用光罩对所述光阻层进行曝光以及显影液显影后,得到图案化光阻层;
利用等离子体与所述图案化光阻层未覆盖的所述碳膜进行反应,以去除所述导电垫对应的碳膜。
3.根据权利要求2所述阵列基板的制造方法,其特征在于,所述等离子体由氧气或氢气制备得到。
4.根据权利要求2所述阵列基板的制造方法,其特征在于,所述去除所述导电垫对应的所述碳膜后,所述方法还包括:
利用干法蚀刻去除剩余的所述碳膜暴露的所述钝化层,以去除所述导电垫对应的所述钝化层。
5.根据权利要求1所述阵列基板的制造方法,其特征在于,于所述钝化层上形成整面的碳膜包括如下步骤:
以石墨为靶材,利用溅射沉积于所述钝化层上形成整面的碳膜。
6.根据权利要求1所述阵列基板的制造方法,其特征在于,所述碳膜的厚度大于100纳米。
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CN102769030A (zh) * | 2011-05-03 | 2012-11-07 | 爱思开海力士有限公司 | 半导体器件及其制造方法 |
CN105762086A (zh) * | 2014-12-16 | 2016-07-13 | 中芯国际集成电路制造(上海)有限公司 | 焊盘结构的制作方法、键合结构的制作方法及键合结构 |
CN107146770A (zh) * | 2017-05-10 | 2017-09-08 | 京东方科技集团股份有限公司 | 一种阵列基板的制备方法、阵列基板和显示装置 |
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CN107146770A (zh) * | 2017-05-10 | 2017-09-08 | 京东方科技集团股份有限公司 | 一种阵列基板的制备方法、阵列基板和显示装置 |
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