CN111725163A - Electronic switch installation method for reducing thermal impedance - Google Patents
Electronic switch installation method for reducing thermal impedance Download PDFInfo
- Publication number
- CN111725163A CN111725163A CN202010583319.7A CN202010583319A CN111725163A CN 111725163 A CN111725163 A CN 111725163A CN 202010583319 A CN202010583319 A CN 202010583319A CN 111725163 A CN111725163 A CN 111725163A
- Authority
- CN
- China
- Prior art keywords
- chip
- heat
- thermal resistance
- electronic switch
- thermal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 18
- 238000009434 installation Methods 0.000 title abstract description 11
- 239000004519 grease Substances 0.000 claims abstract description 12
- 229920001296 polysiloxane Polymers 0.000 claims abstract description 12
- 239000012080 ambient air Substances 0.000 claims abstract description 10
- 230000017525 heat dissipation Effects 0.000 claims abstract description 8
- 239000003570 air Substances 0.000 claims abstract description 7
- 230000005855 radiation Effects 0.000 claims abstract description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 9
- 229910052802 copper Inorganic materials 0.000 claims description 9
- 239000010949 copper Substances 0.000 claims description 9
- 239000003990 capacitor Substances 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 4
- ALKZAGKDWUSJED-UHFFFAOYSA-N dinuclear copper ion Chemical compound [Cu].[Cu] ALKZAGKDWUSJED-UHFFFAOYSA-N 0.000 claims description 3
- 239000011888 foil Substances 0.000 claims description 3
- 238000013461 design Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/467—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing gases, e.g. air
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3737—Organic materials with or without a thermoconductive filler
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
Abstract
The invention discloses an electronic switch installation method for reducing thermal impedance, which comprises a chip, wherein two heat dissipation paths are mainly used for heat generated by the chip, the first path is from a node of the chip to a chip top plastic package body (R), and is conducted to ambient air through convection/radiation (R), a heat dissipation sheet is installed at the top end of the chip through the method of the chip, so that the thermal resistance of the electronic switch can be further reduced, the electronic switch can be effectively reduced in thermal resistance during installation, the electronic switch is convenient to use, then the internal small-power fan blows the air flow to drive the internal heat to dissipate, the internal heat can be better dissipated, the thermal resistance can be further reduced, the use is convenient, finally, the heat-conducting silicone grease is injected into a sealed die, and further, the internal power supply system element is dissipated to the outside through the heat-conducting silicone grease, thereby further reducing the thermal impedance of the electronic switch and being convenient to use.
Description
The technical field is as follows:
the invention relates to the technical field of electronic switch installation, in particular to an electronic switch installation method for reducing thermal impedance.
Background art:
the designed DC-DC power supply generally comprises components such as a capacitor, an inductor, a Schottky, a resistor, a chip and the like, and the power supply
The conversion efficiency of the product cannot be hundreds, losses are necessarily generated, the losses are presented in the front of people in the form of temperature rise, a power supply system causes the accelerated life decay due to poor thermal design, therefore, the thermal design is an important part in the design of system reliability, but the thermal design is also a very difficult matter, and the factors involved are too many, such as the size of the circuit board and whether air flows, when we look at the specification of the IC product, it is often seen that the terms RjA, T, Tsro, TLEAD, etc., first R a refers to the chip thermal resistance, namely, the temperature rise of the corresponding chip node when each chip is lost by 1W, Tr refers to the junction temperature of the chip, Tsrco refers to the storage temperature range of the chip, TLEAD refers to the processing temperature of the chip, therefore, it can be known that the prior art cannot well reduce the thermal impedance when the electronic switch is installed.
The invention content is as follows:
the invention aims to provide an electronic switch installation method capable of reducing thermal impedance in order to overcome the defects of the prior art.
The invention is realized by the following technical scheme:
a method for mounting an electronic switch with reduced thermal impedance comprises a chip, wherein two heat dissipation paths are mainly used for heat generated by the chip, the first path is from a joint of the chip to a plastic package body (R.) on the top of the chip and is conducted to ambient air through convection/radiation (R.), and for the chip without a heat dissipation pad, Rrc refers to the thermal resistance from the joint to the top of the plastic package body; because Rre represents the lowest thermal resistance path from the junction inside the chip to the outside world, where the lateral thermal resistance length of the copper-copper plane L =1cm, width =1cm, foil thickness =0.0035cm, thermal conductivity of copper (λ a) =4W/(cm ° C), typical 12mil via thermal resistance, via length L =0.165cm, hole wall copper thickness =0.00175cm, hole diameter = 0.01524 cm, thermal conductivity of copper (λ a) =4W/(cm ° C); the second path is from the junction of the chip to the back pad (R2), conducted by convection/radiation (R.) to the PCB board surface and ambient air, and the thermal resistance from the square surface 1cm long on the PCB board to the ambient air due to natural convection.
The direct-current voltage reduction scheme is that 5V is output, the current is 1A, the conversion efficiency eta is 90%, and the ambient temperature TA is 50 ℃. The rated temperature of the used capacitor is 100 ℃ and is close to the chip, and the temperature of the TJ chip is required to be controlled at 90 ℃.
The heat resistance of the selected chip is lower than 71.4' C/W, wherein the type of the chip can be selected to be an S0P8-EP chip.
The product space range is large, the fan with low power can be placed in the product space in a non-sealed environment, and then the fan with low power can generate air flow, so that the overall thermal resistance of the system is reduced.
The method is characterized in that the waterproof, dustproof and shockproof product is placed in the sealed die, and the heat conduction silicone grease is poured into the sealed die, so that the power system component transfers heat to the shell through the heat conduction silicone grease, and then the heat is dissipated.
The electronic switch installation method for reducing the thermal impedance has the beneficial effects that:
through reducing the scheme of direct current step-down first-selected can reduce electronic switch's thermal resistance, the method through the chip afterwards, install the fin on the top of chip, reduction electronic switch's thermal resistance that can be further, thereby can make electronic switch effectual reduction thermal resistance when the installation, high durability and convenient use, blow through the miniwatt fan in inside afterwards, the air current that can make inside production drives inside heat and gives off, thereby the effect that makes inside heat can give off is better, and then can reduce its thermal resistance, high durability and convenient use, inject heat conduction silicone grease into inside sealed mould at last, and then make inside electrical power generating system component give off the external world through heat conduction silicone grease, thereby further reduce its electronic switch's thermal impedance, high durability and convenient use.
The specific implementation mode is as follows:
the technical solutions in the embodiments of the present invention will be clearly and completely described below, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, rather than all embodiments, and all other embodiments obtained by those skilled in the art without creative efforts based on the embodiments of the present invention belong to the protection scope of the present invention;
the invention provides a technical scheme that:
an electronic switch mounting method for reducing thermal impedance, comprising: the chip mainly comprises two heat dissipation paths for heat generated by the chip, wherein the first path is from a joint of the chip to a plastic package body (R.) on the top of the chip and reaches ambient air through convection/radiation (R.), and for the chip without a heat dissipation pad, Rrc refers to the thermal resistance from the joint to the top of the plastic package body; because Rre represents the lowest thermal resistance path from the junction inside the chip to the outside world, where the lateral thermal resistance length of the copper-copper plane L =1cm, width =1cm, foil thickness =0.0035cm, thermal conductivity of copper (λ a) =4W/(cm ° C), typical 12mil via thermal resistance, via length L =0.165cm, hole wall copper thickness =0.00175cm, hole diameter = 0.01524 cm, thermal conductivity of copper (λ a) =4W/(cm ° C); the second path is from the junction of the chip to the back pad (R2), conducted by convection/radiation (R.) to the PCB board surface and ambient air, the thermal resistance from the surface of the square 1cm long on the PCB board to the ambient air caused by natural convection;
the direct current voltage reduction scheme is that 5V is output, the current is 1A, the conversion efficiency eta is 90%, and the ambient temperature TA is 50 ℃. The rated temperature of the used capacitor is 100 ℃, the capacitor is close to the chip, the temperature of the TJ chip is required to be controlled at 90 ℃, the internal power output is reduced, the internal electrical impedance can be reduced, and the use is convenient;
the heat resistance of the selected chip is lower than 71.4' C/W, wherein the type of the chip can be selected as an S0P8-EP chip, the signal of the chip can reduce the thermal impedance, so that the thermal impedance during the installation of the electronic switch is further reduced, the use is convenient, the temperature of the chip can be effectively reduced by the radiating fin, and for a chip component, the position of the radiating fin is positioned at the top of a chip plastic package body, so that the heat resistance of the electronic switch can be further reduced, and the heat resistance of the electronic switch can be effectively reduced during the installation;
the product space range is large, and the product space is not in a sealed environment, a low-power fan can be placed in the product space, so that the low-power fan can generate air flow, the overall thermal resistance of the system is reduced, the low-power fan blows, the air flow generated in the product space can drive the heat in the product space to be dissipated, the effect that the heat in the product space can be dissipated is better, and the thermal resistance of the product space can be reduced;
the method includes that heat-conducting silicone grease can be poured into the sealed die, so that power system components and parts transmit heat to a shell through the heat-conducting silicone grease, the heat is dissipated, the heat-conducting silicone grease is finally poured into the sealed die, and then the internal power system components are dissipated to the outside through the heat-conducting silicone grease, so that the thermal impedance of the electronic switch is further reduced.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention.
Claims (7)
1. A method for mounting an electronic switch capable of reducing thermal impedance is characterized by comprising a chip, wherein two heat dissipation paths are mainly used for heat generated by the chip, wherein the first path is from a joint of the chip to a plastic package body (R.) on the top of the chip and is conducted to ambient air through convection/radiation (R.), and for the chip without a heat dissipation pad, Rrc refers to the thermal resistance from the joint to the top of the plastic package body; because Rre represents the lowest thermal resistance path from the junction inside the chip to the outside world, where the lateral thermal resistance length of the copper-copper plane L =1cm, width =1cm, foil thickness =0.0035cm, thermal conductivity of copper (λ a) =4W/(cm ° C), typical 12mil via thermal resistance, via length L =0.165cm, hole wall copper thickness =0.00175cm, hole diameter = 0.01524 cm, thermal conductivity of copper (λ a) =4W/(cm ° C); the second path is from the junction of the chip to the back pad (R2), conducted by convection/radiation (R.) to the PCB board surface and ambient air, and the thermal resistance from the square surface 1cm long on the PCB board to the ambient air due to natural convection.
2. The method of claim 1, wherein the dc step-down scheme is outputting 5V, current 1A, conversion efficiency η is 90%, and ambient temperature TA is 50C °.
3. The rated temperature of the used capacitor is 100 ℃ and is close to the chip, and the temperature of the TJ chip is required to be controlled at 90 ℃.
4. The method of claim 1, wherein the selected chip has a thermal resistance of less than 71.4 "C/W, and wherein the selected chip is a type selected from the group consisting of S0P8-EP chips.
5. The method of claim 1, wherein the heat sink is configured to effectively reduce the temperature of the chip, and for the chip component, the heat sink is located on the top of the chip package.
6. The method as claimed in claim 1, wherein the product space is relatively large and is not a sealed environment, and a low power fan can be placed inside the product space, so that the low power fan can generate air flow, thereby reducing the overall thermal resistance of the system.
7. The method for mounting an electronic switch to reduce thermal impedance as claimed in claim 1, wherein the product to be waterproof, dustproof and shockproof is placed inside the sealed mold by filling the sealed mold with heat conductive silicone grease, so that the power system components can transfer heat to the housing through the heat conductive silicone grease, and further dissipate the heat.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010583319.7A CN111725163A (en) | 2020-06-23 | 2020-06-23 | Electronic switch installation method for reducing thermal impedance |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010583319.7A CN111725163A (en) | 2020-06-23 | 2020-06-23 | Electronic switch installation method for reducing thermal impedance |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111725163A true CN111725163A (en) | 2020-09-29 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010583319.7A Pending CN111725163A (en) | 2020-06-23 | 2020-06-23 | Electronic switch installation method for reducing thermal impedance |
Country Status (1)
| Country | Link |
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| CN (1) | CN111725163A (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1198244A (en) * | 1995-04-20 | 1998-11-04 | 卡杜克电子有限公司 | Heatsink-mountable power resistor having improved heat-transfer interface with the heatsink |
| CN101221588A (en) * | 2007-01-09 | 2008-07-16 | 上海杰得微电子有限公司 | Radiation design method in PCB design |
| US20100044856A1 (en) * | 2008-08-19 | 2010-02-25 | International Business Machines Corporation | Electronic package with a thermal interposer and method of manufacturing the same |
| CN103021877A (en) * | 2012-12-22 | 2013-04-03 | 中国船舶重工集团公司第七0九研究所 | High-density chip radiating method by dual-path heat transfer |
| CN108735691A (en) * | 2018-06-11 | 2018-11-02 | 山东超越数控电子股份有限公司 | A kind of heat dissipating method and device of portable computer high power chip bga |
| US20190188357A1 (en) * | 2017-12-15 | 2019-06-20 | Industrial Technology Research Institute | Chip temperature computation method and chip temperature computation device |
-
2020
- 2020-06-23 CN CN202010583319.7A patent/CN111725163A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1198244A (en) * | 1995-04-20 | 1998-11-04 | 卡杜克电子有限公司 | Heatsink-mountable power resistor having improved heat-transfer interface with the heatsink |
| CN101221588A (en) * | 2007-01-09 | 2008-07-16 | 上海杰得微电子有限公司 | Radiation design method in PCB design |
| US20100044856A1 (en) * | 2008-08-19 | 2010-02-25 | International Business Machines Corporation | Electronic package with a thermal interposer and method of manufacturing the same |
| CN103021877A (en) * | 2012-12-22 | 2013-04-03 | 中国船舶重工集团公司第七0九研究所 | High-density chip radiating method by dual-path heat transfer |
| US20190188357A1 (en) * | 2017-12-15 | 2019-06-20 | Industrial Technology Research Institute | Chip temperature computation method and chip temperature computation device |
| CN108735691A (en) * | 2018-06-11 | 2018-11-02 | 山东超越数控电子股份有限公司 | A kind of heat dissipating method and device of portable computer high power chip bga |
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