CN111710670B - 利用硅连接层集成电源门控电路的半导体装置 - Google Patents

利用硅连接层集成电源门控电路的半导体装置 Download PDF

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CN111710670B
CN111710670B CN202010620154.6A CN202010620154A CN111710670B CN 111710670 B CN111710670 B CN 111710670B CN 202010620154 A CN202010620154 A CN 202010620154A CN 111710670 B CN111710670 B CN 111710670B
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power
bare chip
silicon
connection layer
semiconductor device
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CN111710670A (zh
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范继聪
单悦尔
徐彦峰
张艳飞
闫华
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Wuxi Zhongwei Yixin Co Ltd
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Abstract

本申请公开了一种利用硅连接层集成电源门控电路的半导体装置，涉及半导体技术，该半导体装置内部设置有源的硅连接层以集成裸片，裸片内部的裸片功能模块的电源端通过硅堆叠连接点连接到连接点引出端，硅连接层内布设电源门控电路，利用硅连接层内的电源门控电路的电源输出端连接裸片相应的连接点引出端从而连接至裸片功能模块的电源端，电源门控电路可以根据获取到的休眠控制信号控制给裸片功能模块的供电，从而使不工作的裸片功能模块进入休眠状态以达到节约功耗的目的；且电源门控电路布设在硅连接层、制作难度低，也可以避免布设在裸片内会存在的加工难度大和占用较大芯片面积的问题。

Description

利用硅连接层集成电源门控电路的半导体装置
技术领域
本发明涉及半导体技术领域，尤其是一种利用硅连接层集成电源门控电路的半导体装置。
背景技术
半导体芯片被广泛应用于各种领域，尤其是移动通信、数据中心、导航制导和自动驾驶等新型领域，随着集成电路制造工艺的飞速发展和半导体装置工作频率的提高，半导体装置的功能迅速增加，而功耗增加又将导致芯片发热量的增大和可靠性的下降，成为亟待解决的问题。
发明内容
本发明人针对上述问题及技术需求，提出了一种利用硅连接层集成电源门控电路的半导体装置，本发明的技术方案如下：
一种利用硅连接层集成电源门控电路的半导体装置，该半导体装置包括基板、层叠设置在基板上的硅连接层以及层叠设置在硅连接层上的裸片；
裸片内包括裸片功能模块和硅堆叠连接模块，硅堆叠连接模块内包括若干个硅堆叠连接点，裸片上还设置有连接点引出端，裸片功能模块的电源端与相应的硅堆叠连接点相连，硅堆叠连接点通过重布线层内的顶层金属线与相应的连接点引出端相连；裸片的输入输出端口通过硅连接层上的硅通孔连接至基板；
硅连接层内布设有电源门控电路，电源门控电路包括电源输入端、电源输出端和休眠控制端，裸片上与内部裸片功能模块的电源端相连通的连接点引出端通过硅连接层内的金属连线连接至电源门控电路的电源输出端，电源门控电路的电源输入端连接供电电源、休眠控制端获取裸片内部的裸片功能模块对应的休眠控制信号，电源门控电路根据休眠控制信号控制裸片功能模块的供电使裸片功能模块在未工作时进入休眠模式。
其进一步技术方案为，半导体装置内部包括若干个裸片功能模块，各个裸片功能模块的电源端分别连通至相应的连接点引出端，则与各个裸片功能模块的电源端相连通的连接点引出端分别通过硅连接层内的金属连线连接至电源门控电路的电源输出端。
其进一步技术方案为，硅连接层内布设有若干个电源门控电路，各个电源门控电路的电源输入端均相连并连接至供电电源，各个电源门控电路的休眠控制端均相连并获取休眠控制信号，各个电源门控电路的电源输出端均相连并与裸片功能模块的电源端连通，各个电源门控电路并联控制裸片功能模块的供电。
其进一步技术方案为，半导体装置内部包括若干个裸片功能模块，各个裸片功能模块的电源端分别连通至相应的连接点引出端，硅连接层内布设有若干个电源门控电路；每个电源门控电路对应一个或多个裸片功能模块且电源门控电路的电源输出端与对应的裸片功能模块的电源端连通，电源门控电路获取对应的裸片功能模块的休眠控制信号并控制裸片功能模块的供电。
其进一步技术方案为，半导体装置包括一个裸片，裸片内部包括若干个裸片功能模块，则半导体装置内部的若干个裸片功能模块在同一个裸片内；
或者，半导体装置包括若干个裸片，若干个裸片均层叠设置在硅连接层上且硅连接层覆盖所有的裸片，各个裸片内部包括裸片功能模块；则半导体装置内部的若干个裸片功能模块包括同一个裸片内的若干个裸片功能模块和/或若干个裸片内的若干个裸片功能模块。
其进一步技术方案为，硅连接层内还布设有硅连接层功能模块，硅连接层功能模块的电源端通过硅连接层内的金属连线连接至相应的电源门控电路的电源输出端，电源门控电路控制硅连接层功能模块的供电。
其进一步技术方案为，电源门控电路的休眠控制端连接半导体装置的外接端口获取外部输入的休眠控制信号；
或者，硅连接层布设有连接裸片的监控电路，电源门控电路的休眠控制端通过硅连接层内的金属连线连接硅连接层内的监控电路，硅连接层内的监控电路向电源门控电路输入休眠控制信号；
或者，电源门控电路的休眠控制端连接对应的裸片功能模块所在的裸片中的其他电路模块，裸片除裸片功能模块之外的其他电路模块向电源门控电路输入休眠控制信号；
或者，半导体装置包括均层叠设置在硅连接层上的若干个裸片，则电源门控电路的休眠控制端连接其他裸片，其他裸片向电源门控电路输入休眠控制信号。
其进一步技术方案为，电源门控电路的电源输入端处设置有大于预定电容值的稳压电容。
其进一步技术方案为，电源门控电路在硅连接层内靠近其对应的裸片内的裸片功能模块布设。
其进一步技术方案为，电源门控电路基于大于预定尺寸的晶体管实现。
本发明的有益技术效果是：
本申请公开了一种利用硅连接层集成电源门控电路的半导体装置，该半导体装置内部设置有源的硅连接层，在硅连接层布设电源门控电路，利用硅连接层的电源门控电路连接裸片内部裸片功能模块的电源端，电源门控电路可以根据获取到的休眠控制信号控制给裸片功能模块的供电，从而使不工作的裸片功能模块进入休眠状态以达到节约功耗的目的。且电源门控电路布设在硅连接层、制作难度低，也可以避免布设在裸片内会存在的加工难度大和占用较大芯片面积的问题。
附图说明
图1是本申请的半导体装置的结构剖视图。
图2是硅连接层内的电源门控电路的电路结构示意图。
图3是一个电源门控电路连接控制一个裸片内的多个裸片功能模块的电路示意图。
图4是多个电源门控电路并联控制一个裸片内的一个裸片功能模块的电路示意图。
图5是多个电源门控电路连接控制一个裸片内的多个裸片功能模块的电路示意图。
图6是本申请的半导体装置内部包含多个裸片时的结构剖视图。
图7是一个电源门控电路连接控制多个裸片内的裸片功能模块的电路示意图。
图8是多个电源门控电路连接控制多个裸片内的裸片功能模块的电路示意图。
具体实施方式
下面结合附图对本发明的具体实施方式做进一步说明。
本申请公开了一种利用硅连接层集成电源门控电路的半导体装置，请参考图1，该半导体装置包括基板1、层叠设置在基板1上的硅连接层2以及层叠设置在硅连接层2上的裸片3。实际还包括外部的封装外壳以及用于信号引出的管脚等，图1未示出。
其中，裸片3内包括裸片功能模块和硅堆叠连接模块，硅堆叠连接模块内包括若干个硅堆叠连接点4，裸片3上还设置有连接点引出端5，裸片功能模块的电源端与相应的硅堆叠连接点4相连，硅堆叠连接点4通过重布线层(RDL)内的顶层金属线6与相应的连接点引出端5相连。裸片3的输入输出端口还通过硅连接层2上的硅通孔连接至基板1。
本申请中的硅连接层2为有源硅连接层，硅连接层2内布设有电源门控电路(PowerGate，PG)，本申请下列图示直接以PG表示电源门控电路。电源门控电路包括电源输入端、电源输出端和休眠控制端。电源门控电路的具体电路结构为现有电路结构，请参考图2，电源门控电路由晶体管构成，包括串联的PMOS和NMOS管，两个MOS管的栅极相连形成休眠控制端SLEEP，串联的两个晶体管引出电源输入端VS引脚和GS引脚、引出电源输出端VVS引脚和VGS引脚。由于本申请将电源门控电路布设在硅连接层2内，而硅连接层2相比于裸片来说面积较大且制作难度较低，因此电源门控电路内部可以采用大尺寸的晶体管，也即电源门控电路基于大于预定尺寸的晶体管实现，该预定尺寸通常为裸片内可以容纳的晶体管的最大尺寸。进一步的，电源门控电路的电源输入端处设置有稳压电容C，如图2所示，稳压电容C连接在电源输入端的VS引脚和GS引脚之间，该稳压电容C通常为大电容也即稳压电容C的电容值大于预定电容值，该预定电容值根据实际需要配置，该稳压电容C可以在电源门控电路打开或关闭时起到稳定电源的作用。
硅连接层2内还布设有金属连线，裸片3上与内部的裸片功能模块的电源端相连通的连接点引出端5通过硅连接层2内的金属连线连接至电源门控电路的电源输出端。电源门控电路的电源输入端连接供电电源，通常是连接到基板1上的电源端从外部获取供电电源，电源门控电路的休眠控制端(SLEEP)获取所连的裸片功能模块对应的休眠控制信号，并根据休眠控制信号打开或关断，当电源门控电路打开时，供电电源正常给裸片功能模块供电，当电源门控电路关闭时，电源门控电路切断供电电源给裸片功能模块的供电，从而可以在裸片功能模块不工作时使其进入休眠模式，以达到降低功耗的目的。裸片3内可能还有其他无需控制供电的模块，则直接连接至供电电源即可。
当该半导体装置在硅连接层2上集成一片裸片时，基于上述基础电路结构，本申请有多种可扩展实现的结构：
1、一个电源门控电路控制一片裸片3内的一个裸片功能模块的供电，也即采用如上所述的电路结构。
2、一个电源门控电路控制一片裸片3内的多个裸片功能模块的供电，也即一片裸片3内部包括若干个裸片功能模块，则各个裸片功能模块的电源端分别连通至各自相应的连接点引出端5，裸片3上与内部各个裸片功能模块的电源端相连通的连接点引出端5分别通过硅连接层2内的金属连线连接至同一个电源门控电路的电源输出端。请参考图3，其以一个PG控制一片裸片3内的两个裸片功能模块为例。则一个电源门控电路对应一个裸片3内的多个裸片功能模块，则该电源门控电路根据各个裸片功能模块对应的休眠控制信号控制相应的裸片功能模块的供电。
3、多个电源门控电路控制一片裸片3内的同一个裸片功能模块的供电，也即硅连接层2内布设有若干个上述结构的电源门控电路，各个电源门控电路的电源输入端均相连并连接至供电电源，各个电源门控电路的休眠控制端均相连并获取休眠控制信号，各个电源门控电路的电源输出端均相连并与裸片功能模块的电源端连通，也即这多个电源门控电路构成并联结构。请参考图4，其以硅连接层2内布设三个PG为例，这多个电源门控电路对应同一个裸片功能模块并根据休眠控制信号控制裸片功能模块的供电，这种并联结构可以有效减少压降。
4、多个电源门控电路控制一片裸片3内的多个裸片功能模块，也即一片裸片3内部包括若干个裸片功能模块、各个裸片功能模块的电源端分别连通至各自相应的连接点引出端。同时，硅连接层2内布设有若干个上述结构的电源门控电路，各个电源门控电路的电源输入端均连接供电电源，每个电源门控电路与一个或者多个裸片功能模块对应且电源输出端对应的裸片功能模块的电源端连通，电源门控电路的休眠控制端获取其连接的裸片功能模块对应的休眠控制信号，当对应一个裸片功能模块时连接结构如上述第一种情况，当对应多个裸片功能模块时连接结构如上述第二种情况。每个电源门控电路根据各个裸片功能模块对应的休眠控制信号控制其连接的各个裸片功能模块的供电，多个电源门控电路联合控制多个裸片功能模块的供电。请参考图5，其以硅连接层2内两个PG控制裸片3内两个裸片功能模块、且每个PG控制一个裸片功能模块为例。
进一步的，本申请中的半导体装置还可以为多裸片装置，又称为Chiplet芯粒集成装置，也即请参考图6，该半导体装置内包括若干个裸片3，这若干个裸片3均层叠设置在硅连接层2上且硅连接层2覆盖所有的裸片3，这多个裸片3可以在硅连接层2上沿着一维方向排布，如图7所示，也可以在硅连接层2上按照二维堆叠方式排布，也即在水平面上沿着横、纵两个方向排布，如图8所示，这多个裸片3在硅连接层2上可以合理布局，根据各个裸片3的形状和面积紧凑排布在硅连接层2上使得整个装置的整体面积较小且裸片之间的互连性能较好。硅连接层2内还布设有跨裸片连线7，裸片3之间根据电路互连需要通过跨裸片连线7相连实现裸片3之间的互连。硅连接层2内布设有两个交叉垂直方向的跨裸片连线7，且跨裸片连线7分层布置互不影响，连线跨度和方向都可灵活布设，因此每个裸片可通过硅连接层2内的跨裸片连线7与其他任意一个裸片相连。需要说明的是，硅连接层2内的裸片之间的跨裸片连线7和裸片与电源门控电路之间的金属连线本质上都是金属线，本申请为了对连接的电路结构区分所以采用了不同的名词。当内部的裸片3为FPGA裸片时，该多裸片装置即实现为多裸片FPGA。
当该半导体装置在硅连接层2上集成多个裸片时，本申请也有多种可扩展实现的结构：
1、一个电源门控电路连接并控制多裸片装置中一个裸片内的裸片功能模块的供电，可以是一个裸片内的一个或多个裸片功能模块，这种情况与上述单裸片结构的各种相应情况类似，本申请不再赘述。
2、一个电源门控电路同时连接并控制多裸片装置中多个裸片内的裸片功能模块的供电，对于电源门控电路连接的每个裸片，电源门控电路又可以进一步连接并控制其内部的一个或多个裸片功能模块，电源门控电路与每个裸片内的裸片功能模块的电源端的具体连接方式可以参考上述单裸片的情况。请参考图7，其以一个电源门控电路连接并控制三个裸片3内的裸片功能模块，且连接并控制其中两个裸片内的一个裸片功能模块的供电、连接并控制另一个裸片内的两个裸片功能模块的供电为例。
3、多个电源门控电路连接并控制多裸片装置中一个裸片内的裸片功能模块，可以是连接控制一个裸片内的一个或多个裸片功能模块的供电，这种情况与上述单裸片中的相应情况类似，本申请不再赘述。
4、多个电源门控电路连接并控制多裸片装置中多个裸片内的裸片功能模块，每个电源门控电路连接并控制一个裸片或多个裸片内的裸片功能模块，每个电源门控电路连接并控制每个裸片内的裸片功能模块的具体扩展情况可以参考上述第一种情况。在这种情况中，可以每个电源门控电路对应控制一个裸片内的所有裸片功能模块，或者多个电源门控电路交叉控制多个裸片内的裸片功能模块，此时一个裸片内可能部分裸片功能模块由一个电源门控电路控制、另一部分裸片功能模块由其他的电源门控电路控制。请参考图8，其以三个PG控制四个裸片内的裸片功能模块为例。
该半导体装置内部的电路结构无论实现为上述哪一种情况，电源门控电路在硅连接层2内布设时，靠近其连接控制的裸片内的裸片功能模块布设，使得电源门控电路与相应的裸片之间的连线的路径尽可能短。
另外，硅连接层2内还布设有硅连接层功能模块，硅连接层功能模块具体可以为多种电路结构，比如连接在裸片之间的通过有源器件构成调节信号延迟的信号延迟调节电路，比如给裸片提供时钟信号的时钟树电路，再比如监控裸片的运行状态的监控电路(Monitor)。则硅连接层功能模块的电源端通过硅连接层内的金属连线连接至相应的电源门控电路的电源输出端，电源门控电路可以利用上述对裸片功能模块的控制过程控制硅连接层功能模块的供电，以便使硅连接层功能模块不工作时进入休眠模式降低功耗。同样的，可以由一个电源门控电路控制一个或多个硅连接层功能模块的供电，也可以由多个电源门控电路控制一个或多个硅连接层功能模块的供电。
在上述电路结构中，每个电源门控电路的休眠控制端获取到的休眠控制信号有多种来源：
(1)来自于该半导体装置的外部，则电源门控电路的休眠控制端连接该半导体装置的外接端口，从而从外接端口获取外部输入的休眠控制信号以打开或关闭。
(2)来自于该半导体装置内部，且来自于硅连接层2内的监控电路(Monitor)，这种情况适用于硅连接层2布设有连接各个裸片的监控电路的情况。此时电源门控电路的休眠控制端通过硅连接层内的金属连线连接硅连接层内的监控电路。硅连接层内的监控电路向电源门控电路输入休眠控制信号以控制电源门控电路的打开和关闭。
(3)来自于该半导体装置内部，且来自于该电源门控电路所要控制的裸片功能模块所在的裸片，该裸片除了该电源门控电路所要控制的裸片功能模块之外，还包括其他电路模块，电源门控电路的休眠控制端连接至相应的连接点引出端从而与裸片内部的其他电路模块相连，其他电路模块向电源门控电路输入休眠控制信号以控制电源门控电路的打开和关闭。
(4)来自于该半导体装置内部，且来自于该电源门控电路所要控制的裸片功能模块所在的裸片之外的其他裸片，则电源门控电路的休眠控制端连接至其他裸片，其他裸片向电源门控电路输入休眠控制信号以控制电源门控电路的打开和关闭。
以上所述的仅是本申请的优选实施方式，本发明不限于以上实施例。可以理解，本领域技术人员在不脱离本发明的精神和构思的前提下直接导出或联想到的其他改进和变化，均应认为包含在本发明的保护范围之内。

Claims (10)

1.一种利用硅连接层集成电源门控电路的半导体装置，其特征在于，所述半导体装置包括基板、层叠设置在所述基板上的硅连接层以及层叠设置在所述硅连接层上的裸片；
所述裸片内包括裸片功能模块和硅堆叠连接模块，所述硅堆叠连接模块内包括若干个硅堆叠连接点，所述裸片上还设置有连接点引出端，所述裸片功能模块的电源端与相应的硅堆叠连接点相连，所述硅堆叠连接点通过重布线层内的顶层金属线与相应的连接点引出端相连；所述裸片的输入输出端口通过所述硅连接层上的硅通孔连接至所述基板；
所述硅连接层内布设有电源门控电路，所述电源门控电路包括电源输入端、电源输出端和休眠控制端，所述裸片上与内部裸片功能模块的电源端相连通的连接点引出端通过所述硅连接层内的金属连线连接至所述电源门控电路的电源输出端，所述电源门控电路的电源输入端连接供电电源、休眠控制端获取所述裸片内部的裸片功能模块对应的休眠控制信号，所述电源门控电路根据所述休眠控制信号控制所述裸片功能模块的供电使所述裸片功能模块在未工作时进入休眠模式。
2.根据权利要求1所述的半导体装置，其特征在于，所述半导体装置内部包括若干个所述裸片功能模块，各个裸片功能模块的电源端分别连通至相应的连接点引出端，则与各个裸片功能模块的电源端相连通的连接点引出端分别通过所述硅连接层内的金属连线连接至所述电源门控电路的电源输出端。
3.根据权利要求1所述的半导体装置，其特征在于，所述硅连接层内布设有若干个所述电源门控电路，各个所述电源门控电路的电源输入端均相连并连接至所述供电电源，各个所述电源门控电路的休眠控制端均相连并获取所述休眠控制信号，各个所述电源门控电路的电源输出端均相连并与所述裸片功能模块的电源端连通，各个所述电源门控电路并联控制所述裸片功能模块的供电。
4.根据权利要求1所述的半导体装置，其特征在于，所述半导体装置内部包括若干个所述裸片功能模块，各个裸片功能模块的电源端分别连通至相应的连接点引出端，所述硅连接层内布设有若干个所述电源门控电路；每个电源门控电路对应一个或多个裸片功能模块且所述电源门控电路的电源输出端与对应的裸片功能模块的电源端连通，所述电源门控电路获取对应的裸片功能模块的休眠控制信号并控制所述裸片功能模块的供电。
5.根据权利要求2或4所述的半导体装置，其特征在于，
所述半导体装置包括一个裸片，所述裸片内部包括若干个裸片功能模块，则所述半导体装置内部的若干个裸片功能模块在同一个裸片内；
或者，所述半导体装置包括若干个裸片，若干个裸片均层叠设置在所述硅连接层上且所述硅连接层覆盖所有的裸片，各个裸片内部包括裸片功能模块；则所述半导体装置内部的若干个裸片功能模块包括同一个裸片内的若干个裸片功能模块和/或若干个裸片内的若干个裸片功能模块。
6.根据权利要求1所述的半导体装置，其特征在于，所述硅连接层内还布设有硅连接层功能模块，所述硅连接层功能模块的电源端通过所述硅连接层内的金属连线连接至相应的电源门控电路的电源输出端，所述电源门控电路控制所述硅连接层功能模块的供电。
7.根据权利要求1-4任一所述的半导体装置，其特征在于，
所述电源门控电路的休眠控制端连接所述半导体装置的外接端口获取外部输入的所述休眠控制信号；
或者，所述硅连接层布设有连接所述裸片的监控电路，所述电源门控电路的休眠控制端通过所述硅连接层内的金属连线连接所述硅连接层内的监控电路，所述硅连接层内的监控电路向所述电源门控电路输入所述休眠控制信号；
或者，所述电源门控电路的休眠控制端连接对应的裸片功能模块所在的裸片中的其他电路模块，所述裸片除所述裸片功能模块之外的其他电路模块向所述电源门控电路输入所述休眠控制信号；
或者，所述半导体装置包括均层叠设置在所述硅连接层上的若干个裸片，则所述电源门控电路的休眠控制端连接其他裸片，其他裸片向所述电源门控电路输入所述休眠控制信号。
8.根据权利要求1-4任一所述的半导体装置，其特征在于，所述电源门控电路的电源输入端处设置有大于预定电容值的稳压电容。
9.根据权利要求1-4任一所述的半导体装置，其特征在于，所述电源门控电路在所述硅连接层内靠近其对应的裸片内的裸片功能模块布设。
10.根据权利要求1-4任一所述的半导体装置，其特征在于，所述电源门控电路基于大于预定尺寸的晶体管实现。
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