CN111682067A - 一种具有横向耗尽区的高电子迁移率晶体管 - Google Patents
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Abstract
本发明公开了一种具有横向耗尽区的高电子迁移率晶体管,芯片层结构包括由下至上依次设置的衬底、GaN缓冲层、第一电流阻挡层、N‑GaN横向耗尽区、第二电流阻挡层、GaN沟道层,AlxGa1‑xN势垒层,以及设置在所述N‑GaN横向耗尽区右侧和所述GaN沟道层右侧的绝缘层,其中0<x<0.5,在所述AlxGa1‑xN势垒层两端分别设置源极和栅极,所述栅极靠近所述绝缘层一端,在所述N‑GaN横向耗尽区上表面设置漏极,所述漏极靠近所述源极一端。本发明的高电子迁移率晶体管,利用N‑GaN作为横向耗尽区,获得具有高耐压性能、高响应特性、不漏电的器件。
Description
技术领域
本发明涉及半导体电子材料和器件制造领域,特别涉及一种具有横向耗尽区 的高电子迁移率晶体管。
背景技术
氮化镓(GaN)作为第三代半导体,具有禁带宽度大、临界击穿电场高、电 子饱和速度高、导热性能好、抗辐射等优异性能,与铝镓氮(AlGaN)等材料形 成具有高浓度和高迁移率的二维电子气异质结沟道,是最有潜力应用在高压、高 频、高温和大功率器件领域的材料之一。
目前,GaN基高电子迁移率晶体管(HEMT)主要有两种结构,一种为常见 的横向HEMT,另一种为垂直电流孔径HEMT(CAVET),如图2所示,现有的 横向GaN基HEMT器件主要依靠源极206与漏极208之间的有源区来承受耐压, 为获得大的击穿电压,需设置很大的源极206与漏极208间距,将会增大芯片的 表面积,这与器件小型化的要求相矛盾;另外,在漏极208一侧的栅极207边缘 存在的高电场会将电子注入AlGaN势垒层205的表面陷阱中,而受表面态的影 响较大,容易造成电流崩塌,从而影响器件的响应特性。
如图3所示,现有的CAVET虽然能够规避表面态的影响,但其芯片结构需 要在重掺杂的N+-GaN衬底302上通过外延生长得到,而N+-GaN衬底302不易 获得;CAVET结构中的电流阻挡层304采用P型掺杂,将会增大工艺难度;CAVET 是通过增加N--GaN缓冲层303的厚度来提高器件的耐压,但其厚度范围一般为 1~10μm,故提高耐压水平有限。所以,采用现有技术难以实现具有耐压高、性 能良好的高电子迁移率晶体管。
发明内容
发明目的:针对以上问题,本发明目的是提供一种具有横向耗尽区的高电子 迁移率晶体管,利用N-GaN作为横向耗尽区,获得具有高耐压性能、高响应特 性、不漏电的器件。
技术方案:本发明提出了一种具有横向耗尽区的高电子迁移率晶体管,芯片 层结构包括由下至上依次设置的衬底、GaN缓冲层、第一电流阻挡层、N-GaN 横向耗尽区、第二电流阻挡层、GaN沟道层,AlxGa1-xN势垒层,以及设置在所 述N-GaN横向耗尽区右侧和所述GaN沟道层右侧的绝缘层,其中0<x<0.5,在 所述AlxGa1-xN势垒层两端分别设置源极和栅极,所述栅极靠近所述绝缘层一端, 在所述N-GaN横向耗尽区上表面设置漏极,所述漏极靠近所述源极一端。
所述N-GaN横向耗尽区的横向尺寸大于厚度。
所述源极与所述GaN沟道层形成欧姆接触,所述栅极与所述AlxGa1-xN势垒 层形成肖特基接触,所述漏极与所述N-GaN横向耗尽区形成欧姆接触。
所述源极、所述栅极、所述漏极采用的电极材料为Ni、Al、In、Au、Ti中 的任意一种或几种金属所构成的合金。
所述衬底为外延生长出GaN基材料的蓝宝石、碳化硅、硅、氧化锌、氮化 镓或氮化铝中的任意一种。
所述N-GaN耗尽区利用Si、S、Se、Te中任意一种元素进行掺杂,掺杂后电 子浓度为1×1015cm-3~1×1020cm-3。
所述第一电流阻挡层与所述第二电流阻挡层将电子限制在N-GaN横向耗尽 区内并形成电流通道,电流阻挡层材料采用高Al组分的AlyGa1-yN或AlN,不限 于这两种,其中0.5<y<1。
所述绝缘层防止电子泄露到N-GaN横向耗尽区之外,绝缘层材料采用SiO2或SiN,不限于这两种。
所述栅极宽度LA与栅下的电流导通孔宽度LB满足:LA>LB。
有益效果:本发明与现有技术相比,其显著优点是:
1、本发明的高电子迁移率晶体管,N-GaN横向耗尽区的横向尺寸大于厚度, 因此在施加源漏电压后能够得到较大的耗尽区,获得具有高耐压性能的器件;
2、本发明的高电子迁移率晶体管通过将栅极到漏极的电流通道设置在 N-GaN横向耗尽区内,有效地避免AlxGa1-xN势垒层表面态的影响,进而提高器 件的响应特性;
3、本发明的高电子迁移率晶体管通过设置第一电流阻挡层、第二电流阻挡 层和绝缘层,能有效地将电子限制在N-GaN横向耗尽区内,从而避免漏电现象 的发生。
附图说明
图1为本发明的电子迁移率晶体管的芯片层结构示意图;
图2为现有技术的横向高电子迁移率晶体管的芯片层结构示意图;
图3为现有技术的垂直电流孔径高电子迁移率晶体管的芯片层结构示意图。
具体实施方式
为了使本发明所解决的技术问题、技术方案及有益效果更加清楚明白, 以下结合实施例和附图,对本发明进行进一步的详细说明。应当理解,此处 所描述的实施例仅用以具体解释本发明,而并不用于限定本发明权利要求的 范畴。
如图1,本发明的一种具有横向耗尽区的高电子迁移率晶体管,芯片层结构 包括由下至上依次设置的衬底101、GaN缓冲102、第一电流阻挡层103、N-GaN 横向耗尽区104、第二电流阻挡层105、GaN沟道层106,AlxGa1-xN势垒层107, 以及设置在N-GaN横向耗尽区104右侧和GaN沟道层106右侧的绝缘层108, 具体的,AlxGa1-xN势垒层107采用Al0.2Ga0.8N势垒层,在Al0.2Ga0.8N势垒层两 端分别设置源极109和栅极111,栅极110靠近绝缘层108一端,在N-GaN横向 耗尽区104上表面设置漏极111,漏极111靠近源极109一端,N-GaN横向耗尽 区104的横向尺寸大于厚度。
源极109与GaN沟道层106形成欧姆接触,栅极110与Al0.2Ga0.8N势垒层 形成肖特基接触,漏极111与N-GaN横向耗尽区104形成欧姆接触。源极109、 栅极110、漏极111采用的电极材料为Ni/Au合金,使用Al、In、Au、Ti中的任 意一种或几种金属所构成的合金也能够达到相似的效果。
衬底101为外延生长出GaN基材料为C面蓝宝石,使用碳化硅、硅、氧化 锌、氮化镓或氮化铝中的任何一种也能够达到相似的效果。
N-GaN耗尽区104利用Si进行掺杂,掺杂后电子浓度为1×1016cm-3,利用 Si、S、Se、Te中任意一种元素进行掺杂也能够达到相似的效果,掺杂后电子浓 度为1×1015cm-3~1×1020cm-3。
第一电流阻挡层103与第二电流阻挡层105将电子限制在N-GaN横向耗尽 区104内并形成电流通道,电流阻挡层材料采用Al0.8Ga0.2N,采用AlN也能够达 到相似的效果。
绝缘层108防止电子泄露到N-GaN横向耗尽区104之外,绝缘层108材料 采用SiO2,采用SiN也能够达到相似的效果。
栅极110宽度LA与栅下的电流导通孔宽度LB满足:LA>LB,具体的,LA=1.5μm, LB=0.8μm。
以上所述仅为本发明较佳实施方式,本发明的保护范围并不以上述实施方式 为限,但凡本领域普通技术人员根据本发明所揭示内容所做的等效修饰或变化, 都应纳入权利要求书中记载的保护范围内。
Claims (9)
1.一种具有横向耗尽区的高电子迁移率晶体管,其特征在于,芯片层结构包括由下至上依次设置的衬底(101)、GaN缓冲层(102)、第一电流阻挡层(103)、N-GaN横向耗尽区(104)、第二电流阻挡层(105)、GaN沟道层(106),AlxGa1-xN势垒层(107),以及设置在所述N-GaN横向耗尽区(104)右侧和所述GaN沟道层(106)右侧的绝缘层(108),其中0<x<0.5,在所述AlxGa1-xN势垒层(107)两端分别设置源极(109)和栅极(110),所述栅极(110)靠近所述绝缘层(108)一端,在所述N-GaN横向耗尽区(104)上表面设置漏极(111),所述漏极(111)靠近所述源极(109)一端。
2.根据权利要求1所述的一种具有横向耗尽区的高电子迁移率晶体管,其特征在于,所述N-GaN横向耗尽区(104)的横向尺寸大于厚度。
3.根据权利要求1所述的一种具有横向耗尽区的高电子迁移率晶体管,其特征在于,所述源极(109)与所述GaN沟道层(106)形成欧姆接触,所述栅极(110)与所述AlxGa1-xN势垒层(107)形成肖特基接触,所述漏极(111)与所述N-GaN横向耗尽区(104)形成欧姆接触。
4.根据权利要求1所述的一种具有横向耗尽区的高电子迁移率晶体管,其特征在于,所述源极(109)、所述栅极(110)、所述漏极(111)采用的电极材料为Ni、Al、In、Au、Ti中的任意一种或几种金属所构成的合金。
5.根据权利要求1所述的一种具有横向耗尽区的高电子迁移率晶体管,其特征在于,所述衬底(101)为外延生长出GaN基材料的蓝宝石、碳化硅、硅、氧化锌、氮化镓或氮化铝中的任意一种。
6.根据权利要求1所述的一种具有横向耗尽区的高电子迁移率晶体管,其特征在于,所述N-GaN耗尽区(104)利用Si、S、Se、Te中任意一种元素进行掺杂,掺杂后电子浓度为1×1015cm-3~1×1020cm-3。
7.根据权利要求1所述的一种具有横向耗尽区的高电子迁移率晶体管,其特征在于,所述第一电流阻挡层(103)与所述第二电流阻挡层(105)的材料采用高Al组分的AlyGa1-yN或AlN,其中0.5<y<1。
8.根据权利要求1所述的一种具有横向耗尽区的高电子迁移率晶体管,其特征在于,所述绝缘层(108)材料采用SiO2或SiN。
9.根据权利要求1所述的一种具有横向耗尽区的高电子迁移率晶体管,其特征在于,所述栅极(110)宽度LA与栅下的电流导通孔宽度LB满足:LA>LB。
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US20170236951A1 (en) * | 2014-06-27 | 2017-08-17 | Massachusetts Institute Of Technology | Structures for nitride vertical transistors |
CN104659082A (zh) * | 2015-03-12 | 2015-05-27 | 苏州能屋电子科技有限公司 | 垂直结构AlGaN/GaN HEMT器件及其制作方法 |
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