CN111607782B - 半导体制造装置 - Google Patents

半导体制造装置 Download PDF

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CN111607782B
CN111607782B CN201910700558.3A CN201910700558A CN111607782B CN 111607782 B CN111607782 B CN 111607782B CN 201910700558 A CN201910700558 A CN 201910700558A CN 111607782 B CN111607782 B CN 111607782B
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CN111607782A (zh
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浅井俊晶
阿佐见范之
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Kioxia Corp
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Abstract

实施方式提供一种能够避免电弧的产生的半导体制造装置。一实施方式的半导体制造装置具备：支承半导体基板的载置台；以及导电性的环状部件，以包围半导体基板的方式设于载置台的外周部。载置台具有在环状部件的内周端部的下部设置的槽。

Description

半导体制造装置
相关申请
本申请享受以日本专利申请2019－33178号(申请日：2019年2月26日)为基础申请的优先权。本申请通过参照该基础申请而包含基础申请的全部内容。
技术领域
本发明的实施方式涉及半导体制造装置。
背景技术
在半导体制造装置中，有在产生了等离子体的状态下在半导体基板上形成导电膜的成膜装置。在这种成膜装置中，半导体基板载置于载置台上。另外，在载置台的外周部为了均匀地产生等离子体而设有被称为边缘环的环状部件。
在上述那样的成膜装置中产生了等离子体时，膜不仅形成在半导体基板上，也形成在边缘环上以及载置台上。因此，有因形成在半导体基板上的膜和从边缘环连续到载置台的膜的电位差而产生电弧的情况。在该情况下，成膜装置停止而阻碍一并成膜。另外，担心装置内的部件因电弧而破损。
发明内容
本发明的实施方式提供一种能够避免电弧的产生的半导体制造装置。
一实施方式的半导体制造装置具备：支承半导体基板的载置台；以及导电性的环状部件，以包围半导体基板的方式设于载置台的外周部。载置台具有设于环状部件的内周端部的下部的槽。
附图说明
图1是第一实施方式的半导体制造装置的概略的剖面图。
图2是图1所示的区域R的放大图。
图3是第一实施方式的半导体制造装置的主要部分的俯视图。
图4是放大了比较例的半导体制造装置的一部分的剖面图。
图5是变形例1的槽的剖面图。
图6是变形例2的槽的剖面图。
图7是变形例2的槽的俯视图。
图8是变形例3的槽的剖面图。
图9是第二实施方式的半导体制造装置的概略的剖面图。
图10是表示第二实施方式的边缘环的支承方式的立体图。
附图标记说明
1、2：半导体制造装置，10：载置台，11：槽，20：边缘环(环状部件)，40：支承腿，100：半导体基板
具体实施方式
以下，参照附图对本发明的实施方式进行说明。本实施方式不限定本发明。
(第一实施方式)
图1是第一实施方式的半导体制造装置的概略的剖面图。图2是图1所示的区域R的放大图。图3是第一实施方式的半导体制造装置的主要部分的俯视图。
图1、图2、以及图3所示的半导体制造装置1是在产生了等离子体的状态下通过CVD(Chemical Vapor Deposition)法成膜的等离子体CVD装置。该半导体制造装置1具备载置台10、边缘环20、以及电极板30。
在载置台10的上表面载置晶片状的半导体基板100。载置台10具有用于加热半导体基板100的加热功能。而且，在载置台10的上表面设有槽11。如图3所示，槽11是环状槽。
边缘环20是以包围半导体基板100的方式设置在载置台10的外周部并具有梯形的截面的环状部件。边缘环20由导电性的材料形成。
电极板30与载置台10以及边缘环20对置。若向电极板30供给高频电力，则在电极板30与载置台10之间产生等离子体。
在本实施方式中，导电性的边缘环20设于载置台10的外周部。因此，等离子体在载置台10的中央部与外周部之间均匀地产生。另外，为了均匀地产生等离子体，边缘环20的高度h优选为半导体基板100的厚度t以上。
在本实施方式中，若在产生了等离子体的状态下导入成膜气体(未图示)，则如图1以及图2所示，膜101a形成在由载置台10支承的半导体基板100上。若均匀地产生等离子体，则膜101a的厚度也变得均匀。而且，与膜101a同时，在载置台10上形成膜101b，在边缘环20上形成膜101c。在本实施方式中，膜101a、膜101b、以及膜101c是使用于掩模的碳膜。但是，各膜也可以是碳膜以外的导电膜。
图4是放大了比较例的半导体制造装置的一部分的剖面图。在该半导体制造装置中，载置台10不具有槽11。因此，上述成膜工序的结果是，形成于载置台10上的膜101b和形成于边缘环20上的膜101c成为一体。膜101c和形成于半导体基板100上的膜101a之间的电位差较大。因此，与膜101c相同电位的膜101b和膜101a的电位差也变大，其结果，可能引起电弧。
另一方面，在本实施方式的半导体制造装置1中，如图2所示，载置台10具有设于边缘环20的内周端部20a的下部的槽11。利用槽11扩大边缘环20的内周端部20a与载置台10的空间距离。由此，载置台10上的膜101b与边缘环20上的膜101c分离而形成。即，膜101b从与膜101a的电位差较大的膜101c分离。
因而，根据本实施方式，膜101a与膜101b之间的电位差减少，因此能够避免电弧。由此，能够在半导体基板100上将膜101a一并成膜。而且，也能够避免因电弧而引起的部件的破损。
(变形例1)
图5是变形例1的槽11的剖面图。在上述第一实施方式中，如图2所示，槽11的内缘部11a位于半导体基板100的外周端部的下部和边缘环20的内周端部20a的下部之间。与此相对，在图5所示的槽11中，内缘部11a位于半导体基板100的外周端部的下部。即，内缘部11a位于比边缘环20的内周端部20a的下部靠载置台10的中央侧即可。
根据本变形例，槽11的外缘部11b与第一实施方式相同地位于比边缘环20的内周端部20a的下部靠载置台10的外周侧，因此能够使膜101b从膜101c分离。
(变形例2)
图6是变形例2的槽11的剖面图。另外，图7是变形例2的槽11的俯视图。
在上述第一实施方式中，如图3所示，槽11是沿着边缘环20的内周端部20a的整周设置的一个环状槽。另一方面，在本变形例中，如图6以及图7所示，在上述环状槽的内侧进一步形成有另一个槽11。即，槽11是双重的环状槽。
在本变形例中，也能够将在载置台10上形成的膜101b从形成在边缘环20上的膜101c分离。因而，在半导体基板100上形成膜101a时能够避免电弧。另外，槽11也可以是比2重更多的环状槽。
(变形例3)
图8是变形例3的槽11的剖面图。在上述第一实施方式中，如图3所示，槽11是沿边缘环20的内周端部20a的整周连续的环状槽。另一方面，本变形例的槽11如图8所示，槽11是沿边缘环20的内周端部20a断续地设置的槽。
根据本变形例，与在载置台10未形成有槽11的比较例(参照图4)相比，能够抑制电弧的产生。
(第二实施方式)
图9是第二实施方式的半导体制造装置的概略的剖面图。另外，图10是表示第二实施方式的边缘环20的支承方式的立体图。对与上述的第一实施方式相同的构成要素标注相同的附图标记，省略详细的说明。
如图9所示，在本实施方式的半导体制造装置2中，边缘环20设于载置台10的外侧。即，载置台10从边缘环20分离。另外，如图10所示，边缘环20由4根支承腿40支承。另外，支承腿40的根数只要在能够支承边缘环20的范围内就没有限制。
在如上述那样构成的半导体制造装置2中，载置台10与边缘环20被空间隔开。因此，如图9所示，在基于等离子体CVD的成膜工序中，形成于载置台10上的膜101b与形成于边缘环20上的膜101c分离。由此，形成于半导体基板100上的膜101a与膜101b之间的电位差减少。由此，在本实施方式中，也与第一实施方式相同，能够避免电弧。
虽然说明了本发明的几个实施方式，但这些实施方式是作为例子而提出的，并不意图限定发明的范围。这些实施方式能够以其他各种方式实施，在不脱离发明的主旨的范围内能够进行各种省略、替换、变更。这些实施方式及其变形包含在发明的范围及主旨中，并且包含在权利要求书所记载的发明及其等价的范围内。

Claims (4)

1.一种半导体制造装置，其中，具备：
载置台，支承半导体基板；以及
导电性的环状部件，以包围所述半导体基板的方式设于所述载置台的外周部，
所述载置台具有在所述环状部件的内周端部的下部设置的槽，所述槽的一部分从所述环状部件的内周端部露出。
2.如权利要求1所述的半导体制造装置，其中，
所述槽是沿所述环状部件的内周端部的整周设置的环状槽。
3.如权利要求1或2所述的半导体制造装置，其中，
所述槽的内缘部位于比所述内周端部的所述下部靠所述载置台的中央侧的位置，
所述槽的外缘部位于比所述内周端部的所述下部靠所述载置台的外周侧的位置。
4.如权利要求3所述的半导体制造装置，其中，
所述槽的所述内缘部位于所述半导体基板的外周端部的下部。
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