CN111537863A - PCB signal loss calculation method based on flow adhesive stacking - Google Patents
PCB signal loss calculation method based on flow adhesive stacking Download PDFInfo
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- CN111537863A CN111537863A CN202010398027.6A CN202010398027A CN111537863A CN 111537863 A CN111537863 A CN 111537863A CN 202010398027 A CN202010398027 A CN 202010398027A CN 111537863 A CN111537863 A CN 111537863A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
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Abstract
The invention discloses a PCB signal loss calculation method based on flow adhesive stacking, which is used for carrying out pre-simulation evaluation on the loss of a PCB circuit board so as to improve the signal reliability of the PCB circuit board and comprises the following steps: step S1: distinguishing and marking the media on the PCB according to the attributes of the media in the media layer; step S2: calculating the loss value of each dielectric part independently according to different dielectric materials, the dielectric size and the position in the PCB; step S3: and making an overall loss value distribution diagram of the PCB by using the calculated loss values of the plurality of dielectric parts so as to guide the design and manufacture of the PCB. The method solves the technical problems that in the prior art, the dielectric layer is treated as a uniform medium, so that the calculated loss value error is large, and the signal simulation precision of the PCB is low.
Description
Technical Field
The invention relates to the field of high-precision PCB manufacturing, in particular to a PCB signal loss calculation method based on flow adhesive stacking.
Background
With the development of the electronic industry, higher requirements are put on the PCB, and the signal loss of the PCB circuit becomes one of the control indexes of high-end electronic product equipment. The PCB signal loss performance is more accurately simulated from the design end, the research and development period of the PCB sample plate manufacturing, loss testing, design adjusting and sample plate remanufacturing can be greatly shortened, and the method has positive effects on increasing the market competitiveness of products and reducing the research and development cost of the PCB.
The existing loss simulation is not enough in that a circuit dielectric layer is simplified into a dielectric with uniformly distributed loss performance in the calculation process, and a loss value D is generally used when the whole dielectric layer is subjected to loss fittingfAnd thus the accuracy of the analog value of the signal is degraded.
Disclosure of Invention
In order to solve the problems, the invention provides a PCB signal loss calculation method based on flow adhesive stacking, and mainly aims to solve the technical problems that in the prior art, a dielectric layer is treated as a uniform medium, so that the calculated loss value error is large, and the signal analog value precision of a PCB is low.
In order to achieve the above object, the present invention provides a method for calculating signal loss of a PCB based on flow adhesive stacking, the method is used for performing a pre-simulation evaluation on the loss of the PCB to improve the signal reliability of the PCB, and the method comprises:
step S1: distinguishing and marking media on the PCB according to the properties of the media in the media layer, wherein at least one part of the media is a glue flowing medium;
step S2: calculating the loss value of each dielectric part independently according to different dielectric materials, the dielectric size and the position in the PCB;
step S3: and making an overall loss value distribution diagram of the PCB by using the calculated loss values of the plurality of dielectric parts so as to guide the design and manufacture of the PCB.
The invention has the beneficial effects that:
in reality, the electric field energy density of a PCB is not generally uniformly distributed. The glue flow in the processing process is to form a circuit and a hardened layer after solidification, the circuit and the hardened layer can be used as a semi-solidified medium with uniform medium, and the circuit is positioned between core board areas at two sides, so that the loss of the solidified circuit can be changed, and the semi-solidified medium layer is divided into two different areas, namely a glass fiber area and a glue flow area, so as to distinguish two different electrical properties.
After the loss values of all medium parts are calculated independently, the whole loss value distribution graph of the PCB can be calculated more accurately, compared with the mode that the semi-solid value layer sheet is taken as a uniform whole to calculate loss parameters, the obtained result is more accurate, the actual situation can be reflected more effectively, and the technical problem that the reliability of signals of the PCB is lower in the prior art is solved.
On the other hand, for a PCB partially including the tightly coupled differential traces, the electric field energy is concentrated in the glue flow region between the two differential traces, and the loss value of the glue flow region provides a larger contribution component to the overall signal loss. Under the condition, the semi-solidified medium layer is divided into a glass fiber area and a gummosis area, and the loss is calculated respectively, so that the loss is calculated more accurately than the loss calculated by taking the semi-solidified medium layer as a uniform whole.
Drawings
FIG. 1 is a schematic flow diagram of the process of the present invention.
Fig. 2 and 3 are schematic views of an embodiment of the present invention.
Detailed Description
Referring to fig. 1, the present invention relates to a method for calculating signal loss of a PCB based on flow stacking.
The invention discloses a PCB signal loss calculation method based on flow adhesive stacking, which comprises the following steps: and distinguishing and marking the media on the PCB according to the properties of the media in the media layer, wherein at least one part of the media is a glue flowing medium.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a semi-cured PCB after lamination, in this embodiment, the dielectric layer includes a semi-cured medium 10 and a core board medium according to the properties of the dielectric layer; the core board medium is distributed in the core board area 20; the metal circuit 31 and the copper foil wiring 32 are arranged between the core board area 20 and the semi-solidified dielectric layer 10, the semi-solidified dielectric layer is further divided into a gummosis area 12 and a glass fiber area 11, the gummosis area 12 is considered to be an uneven medium after being pressed, the uneven medium is treated and marked differently from the glass fiber area 11, and calculation of loss parameters is facilitated.
Wherein, to gummosis district 12, the fine district 11 of glass and the regional 20 loss value of core respectively mark: df2, Df1, Df 3.
Step S2: the loss values of the dielectric portions are calculated individually based on the different dielectric materials and the dielectric dimensions and positions in the PCB.
Referring to fig. 3, there are several calculation methods for the loss values of different media, and the simplest one is the basic principle calculation using the conservation of electric field intensity, such as: the loss D of the entire prepreg 10 is obtained from the handbook of prepregf0And loss value D of core region 20f3(ii) a Obtaining a wear factor D of the gummosis zone 12 according to the gummosis medium material descriptionf2(ii) a Then:
Df0×D＝Df1×d1+Df2×d2- - - - - - - - - - - - - - - - - - (formula 1)
Where D is the thickness of the semi-curing medium 10 and D1Is the thickness of the glass fiber zone 11, d2Is the height of the glue flowing area 12, the loss value D of the glass fiber area can be calculatedf1. So far, the loss values of the various media have been determined for the entire circuit board.
Step S3: and making an overall loss value distribution diagram of the PCB by using the calculated loss values of the plurality of dielectric parts so as to guide the design and manufacture of the PCB. And (3) simulating and calculating the whole loss value distribution diagram by combining the loss value of the glass fiber area 11, the loss value of the gummosis area 12 and the loss value of the core board area 20 with the distribution areas and sizes of various media of the PCB.
In practical application, the electromagnetic field distribution data of the PCB is substituted into the calculated loss value distribution map, so that the final routing loss parameter of the PCB can be calculated, and data reference is provided for the design and wiring of the circuit board.
The above embodiments are merely illustrative of the preferred embodiments of the present invention, and not restrictive, and various changes and modifications to the technical solutions of the present invention may be made by those skilled in the art without departing from the spirit of the present invention, and the technical solutions of the present invention are intended to fall within the scope of the present invention defined by the appended claims.
Claims (4)
1. A method for calculating signal loss of a PCB based on flow adhesive stacking is used for carrying out pre-simulation evaluation on the loss of the PCB so as to improve the signal reliability of the PCB, and comprises the following steps:
step S1: distinguishing and marking the media on the PCB according to the attributes of the media in the media layer;
step S2: calculating the loss value of each dielectric part independently according to different dielectric materials, the dielectric size and the position in the PCB;
step S3: and making an overall loss value distribution diagram of the PCB by using the calculated loss values of the plurality of dielectric parts so as to guide the design and manufacture of the PCB.
2. The method according to claim 1, wherein the dielectric layer in step S1 includes a prepreg medium and a core medium, and the prepreg medium is divided into a glass fiber region and a gel flow region according to distribution positions; the core plate medium is distributed in the core plate area; the marking method is to mark loss values respectively for the glue flowing area, the glass fiber area and the core board area formed by the glue flowing medium.
3. The method for calculating signal loss of PCB based on flow stacking according to claim 2, wherein the method for calculating the loss value of each dielectric part in the step S2 comprises:
obtaining a loss value of the whole semi-solidified medium according to a semi-solidified medium manual;
obtaining a loss factor of the gummosis area according to the gummosis medium material specification;
and calculating the loss factor of the glass fiber area by using the electric field strength according to the loss value of the semi-solidified medium, the loss factor of the gummosis area and the size of the PCB circuit board medium.
4. The PCB signal loss calculation method based on flow stacking of claim 3, wherein the step S3 comprises: and simulating and calculating the whole loss value distribution diagram by combining the loss values of the glass fiber area, the gummosis area and the core board area with the distribution areas and sizes of each medium of the PCB.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010398027.6A CN111537863B (en) | 2020-05-12 | 2020-05-12 | PCB signal loss calculation method based on gumming lamination |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010398027.6A CN111537863B (en) | 2020-05-12 | 2020-05-12 | PCB signal loss calculation method based on gumming lamination |
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| CN111537863A true CN111537863A (en) | 2020-08-14 |
| CN111537863B CN111537863B (en) | 2023-05-26 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130007690A1 (en) * | 2011-06-30 | 2013-01-03 | Hon Hai Precision Industry Co., Ltd. | Electronic device and simulation method for checking printed circuit board power loss |
| CN205229206U (en) * | 2015-12-18 | 2016-05-11 | 山东海量信息技术研究院 | Test mounting fixture to inboard high -speed signal loss test design |
| CN108156750A (en) * | 2018-01-11 | 2018-06-12 | 深圳市景旺电子股份有限公司 | A kind of flexible PCB and preparation method thereof |
| CN109753736A (en) * | 2019-01-09 | 2019-05-14 | 郑州云海信息技术有限公司 | A kind of the loss appraisal procedure and relevant apparatus of high-speed line system |
-
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- 2020-05-12 CN CN202010398027.6A patent/CN111537863B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130007690A1 (en) * | 2011-06-30 | 2013-01-03 | Hon Hai Precision Industry Co., Ltd. | Electronic device and simulation method for checking printed circuit board power loss |
| CN205229206U (en) * | 2015-12-18 | 2016-05-11 | 山东海量信息技术研究院 | Test mounting fixture to inboard high -speed signal loss test design |
| CN108156750A (en) * | 2018-01-11 | 2018-06-12 | 深圳市景旺电子股份有限公司 | A kind of flexible PCB and preparation method thereof |
| CN109753736A (en) * | 2019-01-09 | 2019-05-14 | 郑州云海信息技术有限公司 | A kind of the loss appraisal procedure and relevant apparatus of high-speed line system |
Non-Patent Citations (2)
| Title |
|---|
| 郑元元 等: "介质特性对高速信号的影响", 《电子世界》 * |
| 金西: "《数字集成电路设计》", 31 August 2013, 中国科学技术大学出版社 * |
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| CN111537863B (en) | 2023-05-26 |
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