CN110298086B

CN110298086B - Simulation method for testing performance of routing DUT

Info

Publication number: CN110298086B
Application number: CN201910505355.9A
Authority: CN
Inventors: 吴均; 黄刚
Original assignee: Edadoc Co ltd
Current assignee: Edadoc Co ltd
Priority date: 2019-06-12
Filing date: 2019-06-12
Publication date: 2023-04-07
Anticipated expiration: 2039-06-12
Also published as: CN110298086A

Abstract

The invention discloses a simulation method for testing the performance of a trace DUT (device under test) in the field of circuit board testing, which comprises the steps of obtaining parameters of a 2xthru line and a 2xthru + DUT line; fitting a 2xthru line by 3D simulation; after the fitting is finished, modifying the model, and simulating to obtain parameters of a 1xthru line; de-embedding of the 1xthru line is performed in the 2xthru + DUT line to obtain the DUT parameters after de-embedding. The invention can obtain the performance of the DUT only through accurate simulation, does not need to purchase expensive professional de-embedding software, greatly reduces the cost compared with the professional de-embedding software, can obtain a high-precision simulation result, and has simple operation in the whole simulation process.

Description

Simulation method for testing performance of routing DUT

Technical Field

The invention relates to the field of circuit board testing, in particular to a simulation method for testing the performance of a routing DUT.

Background

Printed Circuit Boards (PCB), also called PCB and PCB, are important components for physical support and signal transmission of electronic products, and the most important component is transmission lines. The trace form on the PCB has a decisive influence on the performance of high-speed signals and is therefore crucial for testing different trace forms. A commonly used test instrument is a network analyzer, and a coaxial radio frequency head is used for connecting the network analyzer and a trace on a PCB for testing, but a conventional calibration method of salt (short-open-load-direct connection) can only calibrate the position of the coaxial radio frequency head, and cannot remove the influence of the position, so that the performance of a trace DUT (object to be tested) on the PCB cannot be directly obtained.

In order to measure the performance of the trace DUT on the PCB, two methods are now commonly used to embed the DUT face, one is TRL (true-reflect-line) calibration and the other is AFR (automatic fixture removal). The TRL calibration can be directly completed through a network analyzer, but a set of TRL PCB fixture needs to be manufactured, a plurality of different delay lines need to be manufactured, the difficulty is high, and a plurality of coaxial radio frequency heads are needed; the AFR calibration does not need to additionally manufacture a PCB clamp, but data of the SOLT calibration test needs to be embedded in special software, and the software is generally expensive and needs to be purchased additionally, so that the operation cost of an enterprise is greatly increased.

The above-mentioned drawbacks are worth solving.

Disclosure of Invention

In order to overcome the defects of the prior art, the invention provides a simulation method for testing the performance of a wire DUT.

The technical scheme of the invention is as follows:

a simulation method for testing the performance of a routing DUT is characterized by comprising

Obtain the parameters of the 2xthru line and 2xthru + DUT line;

fitting the 2xthru line by 3D simulation;

after the fitting is finished, modifying the model, and simulating to obtain parameters of a 1xthru line;

de-embedding the 1xthru line in the 2xthru + DUT line to obtain the DUT parameters after de-embedding.

The invention according to the above solution is characterized in that the test is performed by SOLT calibration of a network analyzer, resulting in parameters of the 2xthru line and the 2xthru + DUT line.

The present invention according to the above aspect is characterized in that, in the process of 3D simulation fitting of the 2xthru line, the 2xthru line is first extracted into simulation software, and a 2xthru line first port and a 2xthru line second port are respectively added to both ends of the 2xthru line, so as to form a simulation model of the 2xthru line and realize simulation fitting of the 2xthru line.

Further, after the simulation model of the 2xthru line is formed, the dielectric constant and the loss factor of the board are set, parameters of the line width and the dielectric thickness of the transmission line are modified, and then the simulation fitting of the 2xthru line is performed.

The invention according to the above solution is characterized in that, in the process of simulating the 1xthru line, the method specifically includes:

extracting the 2xthru line into simulation software, and adjusting performance parameters;

then cutting the extracted 2xthru lines into half, and remaining the model of the 1xthru line;

adding a 1xthru line first port and a 1xthru line second port at both ends of the 1xthru line, respectively;

and finally, simulating the 1xthru line to obtain the parameters of the 1xthru line.

Furthermore, in the adjusting process of the performance parameters, the dielectric constant and the loss factor of the plate are firstly set, and then the roughness parameters of the wiring are set.

Furthermore, 3D simulation is carried out by using HFSS (high frequency simulation system) software.

The invention according to the above solution is characterized in that in the de-embedding process of the 1xthru line, the parameters of the 2xthru + DUT line and the parameters of the 1xthru line obtained through simulation are placed in ADS software, and the parameters of the DUT are obtained after de-embedding.

Further, the parameters of the 2xthru + DUT line and the parameters of the 1xthru line are placed in a demombed control of ADS software for de-embedding.

Further, a topological graph of the link is built in the ADS software, wherein the parameter controls of the 1xthru line are respectively arranged on the left side and the right side of the parameter control of the 2xthru + DUT line, and a first simulation port and a second simulation port are respectively arranged at the two ends of the link.

The invention according to the scheme is characterized by further comprising a process of carrying out insertion loss and return loss comparison with the parameters after the AFR software de-embedding.

The invention according to the scheme has the advantages that the performance of the DUT can be obtained only through accurate simulation, expensive professional de-embedding software is not needed to be purchased, the cost is greatly reduced compared with the professional de-embedding software, a high-precision simulation result can be obtained, and the whole simulation process is simple to operate.

Drawings

FIG. 1 is a schematic diagram of the structure of the 2xthru + DUT line.

FIG. 2 is a schematic view of the structure of the 2xthru line.

FIG. 3 is a PCB layout of 2xthru lines in the present invention.

FIG. 4 is a 3D simulation model diagram of 2xthru line according to the present invention.

FIG. 5 is a 3D simulation model diagram of the 1xthru line in the present invention.

FIG. 6 is an ADS topology diagram according to the present invention.

Fig. 7 is a graph of the insertion loss of the 2xthru line test and simulation fit in the present invention.

FIG. 8 is a graph of the return loss of a 2xthru line test and simulation fit in accordance with the present invention.

FIG. 9 is a graph of insertion loss fitted by simulation of the 1xthru line in the present invention.

FIG. 10 is a graph of the return loss of a 1xthru line simulation fit in the present invention.

FIG. 11 is a graph of insertion loss of DUT simulation fit after ADS de-embedding of the present invention.

FIG. 12 is a graph of return loss of DUT simulation fit after ADS de-embedding of the present invention.

FIG. 13 is a graph of insertion loss versus simulation fit of the present invention to a DUT and AFR software calibration to the DUT.

FIG. 14 is a plot of simulated fitting of the DUT in accordance with the present invention versus return loss for calibration of the DUT by the AFR software.

In the figure, 110-coaxial radio head; 120-DUT;200-2xthru line; 201-2xthru line first port; 202-2xthru line second port; 300-1xthru line; 301-1xthru line first port; 302-1xthru line second port; 401 — a first emulation port; 402-a second emulation port; 411-first 1xthru simulation parameter; 412-2xthru + DUT simulation parameters; 413-second 1xthru simulation parameter.

Detailed Description

The invention is further described with reference to the following figures and embodiments:

a simulation method for testing the performance of a trace DUT (device under test) comprises the following steps:

1. as shown in FIGS. 1 and 2, the parameters of the 2xthru line and the 2xthru + DUT line are obtained.

In this step, a test is performed by SOLT calibration of the network analyzer to obtain the parameters of the 2xthru line and the 2xthru + DUT line, wherein the PCB trace includes the coaxial RF head 110 and the DUT120.

2. As shown in fig. 3 and 4, a 2xthru line 200 is fitted to the 3D simulation.

In the process of 3D simulation fitting of the 2xthru line 200, the 2xthru line 200 is first extracted into the simulation software, and the 2xthru line first port 201 and the 2xthru line second port 202 are respectively added to the two ends of the 2xthru line 200, so as to implement the simulation fitting of the 2xthru line 200. Preferably, in this embodiment, 3D simulation is performed by using 3-dimensional simulation software HFSS, which can extract PCB traces of the cadence into the software and perform simulation operation.

Before the simulation fitting operation, the dielectric constant and the loss factor of the plate are set, parameters of the line width and the medium thickness of the transmission line are modified, and then the model of the 2xthru line 200 is simulated at 50GHz, so that the simulated and tested 2xthru line 200 achieves a relatively high precision, wherein insertion loss and return loss curves are shown in FIGS. 7 and 8.

3. After the fitting is completed, the model is modified and the parameters of the 1xthru line 300 are simulated, as shown in fig. 4 and 5. The method specifically comprises the following steps:

(1) Extracting the 2xthru line 200 into simulation software, and adjusting performance parameters;

(2) Then cutting the extracted 2xthru line 200 into half and leaving a model of 1xthru line 300;

(3) Adding a 1xthru wire first port 301 and a 1xthru wire second port 302 to both ends of the 1xthru wire 300, respectively;

(4) And finally, setting the simulation frequency to 50GHz, and simulating the 1xthru line 300 to obtain the parameters of the 1xthru line 300.

In the adjusting process of the performance parameters in the step (1), the dielectric constant (for example, 3.2) and the loss factor (for example, 0.002) of the plate are set to simulate the electrical performance of the plate, which is an M7 material of panasonic corporation in this embodiment; the roughness parameter of the traces (e.g., 0.7 microns) is set afterwards.

The insertion loss and return loss curves of the 1xthru line 300 obtained by the simulation are shown in fig. 9 and 10.

4. De-embedding of the 1xthru line is performed in the 2xthru + DUT line to obtain the DUT parameters after de-embedding.

In the process of de-embedding the 1xthru line, the parameters of the 2xthru + DUT line and the parameters of the simulated 1xthru line are placed in ADS software (preferably the demombed control of the ADS software), and the parameters of the DUT are obtained after de-embedding.

As shown in fig. 6, the DUT in this embodiment is a 4inch long trace, and a topology diagram of a link is built in ADS software, where the parameter controls of 1xthru line are respectively set on the left and right sides of the parameter control of the 2xthru + DUT line, that is, the first 1xthru simulation parameter 411 and the second 1xthru simulation parameter 413 are respectively set on the left and right sides of the 2xthru + DUT simulation parameter 412; and a first emulation port 401 and a second emulation port 402 are respectively arranged at two ends of the link, and parameters of the DUT can be obtained after the link is emulated.

The insertion loss and return loss curves of the DUT obtained by the simulation are shown in fig. 11 and 12.

As shown in fig. 13 and 14, the method further includes a process of comparing the insertion loss and the return loss with the parameters after the AFR software de-embedding, and as can be seen from the comparison, the difference between the two is small, so that the DUT parameter obtained through simulation in the invention has high accuracy; in addition, the invention does not need professional AFR de-embedding software, thereby greatly reducing the simulation cost.

It will be understood that modifications and variations can be made by persons skilled in the art in light of the above teachings and all such modifications and variations are intended to be included within the scope of the invention as defined in the appended claims.

The invention is described above with reference to the accompanying drawings, which are illustrative, and it is obvious that the invention is not limited to the above embodiments, and that the invention is within the scope of the invention as long as various modifications are made in the method concept and technical solution of the invention, or the concept and technical solution of the invention is directly applied to other occasions without modification.

Claims

1. A simulation method for testing the performance of a trace DUT (device under test) is characterized by comprising

Obtaining parameters of a 2xthru line and a 2xthru + DUT line;

fitting the 2xthru line by 3D simulation;

after the fitting is completed, modifying the model, and simulating to obtain parameters of the 1xthru line, wherein the process of simulating the 1xthru line specifically comprises the following steps:

finally, simulating the 1xthru line to obtain parameters of the 1xthru line;

and in the process of de-embedding the 1xthru line, putting the parameters of the 2xthru + DUT line and the simulated parameters of the 1xthru line into ADS software, and obtaining the parameters of the DUT after de-embedding.

2. The method for simulating the performance of the test trace DUT according to claim 1, wherein parameters of the 2xthru line and the 2xthru + DUT line are obtained by performing a test through a SOLT calibration of a network analyzer.

3. The method as claimed in claim 1, wherein in the process of 3D simulation fitting of the 2xthru line, the 2xthru line is first extracted into simulation software, and a 2xthru line first port and a 2xthru line second port are respectively added to two ends of the 2xthru line, so as to form a simulation model of the 2xthru line and realize simulation fitting of the 2xthru line.

4. The method according to claim 3, wherein after the simulation model of the 2xthru line is formed, the dielectric constant and the loss factor of the board are set, and the parameters of the line width and the dielectric thickness of the transmission line are modified, and then the simulation fitting of the 2xthru line is performed.

5. The method for simulating the performance of the test trace DUT as claimed in claim 1, wherein during the adjusting process of the performance parameters, the dielectric constant and the loss factor of the board are set first, and then the roughness parameter of the trace is set.

6. The method for simulating performance of a test trace DUT according to any of claims 3-5, characterized in that 3D simulation is performed by using 3-dimensional simulation software HFSS.

7. The method for simulating the performance of the test trace DUT according to claim 1, wherein the parameters of 2xthru + DUT line and the parameters of 1xthru line are placed in a debug control of ADS software for de-embedding.

8. The method for simulating the performance of the test trace DUT as recited in claim 1, further comprising the step of comparing the insertion loss and the return loss with the parameters after the AFR software de-embedding.