CN111464005A

CN111464005A - SiC power tube driving circuit with active crosstalk suppression function and control method

Info

Publication number: CN111464005A
Application number: CN202010338280.2A
Authority: CN
Inventors: 刘侃; 肖捷; 丁荣军; 栾皓喆; 周世超; 高莉
Original assignee: Hunan University
Current assignee: Hunan University
Priority date: 2020-04-26
Filing date: 2020-04-26
Publication date: 2020-07-28
Anticipated expiration: 2040-04-26
Also published as: CN111464005B

Abstract

The invention discloses a SiC power tube driving circuit with an active crosstalk suppression function, which comprises a basic driving circuit and an auxiliary circuit, wherein the basic driving circuit comprises an amplifying circuit, R1, R2 and D1, one end of R1 is connected with the amplifying circuit, the other end of R1 is connected with one end of R2, the other end of R2 is connected with a grid electrode of a power tube, the anode of D1 is connected with the other end of R1, and the cathode of the D1 is connected with one end of R1; the auxiliary loop comprises R3, R4, C1, S1, D2 and Q3, an emitter of S1 is connected with the other end of R2, one end of R3 is connected with the other end of R1, and the other end of R3 is connected with a base of S1; the two ends of the C1 are respectively connected with an S1 collector and a power tube source, the anode of the D2 is connected with a Q3 source, the cathode of the D2 is connected with one end of the R4, the other end of the R4 is connected with one end of the R1, the drain of the Q3 is connected with the amplifying circuit, and the source of the D3526 is connected with the power tube source. The invention has the advantages of simple structure, simple whole structure, low cost, easy control, crosstalk inhibition and the like.

Description

SiC power tube driving circuit with active crosstalk suppression function and control method

Technical Field

The invention relates to the technical field of power electronics, in particular to a SiC power tube driving circuit with an active crosstalk suppression function and a control method.

Background

In power electronic systems, the performance of semiconductor power devices directly affects the electrical energy conversion efficiency of the whole system. In recent years, third band gap semiconductor power devices represented by SiC and GaN have gradually replaced conventional semiconductor devices made of Si by virtue of their excellent switching performance.

Compared with GaN, the SiC semiconductor power device has higher withstand voltage and higher power, is widely applied to the high-power fields of high-speed rail aerospace, photovoltaic power generation, new energy automobiles and the like, and has good application prospect. The SiC semiconductor power switch is beneficial to greatly improving the switching frequency, reducing the switching loss, improving the conversion efficiency of the power system and realizing the further optimization of the performance of the power system. However, parasitic stray inductance inevitably exists in an actual driving circuit, and du/dt and di/dt of the SiC power tube in the switching process are high, so that the SiC power tube and the parasitic stray inductance act to generate current oscillation, a voltage difference is formed in a driving loop, the bridge arm switch is conducted or broken down mistakenly, electronic devices are damaged, reliability and safety of a power system are greatly reduced, and the effect of crosstalk is achieved. Therefore, the research on how to effectively inhibit the crosstalk effect of the bridge arm circuit is of great significance.

The existing methods for suppressing crosstalk effect can be roughly classified into the following methods:

first, reducing parasitic inductance is the simplest method, but it has limitations because the parasitic inductance cannot be completely eliminated in real circuits. Secondly, increasing the resistance of the driving resistor and connecting a capacitor in parallel between the gate and the source of the SiC switch can also achieve the effect, but this can reduce the switching performance, so that various parameters need to be reasonably balanced when the driving circuit is designed. In addition, the negative pressure driving can effectively reduce the positive peak value in the switch and reduce the probability of mistaken opening of the switch, but the risk of reverse breakdown of the switch is increased.

Disclosure of Invention

The technical problem to be solved by the invention is as follows: aiming at the technical problems in the prior art, the invention provides the SiC power tube driving circuit with the active crosstalk suppression function and the control method, wherein the SiC power tube driving circuit combines the advantages of the traditional negative pressure driving and Miller clamping structure, overcomes the defect that the negative pressure is easy to break down in the traditional negative pressure driving while ensuring that the switching performance is not influenced, has a simple overall structure, is low in cost and easy to control, and can be applied to a SiC bridge arm circuit system under a high-speed switch.

In order to solve the technical problems, the invention adopts the technical scheme that:

a SiC power tube driving circuit with active crosstalk suppression function comprises a basic driving circuit and an auxiliary circuit,

the basic driving circuit comprises an amplifying circuit, a resistor R1, a resistor R2 and a diode D1, wherein one end of the resistor R1 is connected with the positive output end of the amplifying circuit, the other end of the resistor R2 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the grid electrode of the SiC power tube, the anode of the diode D1 is connected with the other end of the resistor R1, and the cathode of the diode D1 is connected with one end of the resistor R1;

the auxiliary loop comprises a resistor R3, a resistor R4, a capacitor C1, a triode S1, a diode D2 and a MOS tube Q3, wherein an emitter of the triode S1 is connected to the other end of the resistor R2, one end of the resistor R3 is connected with the other end of the resistor R1, and the other end of the resistor R3 is connected with a base electrode of the resistor S1; two ends of a capacitor C1 are respectively connected to the collector of the S1 and the source of the power tube, the anode of a diode D2 is connected to the source of a MOS tube Q3, the cathode of the diode D2 is connected to one end of a resistor R4, the other end of the resistor R4 is connected to one end of a resistor R1, the drain of the MOS tube Q3 is connected to the output negative terminal of the amplifying circuit, and the source of the MOS tube Q3 is connected to the source of the power tube.

As a further improvement of the above technical solution:

the amplifying circuit comprises a power supply U1, a power supply U2, MOS transistors Q1 and Q2, wherein the anode of the power supply U1 is connected with the drain of the MOS transistor Q1, the source of Q1 is connected with the drain of the Q2, the source of the Q2 is connected with the cathode of the power supply U2, the anode of the power supply U2 is connected with the cathode of the power supply U1, the connection point of the source of the Q1 and the drain of the Q2 is the positive output terminal of the amplifying circuit, and the anode of the power supply U2 is the negative output terminal of the amplifying circuit.

The Q1, the Q2 and the Q3 are all Si MOS tubes.

The triode S1 is a PNP triode.

The MOS tube Q3 is turned on when the negative voltage pre-charging of the gate-source capacitance Cgs _ H of the power tube is needed and during the operation of the power tube, and is turned off when the voltage discharging of the gate-source capacitance Cgs _ H of the power tube is needed.

The invention also discloses a control method based on the SiC power tube driving circuit with the active crosstalk inhibition function, which is applied to upper and lower bridge arm power tubes of the same-arm branch,

at the moment that the lower bridge arm power tube is started, a parasitic capacitor Cgd _ H of the upper bridge arm power tube generates a downward induced current to pass through a resistor R2, a negative voltage difference is generated by a resistor R2 to enable a triode S1 to be conducted, the induced current flows from S1 to a capacitor C1, and a positive voltage spike of a gate-source electrode of the upper bridge arm power tube is reduced;

at the moment when the lower bridge arm power tube is closed, the parasitic capacitor Cgd _ H of the upper bridge arm power tube generates an upward induced current to flow through a capacitor C1 and a body diode of the triode S1, and the negative voltage spike of a gate-source electrode of the upper bridge arm power tube is reduced;

the MOS tube Q3 is closed a short time before the lower bridge arm power tube is closed, and the parasitic capacitance Cgs _ H of the upper bridge arm power tube forms a loop through the diode D2 and the resistor R4 to carry out reverse discharge to 0V;

at the moment when the lower bridge arm power tube is closed, the parasitic capacitance Cgd _ H of the upper bridge arm power tube generates an upward induced current to flow through the diode D2 and the resistor R4, and the negative voltage spike of the gate-source electrode of the upper bridge arm power tube is reduced.

As a further improvement of the above technical solution:

the upper bridge arm driving circuit comprises an upper basic driving loop and an upper auxiliary loop,

the upper basic driving circuit comprises an upper amplifying circuit, a resistor R1, a resistor R2 and a diode D1, wherein one end of the resistor R1 is connected with the positive output end of the upper amplifying circuit, the other end of the resistor R2 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the grid electrode of an upper bridge arm power tube Q4, the anode of the diode D1 is connected with the other end of the resistor R1, and the cathode of the diode D1 is connected with one end of the resistor R1;

the upper auxiliary loop comprises a resistor R3, a resistor R4, a capacitor C1, a triode S1, a diode D2 and a MOS tube Q3, wherein an emitter of the triode S1 is connected to the other end of the resistor R2, one end of the resistor R3 is connected with the other end of the resistor R1, and the other end of the resistor R3 is connected with a base electrode of the S1; two ends of a capacitor C1 are respectively connected to a collector of the S1 and a source of the upper bridge arm power tube Q4, an anode of a diode D2 is connected to a source of an MOS tube Q3, a cathode of the diode D2 is connected to one end of a resistor R4, the other end of the resistor R4 is connected to one end of a resistor R1, a drain of the MOS tube Q3 is connected to the output negative end of the upper amplifying circuit, and the source of the MOS tube Q3 is connected to a source of the upper bridge arm power tube Q4;

the upper amplifying circuit comprises a power supply U1, a power supply U2, MOS transistors Q1 and Q2, wherein the anode of the power supply U1 is connected with the drain of the MOS transistor Q1, the source of Q1 is connected with the drain of the MOS transistor Q2, the source of the power supply Q2 is connected with the cathode of the power supply U2, the anode of the power supply U2 is connected with the cathode of the power supply U1, the connection point of the source of the power supply Q1 and the drain of the MOS transistor Q2 is the positive output terminal of the upper amplifying circuit, and the anode of the power supply U2 is the negative output terminal of the upper amplifying circuit;

the lower bridge arm driving circuit is the same as the upper bridge arm driving circuit and comprises a lower basic driving circuit and a lower auxiliary circuit, the lower basic driving circuit comprises a lower amplifying circuit, a resistor R5, a resistor R6 and a diode D5, one end of the resistor R5 is connected with the positive output end of the lower amplifying circuit, the other end of the resistor R6 is connected with one end of the resistor R6, the other end of the resistor R6 is connected with the grid electrode of a lower bridge arm power tube Q8, the anode of the diode D5 is connected with the other end of the resistor R5, and the cathode of the diode D5 is connected with one end of the resistor R5;

the upper auxiliary loop comprises a resistor R7, a resistor R8, a capacitor C2, a triode S2, a diode D6 and a MOS tube Q7, wherein an emitter of the triode S2 is connected to the other end of the resistor R6, one end of the resistor R7 is connected with the other end of the resistor R5, and the other end of the resistor R7 is connected with a base electrode of the S2; two ends of a capacitor C2 are respectively connected to a collector of the S2 and a source of the lower bridge arm power tube Q8, an anode of a diode D6 is connected to a source of an MOS tube Q7, a cathode of the diode D6 is connected to one end of a resistor R8, the other end of the resistor R8 is connected to one end of a resistor R5, a drain of the MOS tube Q7 is connected to the negative output end of the lower amplifying circuit, and the source of the MOS tube Q7 is connected to a source of a Q8;

the lower amplifying circuit comprises a power supply U3, a power supply U4, MOS transistors Q5 and Q6, wherein the anode of the power supply U3 is connected with the drain of the MOS transistor Q5, the source of Q5 is connected with the drain of the MOS transistor Q6, the source of the power supply Q6 is connected with the cathode of the power supply U4, the anode of the power supply U4 is connected with the cathode of the power supply U3, the connection point of the source of the Q5 and the drain of the Q6 is the positive output terminal of the lower amplifying circuit, and the anode of the power supply U4 is the negative output terminal of the lower amplifying circuit;

the Q5 and the Q6 are alternately opened and used for controlling the on and off of a lower bridge arm power tube Q8; the Q3 is started to form a driving loop to reversely pre-charge the gate capacitor of the upper bridge arm power tube Q4 immediately before the Q5 is started;

the Q3 is closed before the Q5 is closed, the driving loop is turned off, and the gate capacitance of the upper bridge arm power tube Q4 is reversely discharged through the upper auxiliary circuit, so that the voltage is reduced to 0V.

The working period of the whole bridge arm is divided into a time stage from t0 to t1, a time stage from t1 to t2, a time stage from t2 to t3 and a time stage from t3 to t4 in turn, specifically,

at the time stage of t 0-t 1, the MOS transistors Q3 and Q6 are turned on, and Q5 is turned off; the lower bridge arm is in a closed state, the upper bridge arm driving circuit forms a loop, the power supply U2 reversely charges the gate capacitors of the capacitors C1 and Q4, and after the charging is finished, the gate voltage of the Q4 is negative pressure;

at the stage between t1 and t2, the MOS transistor Q5 is turned on, the Q6 is turned off, and in order to maintain the gate capacitor of the Q4 at negative pressure, the Q3 is still in a conducting state; at the moment of conducting the lower bridge arm, the bus voltage Uds of Q4 rises, a power supply U5 charges a Miller capacitor Cgd _ H and a source drain electrode capacitor Cds _ H of Q4, Miller current forms reverse differential pressure through a resistor R2 to enable a triode S1 to be conducted, a low-impedance loop is formed in a driving circuit to shunt the Miller current, and the forward voltage spike of a Q4 gate pole is reduced; meanwhile, the voltage of the gate of the Q4 is reversely charged and pulled down to negative voltage in the last period of time so as to reduce the risk of false turn-on of the Q4; the lower bridge arm is conducted, the bus current forms a conducting loop through the load inductor and the Q8, and the load inductor enters a charging state;

at the time stage of t 2-t 3, the MOS transistor Q3 is closed, and the Q5 keeps an open state unchanged; the gate pole capacitance of the upper bridge arm SiC switch Q4 forms a loop through a diode D2 and a resistor R4 to carry out reverse discharge to 0V, the lower bridge arm is still in an open state, and the current flow direction of a bus is unchanged;

at the time stage of t 3-t 4, the MOS transistor Q5 is closed, and Q3 and Q6 are opened; at the moment when the lower bridge arm is closed, the bus voltage Uds of Q4 is reduced, and the Miller capacitor Cgd _ H of Q4 discharges to generate reverse Miller current; at the moment, the capacitor C1 and the body diode of the triode S1 are conducted to form a low-impedance loop to shunt the Miller current, so that the negative voltage spike of the Q4 gate electrode is reduced; the gate voltage of the Q4 gate is reversely discharged and reduced to 0V in the last period to reduce the negative breakdown of Q4; the miller current for this period may also be shunted through D2 and resistor R4; after the lower bridge arm is closed, current in the inductor forms a loop through a body diode of Q4 to carry out follow current;

after the discharging of the miller capacitance of Q4 is completed, the following is repeated.

Compared with the prior art, the invention has the advantages that:

according to the SiC power tube driving circuit with the active crosstalk suppression function, the auxiliary circuit can be conducted instantly when the other bridge arm switch in the same arm branch is turned on and off to shunt induced current, so that the impedance of a driving loop is reduced, the effect of reducing the positive and negative voltage peaks of the gate-source electrode of the power tube is achieved, and the bridge arm crosstalk is suppressed; when the same bridge arm switch works, the auxiliary circuit is not connected into the driving circuit, and the switching performance of the switches on the same side is not influenced; before the other bridge arm switch is about to be closed, the gate pole capacitance of the bridge arm can be reversely discharged to 0V through the auxiliary circuit, so that the risk of negative voltage breakdown of the switch is effectively reduced; in addition, when the SiC switch tube is closed, the gate electrode capacitor can discharge through the auxiliary circuit, the switch turn-off speed is effectively accelerated, and the switch turn-off loss is reduced.

The driving circuit has simple structure, easy realization and lower device cost, and can realize high integration of the driving circuit because large-volume devices such as inductors and the like are not used; the circuit has good effect of inhibiting the crosstalk of the SiC bridge arm, ensures that the turn-off loss of the switch is reduced under the condition of not influencing the performance of the switch, and can be widely applied to SiC bridge arm circuit systems in various high-power and high-speed switch working states.

Compared with the existing crosstalk suppression driving circuit, the SiC power tube driving circuit with the active crosstalk suppression function and the control method combine the advantages of the traditional negative pressure driving and Miller clamping structure, have simple control method, simultaneously ensure good suppression effect on bridge arm crosstalk effect under the condition of not influencing the SiC switching performance, and can be widely applied to the field of high-power electronic systems adopting SicMOSFET (silicon-based metal oxide semiconductor field effect transistor) or SiC IGBT (insulated gate bipolar transistor) power devices.

Drawings

FIG. 1 is a circuit schematic of an embodiment of a driver circuit of the present invention;

FIG. 2 is a timing diagram of waveforms of switches in a double pulse experiment according to the present invention;

fig. 3(a) is a driving current and bus current running diagram in a period t0 to t 1.

Fig. 3(b) is a driving current and bus current running diagram in the period t1 to t 2.

Fig. 3(c) is a driving current and bus current running diagram in the period t2 to t 3.

Fig. 3(d) is a driving current and bus current running diagram in the period t3 to t 4.

FIG. 4(a) is a waveform diagram of the gate voltages of the upper and lower arms at the moment of opening the lower arm in the present invention.

FIG. 4(b) is a waveform diagram of the gate voltages of the upper and lower arms at the moment of turn-off of the lower arm in the present invention.

Fig. 5(a) is a waveform diagram of gate voltages of upper and lower arms of a conventional negative voltage driving circuit at a moment when the lower arm is turned on.

Fig. 5(b) is a waveform diagram of gate voltages of upper and lower arms of a conventional negative voltage driving circuit at the moment when the lower arm is turned off.

Fig. 6(a) is a comparison graph of waveforms of gate voltages at the lower bridge arm turn-on instant in the driving circuit of the invention and the conventional driving circuit.

Fig. 6(b) is a comparison graph of waveforms of gate voltages at the moment of lower bridge arm turn-off in the inventive and conventional driving circuits.

Fig. 7(a) is a comparison graph of waveforms of switching transient losses at the lower arm turn-on instant in the inventive and conventional driving circuits.

Fig. 7(b) is a comparison graph of waveforms of switching transient losses at the lower bridge arm turn-off instant in the inventive and conventional driving circuits.

Detailed Description

The invention is further described below with reference to the figures and the specific embodiments of the description.

As shown in fig. 1, the present embodiment discloses a SiC power tube driving circuit with an active crosstalk suppression function, which includes a basic driving circuit and an auxiliary circuit, where the basic driving circuit includes an amplifying circuit, a resistor R1, a resistor R2, and a diode D1, one end of the resistor R1 is connected to an output positive terminal of the amplifying circuit, the other end of the resistor R2 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to a gate of the SiC power tube, an anode of the diode D1 is connected to the other end of the resistor R1, and a cathode of the diode D1 is connected to one end of the resistor R1; the auxiliary loop comprises a resistor R3, a resistor R4, a capacitor C1, a triode S1, a diode D2 and a MOS tube Q3, wherein an emitter of the triode S1 is connected to the other end of the resistor R2, one end of the resistor R3 is connected with the other end of the resistor R1, and the other end of the resistor R3 is connected with a base electrode of the resistor S1; two ends of a capacitor C1 are respectively connected to the collector of the S1 and the source of the power tube, the anode of a diode D2 is connected to the source of the MOS tube Q3, the cathode of the diode D2 is connected to one end of a resistor R4, the other end of the resistor R4 is connected to one end of a resistor R1, the drain of the MOS tube Q3 is connected to the output negative terminal of the amplifying circuit, and the source of the diode D3 is connected to the source of the power tube. The amplifying circuit comprises a power supply U1, a power supply U2, MOS transistors Q1 and Q2, wherein the anode of the power supply U1 is connected with the drain of the MOS transistor Q1, the source of Q1 is connected with the drain of Q2, the source of Q2 is connected with the cathode of the power supply U2, the anode of the power supply U2 is connected with the cathode of the power supply U1, the connection point of the source of Q1 and the drain of Q2 is the positive output terminal of the amplifying circuit, and the anode of the power supply U2 is the negative output terminal of the amplifying circuit.

When the driving circuit is applied to the same-arm branch, the structures of the upper and lower bridge arm driving circuits in the same-arm branch are completely the same, as shown in fig. 1, the upper bridge arm driving circuit includes an upper basic driving circuit and an upper auxiliary circuit, the upper basic driving circuit and the basic driving circuit have the same structure, the upper auxiliary circuit and the auxiliary circuit have the same structure (the names are different so as to distinguish the upper bridge arm driving circuit and the lower bridge arm driving circuit in the same-arm branch), the upper basic driving circuit includes an upper amplifying circuit, a resistor R1, a resistor R2 and a diode D1, one end of the resistor R1 is connected to the positive output terminal of the upper amplifying circuit, the other end of the resistor R2 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the gate of the upper bridge arm power tube Q4, the anode of the diode D1 is connected to the other end of the resistor R1, and the cathode; the upper auxiliary loop comprises a resistor R3, a resistor R4, a capacitor C1, a triode S1, a diode D2 and a MOS tube Q3, wherein an emitter of the triode S1 is connected to the other end of the resistor R2, one end of the resistor R3 is connected with the other end of the resistor R1, and the other end of the resistor R3 is connected with a base electrode of the resistor S1; two ends of a capacitor C1 are respectively connected to a collector of the S1 and a source of the upper bridge arm power tube Q4, an anode of a diode D2 is connected to a source of an MOS tube Q3, a cathode of the diode D2 is connected to one end of a resistor R4, the other end of the resistor R4 is connected to one end of a resistor R1, a drain of the MOS tube Q3 is connected to the output negative end of the upper amplifying circuit, and the source of the MOS tube Q3 is connected to a source of the upper bridge arm power tube Q4;

the upper amplifying circuit comprises a power supply U1, a power supply U2, MOS transistors Q1 and Q2, wherein the anode of the power supply U1 is connected with the drain of the MOS transistor Q1, the source of Q1 is connected with the drain of the Q2, the source of the Q2 is connected with the cathode of the power supply U2, the anode of the power supply U2 is connected with the cathode of the power supply U1, the connection point of the source of the Q1 and the drain of the Q2 is the positive output terminal of the upper amplifying circuit, and the anode of the power supply U2 is the negative output terminal of the upper amplifying circuit;

similarly, the lower bridge arm driving circuit is the same as the upper bridge arm driving circuit and comprises a lower basic driving circuit and a lower auxiliary circuit, the lower basic driving circuit comprises a lower amplifying circuit, a resistor R5, a resistor R6 and a diode D5, one end of the resistor R5 is connected with the positive output end of the lower amplifying circuit, the other end of the resistor R5 is connected with one end of a resistor R6, the other end of the resistor R6 is connected with the grid of a lower bridge arm power tube Q8, the anode of the diode D5 is connected with the other end of the resistor R5, and the cathode of the diode D5 is connected with one end of a resistor R5;

the upper auxiliary loop comprises a resistor R7, a resistor R8, a capacitor C2, a triode S2, a diode D6 and a MOS tube Q7, wherein an emitter of the triode S2 is connected to the other end of the resistor R6, one end of the resistor R7 is connected with the other end of the resistor R5, and the other end of the resistor R7 is connected with a base electrode of the resistor S2; two ends of a capacitor C2 are respectively connected to a collector of the S2 and a source of the lower bridge arm power tube Q8, an anode of a diode D6 is connected to a source of an MOS tube Q7, a cathode of the diode D6 is connected to one end of a resistor R8, the other end of the resistor R8 is connected to one end of a resistor R5, a drain of the MOS tube Q7 is connected to the negative output end of the lower amplifying circuit, and the source of the MOS tube Q7 is connected to a source of a Q8;

the lower amplifying circuit comprises a power supply U3, a power supply U4, MOS transistors Q5 and Q6, wherein the anode of the power supply U3 is connected with the drain electrode of the MOS transistor Q5, the source electrode of Q5 is connected with the drain electrode of Q6, the source electrode of Q6 is connected with the cathode of the power supply U4, the anode of the power supply U4 is connected with the cathode of the power supply U3, the connection point of the source electrode of Q5 and the drain electrode of Q6 is the positive output terminal of the lower amplifying circuit, and the anode of the power supply U4 is the negative output terminal of the lower amplifying circuit.

Specifically, the switching tubes Q4 and Q8 adopt SiC MOSFETs of C3M0065100J type of CREE company, and can also be replaced by SiC IGTB in the field of high power and high voltage; si MOS tubes Q3 and Q7 are Si230X series Si MOS tubes, the MOS tubes are small in current and input capacitance, the switching frequency can reach 1MHz, and the switching frequency requirement of a high-power SiC power system is met.

In this embodiment, a part of the auxiliary circuit, which is composed of the PNP transistor S1, the resistor R3, and the capacitor C1 in the upper auxiliary circuit, is used to shunt the induced current generated by the gate-drain capacitance Cgd _ H of the upper SiC switching tube Q4, and reduce the positive and negative voltage spikes at the gate thereof; the specific process is as follows:

at the moment that the Q8 of the lower bridge arm is turned on, a parasitic capacitor Cgd _ H of the Q4 generates a downward induced current to pass through a resistor R2, a negative voltage difference is generated by the R2 to enable a triode S1 to be conducted, the induced current flows to a capacitor C1 from S1, and a positive voltage spike of a gate-source electrode of the Q4 is reduced;

at the moment that the Q8 of the lower bridge arm is turned off, the parasitic capacitor Cgd _ H of the Q4 generates an upward induced current which flows through the capacitor C1 and the body diode of the triode S1, and the negative voltage spike of the gate-source electrode of the Q4 is reduced;

the upper auxiliary circuit is used for carrying out voltage zero discharge on a gate-source capacitance Cgs _ H of Q4 when Q8 is turned off, and simultaneously shunting induced current generated by a gate-drain capacitance Cgd _ H of Q4 to reduce a negative voltage spike of a gate pole of the upper auxiliary circuit, wherein the partial auxiliary circuit formed by a diode D2 and a resistor R4 is used for reducing the negative voltage spike of the gate pole of the upper auxiliary circuit, and the specific process is as follows:

in a short time before Q8 of the lower bridge arm is turned off, the Si MOS tube Q3 is turned off, and the parasitic capacitance Cgs _ H of Q4 forms a loop through a diode D2 and a resistor R4 to carry out reverse discharge to 0V;

at the moment that the Q8 of the lower bridge arm is turned off, the parasitic capacitor Cgd _ H of the Q4 generates an upward induction current to flow through the diode D2 and the resistor R4, and the negative voltage spike of the gate-source electrode of the Q4 is reduced.

In addition, Q3 is turned on during the period when the gate-source capacitance Cgs _ H of Q4 needs to be precharged negatively and the upper bridge arm is operated, and is turned off when the gate-source capacitance Cgs _ H of Q4 needs to be discharged to zero.

In the same way, the working principle of each part in the lower bridge arm driving circuit is completely the same as that of the upper bridge arm driving circuit, and the two parts work complementarily.

The invention also discloses a control method based on the SiC power tube driving circuit with the active crosstalk suppression function, which is applied to upper and lower bridge arm power tubes of the same-arm branch and specifically comprises the following steps:

Specifically, the above circuits and methods are described in detail below with reference to a specific, complete embodiment:

as shown in fig. 1, an inductor L oad is a load inductor connected in parallel with an upper bridge arm, a power supply U5 provides bus voltage for a bridge arm circuit, and six MOS transistors Q1 to Q6 are controlled to be turned on by a logic control signal provided by a controller.

Fig. 2 shows waveforms of logic control signals of three MOS transistors Q5, Q6 and Q3 in a double pulse experiment. Q5 and Q6 in the lower bridge arm driving circuit are alternately turned on and used for controlling the on and off of Q8; q3 turns on to form a drive loop to reverse pre-charge the gate capacitance of the upper SiC switch Q4 immediately before Q5 turns on; q3 turns off the drive loop immediately before Q5 turns off, and the gate capacitance of the upper SiC switch Q4 discharges back through the auxiliary circuit, dropping the voltage to 0V. In this double pulse experiment, since the upper arm is set to be normally closed, Q1 is normally closed, and Q2 and Q7 are normally open.

A double pulse experiment was performed under the control of the logic signals as shown in fig. 2, and the flow directions of the driving current (solid arrow) and the bus current (dotted arrow) in the bridge arm circuit for each period are as shown in fig. 3.

At the time stage of t 0-t 1, the MOS transistors Q3 and Q6 are turned on, and Q5 is turned off. As shown in fig. 3(a), the lower arm is in a closed state, the upper arm driving circuit forms a loop, the power supply U2 reversely charges the auxiliary capacitor C1 and the gate capacitor of the upper arm SiC switching tube Q4, and after the charging is finished, the gate voltage of the Q4 is a negative voltage; as the SiC power switch is supposed to adopt a GS66508T type switch of SiC SYSTEMS company, the positive and negative rated voltage of a gate pole is +7V/-10V, and the negative voltage U2 is set to-3V more suitably;

in the time period from t1 to t2, the MOS transistor Q5 is turned on, the Q6 is turned off, and in order to maintain the gate capacitor of the Q4 at a negative voltage, the Q3 is still in a conducting state. As shown in fig. 3(b), at the moment that the lower bridge arm (i.e., the corresponding power tube, the same below) is turned on, the bus voltage Uds of the upper bridge arm Q4 rises, the power supply U5 charges the miller capacitance Cgd _ H and the source-drain capacitance Cds _ H of the Q4, the miller current forms a reverse voltage difference through the driving resistor R2 to turn on the PNP triode S1, and a low-impedance loop is formed in the driving circuit to shunt the miller current, so that a forward voltage spike of the Q4 gate is reduced; meanwhile, the voltage of the gate of the Q4 is reversely charged and pulled down to be negative in the last period of time, so that the risk of mistakenly opening the Q4 is further reduced; the lower bridge arm is conducted, the bus current forms a conducting loop through the load inductor and the Q8, and the load inductor enters a charging state;

in the time period from t2 to t3, the MOS transistor Q3 is closed, and the Q5 keeps the open state unchanged. As shown in fig. 3(c), the gate capacitor of the upper SiC switching transistor Q4 forms a loop through the diode D2 and the resistor R4 in the auxiliary circuit to perform reverse discharge to 0V, the lower arm is still in an open state, and the bus current flow is unchanged;

at the time stage t 3-t 4, the MOS transistor Q5 is turned off, and Q3 and Q6 are turned on, and as shown in fig. 3(d), at the moment when the lower arm is turned off, the bus voltage Uds of the upper arm Q4 decreases, and the miller capacitance Cgd _ H of Q4 discharges, thereby generating a reverse miller current. At the moment, a capacitor C1 in the auxiliary circuit and a body diode of the PNP triode are conducted to form a low-impedance loop to shunt the Miller current, so that the negative voltage spike of a Q4 gate pole is reduced; meanwhile, the gate voltage of the Q4 is pulled down to 0V in the reverse discharge in the last period, so that the risk of negative breakdown of Q4 is further reduced. It should be noted that the miller current in this period can also be shunted through D2 and resistor R4 in the auxiliary circuit, but the loop impedance is relatively large and negligible. After the lower bridge arm is closed, current in the inductor forms a loop through a body diode of the upper bridge arm SiC switch Q4 to carry out follow current;

after the miller capacitance of Q4 is discharged, the state of fig. 3(a) is entered, and the process is repeated.

In order to test the suppression effect of the driving circuit provided by the invention on the crosstalk of the SiC bridge arm, the crosstalk voltage spike of the upper bridge arm was measured in the subsequent double-pulse experiment, as shown in fig. 4 and 5.

Fig. 4(a) is a graph of gate voltage waveforms of the upper bridge arm and the lower bridge arm at the moment when the lower bridge arm is turned on in the same double-pulse experiment, where the upper curve is the gate voltage of the lower bridge arm and the lower curve is the gate voltage of the upper bridge arm. From the figure, it can be seen that at the moment of opening the lower bridge arm, the forward crosstalk peak voltage of the upper bridge arm is only-0.95V, which is below the opening voltage;

fig. 4(b) is a graph of gate voltage waveforms of the upper and lower two bridge arms at the moment when the lower bridge arm is turned off in the same double-pulse experiment, where the upper curve on the left side is the gate voltage of the lower bridge arm, and the lower curve is the gate voltage of the upper bridge arm. From the figure, it can be seen that at the moment of turning off the lower bridge arm, the negative crosstalk voltage of the upper bridge arm is-4.5V, which is far smaller than the negative breakdown voltage;

fig. 5(a) is a graph of voltage waveforms of gate electrodes of upper and lower bridge arms at the moment when the lower bridge arm is turned on in the same double-pulse experiment in the conventional negative voltage driving circuit, wherein the upper curve on the right side is the gate electrode voltage of the lower bridge arm, and the lower curve is the gate electrode voltage of the upper bridge arm. From the figure, it can be seen that at the moment of opening the lower bridge arm, the forward crosstalk peak voltage of the upper bridge arm of the circuit reaches 1.53V, and the risk of false opening exists;

fig. 5(b) is a graph of gate voltage waveforms of the upper and lower bridge arms at the moment when the lower bridge arm is turned off in the same double-pulse experiment in the conventional negative voltage driving circuit, wherein the upper curve on the left side is the gate voltage of the lower bridge arm, and the lower curve is the gate voltage of the upper bridge arm. It can be seen from the figure that at the moment of turning off the lower bridge arm, the negative crosstalk voltage of the upper bridge arm is-6.93V, which is within the safety range.

By comparing fig. 4 and fig. 5, it can be seen that the driving circuit proposed in the present embodiment has a significant crosstalk suppression effect compared to the conventional negative voltage driving circuit.

In addition, in order to test the influence of the driving circuit of the present embodiment on the speed of the power tube, the gate voltage of the lower arm SiC switching tube Q8 was measured in the subsequent double pulse experiment, as shown in fig. 6.

Fig. 6(a) is a waveform diagram of the gate voltage of the SiC switching tube Q8 of the lower bridge arm when it is turned on, and it can be seen that compared with the conventional negative voltage driving circuit (upper waveform), the driving circuit (lower waveform) proposed in this embodiment has little influence on the change of the turn-on speed of the SiC switching tube;

fig. 6(b) is a waveform diagram of the gate voltage of the lower arm SiC switching tube Q8 when it is turned off, and it can be seen that compared with the conventional negative voltage driving circuit (the middle section is close to the right waveform), the driving circuit (the middle section is close to the left waveform) proposed in this embodiment has a certain improvement in the turn-off speed of the switch, because when Q8 is turned off, the gate capacitor can accelerate the discharge through the PNP transistor S2 and the capacitor C2 in the auxiliary circuit, thereby improving the turn-off speed.

Further, in order to test the influence of the driving circuit provided by this embodiment on the SiC switching process loss, the bus current and the bus voltage of the lower arm SiC switching tube Q8 are measured in the subsequent double-pulse experiment, and instantaneous values of the two are multiplied to obtain a Q8 switching instantaneous loss power waveform diagram shown in fig. 7, and an integral of the waveform with respect to time (abscissa) is an energy loss value of the switch.

Fig. 7(a) is a waveform diagram of the switching instantaneous loss power at the moment when lower arm SiC switch Q8 is turned on. As can be seen from the figure, the integral of the two waveforms on the abscissa, that is, the area difference between the waveforms and the abscissa is not large, so that compared with the conventional negative voltage driving circuit (the waveform on the left), the driving circuit (the waveform on the right) proposed in this embodiment has little influence on the turn-on loss of the switch;

fig. 7(b) is a waveform diagram of the switching transient power loss at the moment when lower arm SiC switch Q8 is turned off. As can be seen from the figure, the area enclosed by the waveform with the smaller peak is significantly smaller than the waveform with the larger peak, so that compared with the conventional negative voltage driving circuit (large peak waveform), the driving circuit (small peak waveform) proposed in this embodiment can effectively reduce the turn-off loss of the switch.

The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above-mentioned embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the invention may be made by those skilled in the art without departing from the principle of the invention.

Claims

1. A SiC power tube driving circuit with an active crosstalk suppression function is characterized by comprising a basic driving loop and an auxiliary loop,

2. The SiC power tube driving circuit with the active crosstalk suppression function according to claim 1, wherein the amplifying circuit comprises a power supply U1, a power supply U2, MOS tubes Q1 and Q2, the anode of the power supply U1 is connected with the drain of the MOS tube Q1, the source of Q1 is connected with the drain of Q2, the source of Q2 is connected with the cathode of the power supply U2, the anode of the power supply U2 is connected with the cathode of the power supply U1, the connection point of the source of Q1 and the drain of Q2 is the positive output terminal of the amplifying circuit, and the anode of the power supply U2 is the negative output terminal of the amplifying circuit.

3. The SiC power tube driving circuit with active crosstalk suppression function according to claim 2, wherein Q1, Q2 and Q3 are all Si MOS tubes.

4. The SiC power tube driving circuit with active crosstalk suppression function according to claim 1, 2 or 3, wherein the transistor S1 is a PNP transistor.

5. The SiC power tube driving circuit with active crosstalk suppression function according to claim 1, 2 or 3, wherein the MOS tube Q3 is turned on when the gate-source capacitance Cgs _ H of the power tube needs to be precharged under negative voltage and during the operation of the power tube, and is turned off when the gate-source capacitance Cgs _ H of the power tube needs to be discharged under voltage.

6. A control method of the SiC power tube driving circuit with active crosstalk suppression function based on any one of claims 2-5 is applied to the upper and lower bridge arm power tubes of the same-arm branch, and is characterized in that,

in a period of time before the lower bridge arm power tube is closed, the MOS tube Q3 is closed, and the parasitic capacitance Cgs _ H of the upper bridge arm power tube forms a loop through the diode D2 and the resistor R4 to carry out reverse discharge to 0V;

7. The control method according to claim 6, characterized in that the upper bridge arm drive circuit comprises an upper primary drive loop and an upper auxiliary loop,

8. Control method according to claim 7, characterized in that the working cycle of the whole bridge arm is divided in sequence into time phases t 0-t 1, t 1-t 2, t 2-t 3, t 3-t 4, in particular,