CN111458623A - Semiconductor chip's testing arrangement - Google Patents
Semiconductor chip's testing arrangement Download PDFInfo
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- CN111458623A CN111458623A CN202010307229.5A CN202010307229A CN111458623A CN 111458623 A CN111458623 A CN 111458623A CN 202010307229 A CN202010307229 A CN 202010307229A CN 111458623 A CN111458623 A CN 111458623A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2874—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
- G01R31/2875—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature related to heating
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2862—Chambers or ovens; Tanks
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2863—Contacting devices, e.g. sockets, burn-in boards or mounting fixtures
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2879—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2881—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to environmental aspects other than temperature, e.g. humidity or vibrations
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- Engineering & Computer Science (AREA)
- Environmental & Geological Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention provides a testing device of a semiconductor chip, comprising: a case including an upper bottom plate, a lower bottom plate, and a plurality of side plates, which are made of a conductive material; the upper bottom plate is used for connecting a low-voltage power supply, and the lower bottom plate is used for connecting a high-voltage power supply; the chip positioning block is made of a conductive material and is in contact with the lower bottom plate, and a chip groove for accommodating a chip to be tested is arranged in the chip positioning block; the low-voltage copper column penetrates through the upper base plate and applies pressure to a chip to be tested in the chip positioning block through up-and-down movement relative to the upper base plate; the size of the lower bottom surface of the low-voltage copper column is matched with the size of a low-voltage electrode of the chip to be tested; and the fluid inlet and outlet are positioned on two opposite side plates and used for enabling the heated insulating fluid medium to flow into or out of the box body.
Description
Technical Field
The invention relates to the technical field of semiconductor testing, in particular to a testing device of a semiconductor chip.
Background
At present, the testing device used for testing the whole wafer or bare chip of the power semiconductor chip is a probe card, the bottom of the probe card adopts a vacuum adsorption system to position the chip, and the top of the probe card adopts a plurality of probes to contact with the electrodes of the chip to complete the electrical testing. The structure of the testing device is that the welding imitates the lead bonding and the chip welding in the module packaging structure, and the following defects exist in the testing process: 1) the pressure state of the chip cannot be simulated; 2) heating is carried out by adopting a heating plate or nitrogen purging, so that the temperature is unstable, and the chip is easily oxidized to cause failure; 3) when the chip dynamic test fails, the huge energy release is easy to ablate and damage the probe, so that the probe card fails, the test cost is high, and the batch test capability is not realized.
Disclosure of Invention
Therefore, the technical problem to be solved by the present invention is to overcome the above-mentioned defects of the chip testing apparatus in the prior art, so as to provide a chip testing apparatus which can simulate the chip compression state, can stably adjust the temperature, has high safety, and is suitable for batch testing.
To this end, the present invention provides a test apparatus for a semiconductor chip, comprising:
A case including an upper bottom plate, a lower bottom plate, and a plurality of side plates, which are made of a conductive material; the upper bottom plate is used for connecting a low-voltage power supply, and the lower bottom plate is used for connecting a high-voltage power supply;
The chip positioning block is made of a conductive material and is in contact with the lower bottom plate, and a chip groove for accommodating a chip to be tested is arranged in the chip positioning block;
The low-voltage copper column penetrates through the upper base plate and applies pressure to a chip to be tested in the chip positioning block through up-and-down movement relative to the upper base plate; the size of the lower bottom surface of the low-voltage copper column is matched with the size of a low-voltage electrode of the chip to be tested;
And the fluid inlet and outlet are positioned on two opposite side plates and used for enabling the heated insulating fluid medium to flow into or out of the box body.
Preferably, the chip positioning block has a protrusion extending downward for being inserted into the positioning groove of the lower base plate; the size of the chip groove is matched with that of the semiconductor chip.
Preferably, a pressure applying device is arranged above the upper bottom plate, the pressure applying device comprises a rotating member provided with a first tooth groove, and a rotating shaft of the rotating member is parallel to the upper bottom plate; and a second tooth groove matched with the first tooth groove is formed in the upper part of the low-voltage copper column, so that the low-voltage copper column is driven to move up and down when the rotating gear rotates.
Preferably, the rotating part is a screw rod, and two ends of the screw rod are respectively connected with nuts welded on the upper bottom plate; the screw rod is sleeved with a torque wrench for applying torque to the screw rod.
Preferably, still include with the grid test probe that the upper plate electricity communicates, grid test probe is including syringe needle and the needle tubing that contacts, the needle tubing cover is established outside the syringe needle, still include the spring in the needle tubing, work as the syringe needle is close to when the needle tubing motion the spring is compressed.
Preferably, the grid test probe is fixed in the groove on one side of the low-voltage copper column through an insulating tape and is insulated from the low-voltage copper column.
Preferably, the mounting position of the grid test probe is lower than that of the low-voltage copper pillar.
Preferably, the tank includes a plurality of tanks connected in series or in parallel through the fluid inlet.
Preferably, the device further comprises a heating device, a fluid pump and a flow control valve, wherein the heating device is used for heating the fluid medium, the fluid pump is used for pumping the heated fluid medium into the box body, and the flow control valve is used for controlling the flow of the fluid medium pumped into the box body.
Preferably, the upper bottom plate and the lower bottom plate of the box body are made of oxygen-free copper, the side plate of the box body, which is not provided with the fluid inlet and outlet, is made of transparent glass fiber reinforced plastic, and the rest part of the box body is made of PEEK or PPS.
Compared with the prior art, the invention has the following advantages:
(1) The testing device for the semiconductor chip provided by the invention has the capabilities of adjustable pressure, adjustable temperature and adjustable voltage and current, is small and exquisite in structure, strong in durability, convenient for series-parallel connection, and can realize batch testing of bare chips of the power semiconductor chip.
(2) The testing device of the semiconductor chip provided by the invention adopts an insulating heat-conducting fluid medium heating mode, heats the chip under the condition of isolating air and keeps constant temperature, thereby preventing the chip from oxidation failure; the insulation strength of the external environment is improved, and the test voltage grade is greatly improved; when the chip fails in testing and is violently exploded, the flowing medium can quickly take away the remains such as silicon slag and the like, so that the problems of overheating damage, pollution and the like of a local structure are prevented; the device sets up the access & exit, makes things convenient for the series-parallel connection of a plurality of devices, has improved the efficiency of multichip test.
(3) The testing device for the semiconductor chip provided by the invention adopts the gear mechanism for transmission, and converts the pressure monitoring into the torque measurement, so that the main testing loop is separated from the pressure monitoring loop, and the accuracy and the safety of the pressure monitoring are ensured.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a front view of a semiconductor chip test apparatus according to embodiment 1 of the present invention;
FIG. 2 is a rear view of the semiconductor chip testing apparatus in embodiment 1 of the present invention;
FIG. 3 is a schematic view showing the structure of the low-voltage side electrode of the triode type chip in embodiment 1 of the present invention;
Fig. 4A and 4B show a schematic structural diagram of an initial state and a schematic structural diagram of a compressed state of the gate test probe in embodiment 1 of the present invention, respectively.
FIG. 5 is a schematic view showing a structure in which a plurality of tanks are connected in series in embodiment 1 of the present invention;
Fig. 6 is a schematic structural view showing a plurality of tanks connected in series in embodiment 1 of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Example 1
Referring to fig. 1 and 2, a front view and a rear view of a testing apparatus for a semiconductor chip according to an embodiment of the present invention are shown, respectively. As shown in fig. 1 and 2, the testing apparatus for a semiconductor chip of the present embodiment includes a case 100, a chip positioning block 130, a low-pressure copper pillar 150, and a fluid inlet/outlet 180. Wherein:
The case 100 is a closed container, and may have a six-sided cubic shape. Wherein the upper bottom surface 110 and the lower bottom surface 120 are respectively used as a bottom voltage electrode and a high voltage electrode connected with external test equipment, and are made of good conductors with high conductivity such as oxygen-free copper. The front side and the back side (not shown) can be made of transparent insulating material, such as transparent glass fiber reinforced plastic, so that the position and the test state of the chip to be tested can be conveniently observed. Preferably, one of the side surfaces made of the glass fiber reinforced plastic material is provided with an openable structure, for example, the side surface is opened and closed outwards in a hinge or rotating shaft mode, so that the chip to be tested can be placed and taken out conveniently. Meanwhile, the side face of the openable structure can be provided with a sealing strip at the joint to keep the sealing performance in a closed state and prevent liquid flowing through the box body from seeping out. Since a high voltage is applied between the lower bottom surface 120 and the upper bottom surface 110 during the testing process, in order to prevent the influence of the leakage current in the case on the chip testing result, in the case of this embodiment, the high-temperature-resistant high-insulation material, such as PEEK, PPS, etc., may be selected for other portions of the case, except for the upper and lower bottom surfaces made of the conductive material and the front and rear side surfaces made of the transparent insulation material.
The chip positioning block 130 is made of a conductive material, and is used for carrying the chip 140 to be tested on one hand, and connecting the high-voltage electrode side of the chip 140 to be tested with the lower bottom surface 120 on the other hand, so as to apply a high voltage to the high-voltage electrode side of the chip 140 to be tested in the testing process. The chip positioning block 130 may be composed of an upper portion and a lower portion, the upper portion is a supporting portion, a chip groove is formed in the supporting portion and used for placing the chip 140 to be tested, and the size of the chip groove corresponds to the size of the chip 140 to be tested; below is an insert for insertion into a positioning slot in the bottom surface 120 in electrical communication with the bottom surface 120. The chip positioning block 130 is designed to be a structure consisting of a supporting portion and an inserting portion, so that accurate positioning is facilitated, the chip 140 to be tested can be ensured to be positioned at the central part of the box body 100 as long as the inserting portion is inserted into the positioning slot hole of the lower bottom surface 120, and pressure can be accurately applied to the position of the chip 140 to be tested when subsequent pressure testing is conveniently performed.
It should be noted that the chip positioning block 130 in this embodiment is suitable for two different chip types, i.e., a Diode chip and a triode chip (e.g., an IGBT chip and a MOSFET chip), and the sizes of the chip recesses are different accordingly. When the chips with different sizes and specifications need to be tested, the chip positioning block 130 matched with the chip specifications is replaced without changing the whole testing device, so that the universality of the whole testing device is stronger.
The low-voltage copper pillar 150 penetrates the upper plate 110, and applies pressure to the chip 140 to be tested located in the chip positioning block 130 by moving up and down with respect to the upper plate 110. It will be appreciated that the greater the downward displacement of the low-voltage copper pillar 150, the greater the pressure applied to the chip 140 under test. Wherein, the size of the lower bottom surface of the low-voltage copper pillar 150 is matched with the size of the low-voltage electrode of the chip 140 to be tested. The low-voltage copper pillar 150 can be driven by an external transmission mechanism to reciprocate up and down, and the embodiment does not limit the specific structure of the transmission mechanism, and any transmission mechanism capable of enabling the low-voltage copper pillar 150 to reciprocate up and down is within the protection scope of the present invention.
The fluid inlet and outlet 180 is located on two opposite side plates, such as a left side plate and a right side plate, in the case body 100 for the heated insulating fluid medium to flow into or out of the case body 100. The insulating fluid medium in this embodiment may include fluorine oil, transformer oil, and the like, and the insulating fluid medium is heated to a test temperature in advance by the heating device, and completely immerses the chip 140 to be tested when flowing through the case 100, so that the chip 140 to be tested is heated to a set temperature in a short time, and a temperature test of the chip 140 to be tested is realized.
Through the testing device of the semiconductor chip provided by the embodiment, the pressure test, the temperature test and the voltage and current test of the semiconductor chip can be realized at the same time. Furthermore, the temperature test of the invention is to heat the chip and keep constant temperature under the condition of isolating air, thus preventing the chip from oxidation failure, improving the insulation strength of the external environment and greatly reducing the test cost.
As described above, the low-voltage copper pillar 150 applies pressure to the chip 140 to be tested positioned in the chip positioning block 130 by moving up and down. In one example, the up and down movement of the low voltage copper pillar 150 may be achieved by the pressure applying device 170. The pressure applying means 170 includes a rotating member provided with a first spline, and the rotating member may be a rotating rod or a gear. In the example of fig. 1 and 2, the rotating member is a screw 172. At both ends of the screw 172, there are further included support nuts 171 welded to the upper base plate 110. The support nut 171 and the screw 172 are threadedly coupled such that the screw 172 is axially disposed parallel to the upper plate 110. The middle of the screw 172 is provided with a first tooth groove, which may be in a thread shape or a sawtooth shape, and the like, and this embodiment is not limited. The upper portion of the low voltage copper pillar 150 corresponding to the first tooth groove is provided with a second tooth groove matching with the first tooth groove, and the shape of the second tooth groove may be a thread shape or a sawtooth shape. The first tooth groove and the second tooth groove are clamped with each other, so that when the screw 172 rotates, the first tooth groove drives the second tooth groove to move, and the low-voltage copper column 150 generates upward or downward displacement.
Further, when the lead angle between the screw 172 and the support nut 171 is smaller than the equivalent friction angle of the screw pair, self-locking can be achieved through the screw thread. Therefore, when the static load and the working temperature are not changed greatly, the threaded connection cannot be automatically loosened, and the stability during pressure testing is ensured. This embodiment also allows for a rated torque to be applied to the screw 172 by means of a sleeve type torque wrench 173 that fits over the screw 172, thereby allowing for quantitative control of the applied pressure.
As shown in the foregoing, the testing device of the present invention is suitable for two different chip types, i.e., a Diode chip and a triode chip (i.e., an IGBT chip and a MOSFET chip). Wherein, the back of the bipolar chip is provided with 1 electrode as a high-voltage side, and the front of the bipolar chip is provided with 1 electrode as a low-voltage side; the back 1 electrode of the triode chip is the high-voltage side, and the front 2 electrodes are the low-voltage sides. Fig. 3 shows a schematic structure of the low-voltage side electrode of the triode chip 140. In which the front surface of the triode chip 140 includes two terminals, an emitter 141 and a gate 142, the emitter 141 can bear high pressure, and the gate 142 cannot bear large pressure, so that when the triode chip 140 is subjected to a pressure test, pressure is applied to the emitter 141 and the gate 142 in different ways. For example, a pressure is applied to emitter 141 by rigid pressure bonding, and a pressure is applied to gate 142 by elastic pressure bonding. In one example of the invention, pressure is applied by rigid crimping through the low voltage copper pillar 150 and by elastic crimping through the gate test probe 160.
Fig. 4A and 4B show a schematic structural diagram of an initial state and a schematic structural diagram of a compressed state of the gate test probe in embodiment 1 of the present invention, respectively. As shown in fig. 4, the gate test probe 160 includes a tip 161, a spring 162, and a needle 163. The needle head 161 and the needle tube 163 are made of oxygen-free copper with good conductivity, the surfaces of the needle head 161 and the needle tube 163 are plated with gold to reduce contact resistance, and the fit clearance between the needle head 161 and the needle tube 163 is moderate, so that the needle head 161 can slide freely in the needle tube 163, and good electrical connection can be guaranteed; the spring 162 is made of beryllium copper wire to provide a spring force for the grid test probe 160. Similar to the low voltage copper pillar 150, the gate test probe 160 may also penetrate the upper plate 110 and move up and down relative to the upper plate 110 under the action of the actuator to apply pressure.
Based on the positional relationship between the emitters 141 and the gates 142, gate test probes 160 may be disposed adjacent to the low-voltage copper pillars 150. In order to save space and simplify the structure, in this embodiment, the gate test probe 160 is fixed in the groove on one side of the low-voltage copper pillar 150 by an insulating tape, and the tail of the needle tube 163 is led out by welding a wire with an insulating sheath, so as to insulate the gate test probe 160 and the low-voltage copper pillar 150 from each other. Further, in order to ensure that the contact of each electrode is good during actual testing, the gate testing probe 160 needs to have a certain amount of compression, so that the lowest position of the gate testing probe 160 during installation is lower than the low-voltage copper pillar 150, for example, the needle 161 of the gate testing probe 160 extends downward 1-2 mm lower than the low-voltage copper pillar 150, so as to ensure that the gate testing probe 160 contacts the chip 140 under test before the low-voltage copper pillar 150.
Preferably, this embodiment may include a plurality of tanks connected in series or in parallel through the fluid inlet and outlet 180. Fig. 5 shows a schematic structural diagram of a plurality of tanks connected in series in embodiment 1 of the present invention, and fig. 6 shows a schematic structural diagram of a plurality of tanks connected in parallel in embodiment 1 of the present invention. In the example of fig. 5, the first tank and the second tank are connected in series through the fluid inlets and outlets 180 at both ends, and the connection between the two tanks can be realized by providing a snap on the fluid inlets and outlets 180. Thus, the heated insulating fluid sequentially flows through the first and second tanks to heat the chips 140 to be tested in the tanks, respectively. The mode that a plurality of boxes are connected in series simple structure, be convenient for control fluid flow, the shortcoming is that the insulating fluid that is heated can have the nuance when the temperature that flows through two boxes, consequently is applicable to the test object that is not particularly sensitive to temperature variation. In the example of fig. 6, the first tank and the second tank are connected in parallel. The heated insulating fluid can simultaneously flow through the first box body and the second box body, the heating temperature in the two box bodies can be ensured to be completely consistent, and the test device is suitable for test objects which are sensitive to temperature change. The parallel connection requires a higher capacity of the fluid pump and is more complicated in the piping of the fluid than the series connection.
Although fig. 5 and fig. 6 only show the schematic structural diagrams of two tanks connected in series and in parallel, those skilled in the art will understand that the present invention does not limit the number of tanks connected in series or in parallel, and any combination of a plurality of tanks connected in series and in parallel can be performed according to actual needs. Therefore, a plurality of chips can be tested simultaneously, and the efficiency of chip testing is improved.
As can be further seen from fig. 5 and 6, the present invention further comprises a heating device for heating the fluid medium, a fluid pump for pumping the heated fluid medium into the tank, and a flow control valve for controlling the flow of the fluid medium pumped into the tank. In the specific test process, the fluid pump provides power to drive the insulating heat transfer fluid to flow in the pipeline; the heating system heats the fluid to the temperature required by the test condition, and monitors the temperature of the fluid in the pipeline in real time; the flow control valve monitors the flow rate in the pipeline and adjusts the flow rate.
Through the mutual matching among the fluid pump, the heating device, the flow control valve and the box body, the invention can heat the chip and keep constant temperature under the condition of isolating air, thereby preventing the chip from being oxidized and invalid; when the chip fails in testing and is violently exploded, the flowing medium can quickly take away the remains such as silicon slag and the like, so that the problems of overheating damage, pollution and the like of a local structure are prevented, and the safety of chip testing is improved.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are intended to be within the scope of the invention.
Claims (10)
1. An apparatus for testing a semiconductor chip, comprising:
A case (100) including an upper base plate (110) made of a conductive material, a lower base plate (120), and a plurality of side plates made of an insulating material; the upper bottom plate (110) is used for connecting a low-voltage power supply, and the lower bottom plate (120) is used for connecting a high-voltage power supply;
The chip positioning block (130) is made of a conductive material and is in contact with the lower bottom plate (120), and a chip groove for accommodating a chip (140) to be tested is formed in the chip positioning block (130);
A low-voltage copper column (150) penetrating the upper base plate (110) and applying pressure to the chip (140) to be tested positioned in the chip positioning block (130) through up-and-down movement relative to the upper base plate (110); the size of the lower bottom surface of the low-voltage copper column (150) is matched with the size of a low-voltage electrode of the chip (140) to be tested;
And a fluid inlet and outlet (180) which is positioned on two opposite side plates and is used for the heated insulating fluid medium to flow into or out of the box body (100).
2. The testing device according to claim 1, wherein the chip positioning block (130) has a downwardly extending protrusion for being inserted into a positioning groove of the lower plate (120); the size of the chip groove is matched with that of the semiconductor chip.
3. The testing device according to claim 1, wherein a pressure applying device (170) is arranged above the upper base plate (110), the pressure applying device (170) comprises a rotating member (172) provided with a first tooth slot, and a rotating shaft of the rotating member (172) is parallel to the upper base plate (110); and a second tooth groove matched with the first tooth groove is formed in the upper part of the low-voltage copper column (150), so that the rotating gear drives the low-voltage copper column (150) to move up and down when rotating.
4. The testing device according to claim 3, wherein the rotating member (172) is a screw rod, and both ends of the screw rod are respectively connected with a nut (171) welded to the upper base plate (110); the screw is sleeved with a torque wrench (173) for applying torque to the screw.
5. The testing device of claim 1, further comprising a grid test probe (160) in electrical communication with the upper base plate (110), the grid test probe (160) comprising a needle (161) and a needle (163) in contact, the needle (163) being disposed outside the needle (161), the needle (163) further comprising a spring (162) therein, the spring (162) being compressed when the needle (161) moves closer to the needle (163).
6. The testing device according to claim 5, wherein the gate test probe (160) is fixed in a groove (151) on one side of the low-voltage copper pillar (150) by an insulating tape, and insulated from the low-voltage copper pillar (150).
7. The testing device according to claim 5 or 6, wherein the mounting position of the grid test probe (160) is lower than the mounting position of the low voltage copper pillar (150).
8. The testing device according to claim 1, wherein the tank (100) comprises a plurality of tanks connected in series or in parallel through the fluid inlet.
9. The testing device of claim 8, further comprising a heating device for heating the fluid medium, a fluid pump for pumping the heated fluid medium into the tank, and a flow control valve for controlling the flow of the fluid medium pumped into the tank.
10. The testing apparatus according to claim 1, wherein the material of the upper bottom plate (110) and the lower bottom plate (120) of the box body (100) is oxygen-free copper, the material of the side plate of the box body (100) where the fluid inlet and outlet (180) is not provided is transparent glass fiber reinforced plastic, and the material of the rest of the box body (100) is PEEK or PPS.
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| CN202010307229.5A CN111458623B (en) | 2020-04-17 | 2020-04-17 | Semiconductor chip's testing arrangement |
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| CN202010307229.5A CN111458623B (en) | 2020-04-17 | 2020-04-17 | Semiconductor chip's testing arrangement |
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| CN112329901A (en) * | 2020-10-21 | 2021-02-05 | 上海坤锐电子科技有限公司 | Label capable of being embedded into metal body |
Citations (11)
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