CN111370399A - Intelligent power module, preparation method and device - Google Patents

Intelligent power module, preparation method and device Download PDF

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Publication number
CN111370399A
CN111370399A CN201811590330.5A CN201811590330A CN111370399A CN 111370399 A CN111370399 A CN 111370399A CN 201811590330 A CN201811590330 A CN 201811590330A CN 111370399 A CN111370399 A CN 111370399A
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silicon
power module
insulated gate
gate bipolar
bipolar transistor
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CN201811590330.5A
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CN111370399B (en
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兰昊
冯宇翔
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Midea Group Co Ltd
Guangdong Midea White Goods Technology Innovation Center Co Ltd
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Midea Group Co Ltd
Guangdong Midea White Goods Technology Innovation Center Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8221—Three dimensional integrated circuits stacked in different levels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout
    • H01L27/0694—Integrated circuits having a three-dimensional layout comprising components formed on opposite sides of a semiconductor substrate

Abstract

The embodiment of the invention provides an intelligent power module, a preparation method and a device, wherein the intelligent power module comprises a drive IC, an insulated gate bipolar transistor IGBT and a fast recovery diode FRD; the driving IC, the IGBT and the FRD are manufactured on an SOI wafer; the SOI wafer comprises top layer silicon and lower layer silicon, and the top layer silicon and the lower layer silicon are isolated by a buried oxide layer; the driving IC is manufactured on the top layer silicon; the IGBT and the FRD are manufactured on the lower layer silicon. The embodiment of the invention solves the technical problem of larger IPM module size in the prior art, and has the beneficial effect of reducing the IPM module size.

Description

Intelligent power module, preparation method and device
Technical Field
The embodiment of the invention relates to the technical field of integrated circuits, in particular to an intelligent power module, a preparation method and a device.
Background
IPM (Intelligent Power Module) is an advanced Power switch device, and is essentially a Module integrating a Power device and a driving circuit chip thereof; the IPM plays an important role in the field of energy management, which is difficult to reach by other integrated circuits, and the device performance directly affects the utilization efficiency of an energy system.
Prior art IPM modules are usually packaged by a driver IC (integrated circuit), an IGBT (insulated gate bipolar transistor) and an FRD (fast recovery diode), and a part of a resistor-capacitor device. However, the driver IC, IGBT and FRD and the partial capacitive resistive device of the existing IPM are usually integrated on the surface of one or more insulating substrates.
However, the integrated layout of each device in the IPM module in the prior art needs a larger substrate, and the devices are connected by metal lines, which results in a larger IPM module size after packaging.
Disclosure of Invention
The embodiment of the invention provides an intelligent power module, a preparation method and a device, which are used for solving the technical problem that the IPM module in the prior art is large in size and have the beneficial effect of reducing the size of the IPM module.
According to a first aspect of embodiments of the present invention, there is provided an intelligent power module, including a driving integrated circuit, an insulated gate bipolar transistor, a fast recovery diode, and an SOI wafer:
the SOI wafer comprises top layer silicon and lower layer silicon;
the driving integrated circuit is made of top silicon;
the insulated gate bipolar transistor and the fast recovery diode are made of lower layer silicon.
Furthermore, the device also comprises various resistance-capacitance devices which are manufactured or arranged on the top layer silicon.
Further, the electrode of the driving integrated circuit is connected with the electrode of the insulated gate bipolar transistor.
Further, a buried oxide layer is arranged between the top layer silicon and the lower layer silicon for isolation; a through hole is formed in the buried oxide layer; and the electrode of the driving integrated circuit is connected with the electrode of the insulated gate bipolar transistor through the through hole.
Further, a buried oxide layer is arranged between the top layer silicon and the lower layer silicon for isolation; the grid and the cathode of the insulated gate bipolar transistor are positioned below the buried oxide layer; the anode of the insulated gate bipolar transistor is positioned at the bottom of the lower silicon layer.
According to a second aspect of the present invention, there is provided a method for manufacturing an intelligent power module, comprising:
manufacturing a driving IC of an intelligent power module on the top silicon of the target SOI wafer;
and manufacturing the IGBT and the FRD of the intelligent power module on the lower layer silicon of the target SOI wafer.
Further, still include: and manufacturing each capacitance-resistance device of the intelligent power module on the top silicon of the target SOI wafer.
Further, still include: a metal line is provided for connecting an electrode of the driver integrated circuit and an electrode of the insulated gate bipolar transistor.
Further, still include: manufacturing a through hole in the buried oxide layer; and arranging metal wires for connecting the electrodes of the driving integrated circuit and the electrodes of the insulated gate bipolar transistor based on the through holes.
Further, an insulated gate bipolar transistor of an intelligent power module is fabricated on the lower silicon of the target SOI wafer, comprising:
arranging a grid electrode and a cathode electrode of the insulated gate bipolar transistor below an oxide buried layer of the target SOI wafer; and arranging an anode of the insulated gate bipolar transistor at the bottom of the lower-layer silicon.
According to a third aspect of embodiments of the present invention there is provided an apparatus comprising a smart power module as defined in any one of the preceding claims.
The embodiment of the invention provides an intelligent power module, a preparation method and a device, wherein the intelligent power module comprises a driving integrated circuit, an insulated gate bipolar transistor, a fast recovery diode and an SOI wafer: the SOI wafer comprises top layer silicon and lower layer silicon; the driving integrated circuit is made of top silicon; the insulated gate bipolar transistor and the fast recovery diode are made of lower layer silicon. The embodiment of the invention solves the technical problem of larger IPM module size in the prior art, and has the beneficial effect of reducing the IPM module size.
Drawings
In order to illustrate the embodiments of the present invention or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic cross-sectional view of a prior art smart power module;
fig. 2 is a schematic cross-sectional view of an SOI wafer in an intelligent power module according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Ipm (intelligent Power module), i.e. the intelligent Power module, integrates the Power switch device and the driving circuit. And also has fault detection circuit integrated therein for over-voltage, over-current and over-heat, etc., and can send the detection signal to CPU. The high-speed low-power-consumption transistor consists of a high-speed low-power-consumption transistor core, an optimized gate driving circuit and a quick protection circuit. Even if a load accident or misuse occurs, it is possible to ensure that the IPM itself is not damaged. IPM generally uses an IGBT as a power switching element and an integrated structure in which a current sensor and a driver circuit are integrated. The IPM gains a bigger and bigger market due to high reliability and convenient use, is particularly suitable for a frequency converter of a driving motor and various inverter power supplies, and is an ideal power electronic device for variable frequency speed regulation, metallurgical machinery, electric traction, servo drive and variable frequency household appliances. For example, the power consumption of the air conditioner is about 60% of that of the household appliance, if the fixed-frequency air conditioner is completely replaced by the inverter air conditioner, the overall efficiency is improved by 30%, and the IPM is the core device of the inverter air conditioner.
A schematic cross-sectional view of a prior art smart power module is shown in fig. 1. The related art smart power module 100 has a structure including: a substrate 103; the circuit wiring 105 formed on an insulating layer 104 provided on the surface of the substrate 103; a solder resist layer 106 covering a specific position of the insulating layer 104 and the circuit wiring 105; an IGBT 109, an FRD 110, and an HVIC108 fixed on the circuit wiring 105 by a solder paste 107; a metal line 111 connecting the IGBT 109, the FRD 110, the HVIC108, and the circuit wiring 105; a lead 101 fixed to the circuit wiring 105 by a solder paste 107; at least one surface of the aluminum substrate 103 is sealed with a sealing resin 102. The prior art solutions have focused on distributing the electronic components on the same side of the same substrate. The layout among the drive IC, the IGBT and the FRD of the existing IPM and part of capacitance-resistance devices needs larger size and is connected through metal wires, so that the module size is larger after packaging.
In order to solve at least one of the above technical problems, an embodiment of the present invention provides an intelligent power module, where a driver IC is fabricated on a top silicon; the IGBT and the FRD are manufactured on the lower layer silicon. The embodiment of the invention solves the technical problem of larger IPM module size in the prior art, and has the beneficial effect of reducing the IPM module size.
The specific embodiment of the invention provides an intelligent power module, which comprises a drive IC, an insulated gate bipolar transistor IGBT, a fast recovery diode FRD and an SOI wafer; the SOI wafer comprises top layer silicon and lower layer silicon; the driving integrated circuit is made of top silicon; the insulated gate bipolar transistor and the fast recovery diode are made of lower layer silicon.
Among them, SOI is called Silicon-On-Insulator, i.e. Silicon On an insulating substrate, and this technique is to introduce a buried oxide layer between the top Silicon and the back substrate. The material has incomparable advantages compared with the bulk silicon by forming a semiconductor film on an insulator: the dielectric isolation of components in the integrated circuit can be realized, and the parasitic latch-up effect in the bulk silicon circuit is thoroughly eliminated; the integrated circuit made of the material also has the advantages of small parasitic capacitance, high integration density, high speed, simple process, small short channel effect, particular application to low-voltage and low-power consumption circuits and the like. SOI wafers are semiconductor crystalline materials used to effectively increase the current efficiency of the wafer.
The SOI wafer comprises top silicon and lower silicon which are separated by an insulating layer. According to the embodiment of the invention, the driving IC is manufactured on the top silicon layer and is isolated from the IGBT and the FRD by the oxide layer, the Latch Up effect does not exist, the switching speed is high, the power consumption is low, and the temperature tolerance is good.
Further, the IGBT and the FRD are manufactured on the lower layer silicon. In the prior art, most of the lower silicon layer of the SOI wafer is used for physically supporting each electronic component placed on the upper silicon layer, but in the embodiment, the IGBT and the FRD are fabricated on the lower silicon layer, so that compared with the prior art, the volume of the intelligent power module is effectively reduced.
On the basis of any of the above embodiments of the present invention, an intelligent power module is provided, which further includes capacitance and resistance devices, and each capacitance and resistance device is disposed or fabricated on the top layer silicon.
Each resistor-containing device is arranged on the top layer silicon and works in cooperation with the driving IC, interference with the IGBT and the FRD is avoided, and meanwhile the effect of reducing the size of the intelligent power module is also achieved.
On the basis of any of the above embodiments of the present invention, an intelligent power module is provided, in which an electrode of a driving integrated circuit is connected to an electrode of an insulated gate bipolar transistor.
The electrode of the driving integrated circuit on the top silicon of the SOI wafer is connected with the insulated gate bipolar transistor on the lower silicon of the SOI wafer, so that the signal transmission among the electronic elements is realized. The specific electrode connection mode is not particularly limited in the embodiments of the present invention.
On the basis of any one of the above embodiments of the present invention, there is provided an intelligent power module, wherein the top layer silicon and the lower layer silicon are separated by a buried oxide layer, and a through hole is formed in the buried oxide layer; and the electrode of the driving integrated circuit is connected with the electrode of the insulated gate bipolar transistor through the through hole.
The principle of SOI, in which a silicon transistor structure is on an insulator, is that an insulator material is added between two silicon layers, so that the parasitic capacitance between the two silicon layers is twice as small as that of the original one. The advantage is that it is easy to increase the clock and reduce the current leakage to become a power-saving IC. Some of the electrons that originally passed through the exchanger will dig into the silicon causing waste. SOI prevents electron loss. The embodiment of the invention adopts the buried oxide layer as the insulator substance, and can have the beneficial effect of better increasing the parasitic capacitance between the two silicon layers.
Wherein, the through hole is used for communicating the top layer silicon and the lower layer silicon.
Furthermore, the electrodes of the module driving IC are connected with the electrodes of the IGBT through the through holes without the traditional external metal wires, and the driving circuit is connected with the IGBT inside the wafer through the through holes, so that the size of the intelligent power module is further reduced.
On the basis of any one of the above embodiments of the present invention, an intelligent power module is provided, in which top silicon and lower silicon are separated by a buried oxide layer, and a gate and a cathode of an IGBT are located below the buried oxide layer; the anode of the IGBT is located at the bottom of the underlying silicon.
The principle of SOI, in which a silicon transistor structure is on an insulator, is that an insulator material is added between two silicon layers, so that the parasitic capacitance between the two silicon layers is twice as small as that of the original one. The advantage is that it is easy to increase the clock and reduce the current leakage to become a power-saving IC. Some of the electrons that originally passed through the exchanger will dig into the silicon causing waste. SOI prevents electron loss. The embodiment of the invention adopts the buried oxide layer as the insulator substance, and can have the beneficial effect of better increasing the parasitic capacitance between the two silicon layers.
On the basis of any one of the above embodiments of the present invention, a method for manufacturing an intelligent power module is provided, including: manufacturing a driving IC of an intelligent power module on the top silicon of the target SOI wafer; and manufacturing the IGBT and the FRD of the intelligent power module on the lower layer silicon of the target SOI wafer.
Wherein, the two manufacturing processes are not specially limited in sequence.
Among them, SOI is called Silicon-On-Insulator, i.e. Silicon On an insulating substrate, and this technique is to introduce a buried oxide layer between the top Silicon and the back substrate. The material has incomparable advantages compared with the bulk silicon by forming a semiconductor film on an insulator: the dielectric isolation of components in the integrated circuit can be realized, and the parasitic latch-up effect in the bulk silicon circuit is thoroughly eliminated; the integrated circuit made of the material also has the advantages of small parasitic capacitance, high integration density, high speed, simple process, small short channel effect, particular application to low-voltage and low-power consumption circuits and the like. SOI wafers are semiconductor crystalline materials used to effectively increase the current efficiency of the wafer.
The SOI wafer comprises top silicon and lower silicon which are separated by an insulating layer. According to the embodiment of the invention, the driving IC is manufactured on the top silicon layer, the IGBT and the FRD are isolated by the oxide layer, the Latch Up effect does not exist, the switching speed is high, the power consumption is low, and the temperature tolerance is good.
Further, the IGBT and the FRD are manufactured on the lower layer silicon. In the prior art, most of the lower silicon layer of the SOI wafer is used for physically supporting each electronic component placed on the upper silicon layer, but in the embodiment, the IGBT and the FRD are fabricated on the lower silicon layer, so that compared with the prior art, the volume of the intelligent power module is effectively reduced.
On the basis of any one of the above embodiments of the present invention, a method for manufacturing an intelligent power module is provided, which further includes: and manufacturing each capacitance-resistance device of the intelligent power module on the top silicon of the target SOI wafer.
The capacitor resistors are manufactured on the top layer silicon and work in cooperation with the driving IC, interference with the IGBT and the FRD is avoided, and meanwhile the effect of reducing the size of the intelligent power module is also achieved.
On the basis of any one of the above embodiments of the present invention, a method for manufacturing an intelligent power module is provided, which further includes: a metal line is provided for connecting an electrode of the driver integrated circuit and an electrode of the insulated gate bipolar transistor.
The electrode of the driving integrated circuit positioned on the top silicon of the SOI wafer is connected with the insulated gate bipolar transistor positioned on the lower silicon of the SOI wafer based on the metal wire, so that the signal transmission among all the electronic components is realized.
On the basis of any one of the above embodiments of the present invention, a method for manufacturing an intelligent power module is provided, which further includes: manufacturing a through hole in the buried oxide layer; and arranging metal wires for connecting the electrodes of the driving integrated circuit and the electrodes of the insulated gate bipolar transistor based on the through holes.
Wherein, make the through-hole that communicates top silicon and lower silicon in the buried oxide layer, the metal wire that sets up is crossed through the through-hole and is connected module driver IC and IGBT signal, need not traditional outside metal wire and connects, connects through the through-hole in wafer inside to the volume of intelligent power module has further been reduced.
On the basis of any one of the above embodiments of the present invention, there is provided a method for manufacturing an intelligent power module, in which an IGBT of the intelligent power module is manufactured on a lower layer silicon of a target SOI wafer, the method including: manufacturing a grid electrode and a cathode of the IGBT below the buried oxide layer; and manufacturing an anode of the IGBT on the bottom of the lower layer of silicon.
The following describes embodiments of the present invention with reference to the drawings.
Fig. 2 is a schematic cross-sectional view of an SOI wafer in an intelligent power module according to an embodiment of the present invention.
Referring to fig. 2, the device of the present invention includes a driving IC, an IGBT, an FRD, and various resistance devices, and employs an SOI wafer.
The driving IC and the resistance-containing device are manufactured on the top silicon A201 of the SOI wafer.
The IGBT and FRD are fabricated on the underlying silicon A203.
The top layer silicon A201 and the lower layer silicon A203 are separated by a buried oxide layer A202.
The electrodes of the electronic elements on the top layer silicon A201 and the lower layer silicon A203 can be connected by a through hole process: the buried oxide layer a202 is provided with a via a205 to communicate the top layer silicon a201 and the lower layer silicon a 203.
The anode of the IGBT may be fabricated on the SOI wafer substrate bottom a 204.
According to the intelligent power module provided by the embodiment of the invention, the electronic elements such as the driving IC, the IGBT, the FRD and the resistance-capacitance device are integrated on the same SOI wafer, and the electronic elements are not connected by metal wires, so that the overall size of the intelligent power module is reduced, and higher integration level is realized. It is suitable to further integrate more complex functions, such as integration. The drive IC in the intelligent power module provided by the embodiment of the invention is isolated from the IGBT and the FRD through the buried oxide layer, so that higher driving capability and high switching speed can be realized, meanwhile, the power module has low power consumption, the Latch Up effect of the drive IC in the existing intelligent power module is eliminated, and the temperature tolerance is better.
On the basis of any one of the above embodiments of the present invention, a method for manufacturing an intelligent power module is provided, where the method includes the following steps: and manufacturing a driving IC, an IGBT, an FRD and a resistance-capacitance device of the intelligent power module on the same SOI wafer.
In this embodiment, the driving IC is fabricated on the top silicon of the SOI by using a fully depleted MOSFET process. The MOSFETs are isolated by the oxide layer, so that a Latch Up effect does not exist, the switching speed is high, the power consumption is low, and the temperature tolerance is good. The driving signal transmitted from the driving IC to the IGBT may be connected to the IGBT gate of the substrate via the via hole.
The resistor-containing device is manufactured on the top silicon of the SOI according to the requirement, and the manufacturing steps are compatible with the step process for manufacturing the driving IC.
The IGBT and the FRD are manufactured on a substrate of the SOI, namely the lower layer silicon. And the grid and the cathode of the IGBT are both positioned below the buried oxide layer and are led out from the through hole, and the anode of the IGBT is positioned at the bottom of the substrate. The FRD is manufactured and integrated in the IGBT or designed and manufactured with reference to the electrode of the IGBT.
The intelligent power module of the embodiment is manufactured by adopting an SOI wafer, and all electronic element modules are connected without traditional metal wires and are connected through holes in the wafer. The integrated circuit has the advantages of being high in integration level, reducing the size of an intelligent power module, improving the driving capability of a driving IC, improving the switching speed, reducing the power consumption, eliminating the Latch Up effect, being better in temperature tolerance and the like.
On the basis of any one of the above embodiments of the present invention, an apparatus is provided, which includes any one of the above intelligent power modules.
As one of the important high-power main stream devices of power electronics, IPM has been widely applied in the fields of household appliances, transportation, power engineering, renewable energy sources, smart grid, and the like. In industrial applications such as traffic control, power conversion, industrial motors, uninterruptible power supplies, wind and solar installations, and frequency converters for automatic control. In consumer electronics, IPM is used for home appliances, cameras, and mobile phones. The type of the apparatus according to the embodiment of the present invention is not particularly limited, and any apparatus that is applicable to IPM is considered to be the apparatus according to the embodiment of the present invention.
According to the intelligent power module provided by the embodiment of the invention, the driving IC is manufactured on the top layer silicon; the IGBT and the FRD are manufactured on the lower layer silicon. The embodiment of the invention solves the technical problem of larger IPM module size in the prior art, and has the beneficial effect of reducing the IPM module size.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (11)

1. An intelligent power module, comprising a driver integrated circuit, an insulated gate bipolar transistor, a fast recovery diode, and an SOI wafer:
the SOI wafer comprises top layer silicon and lower layer silicon;
the driving integrated circuit is made of top silicon;
the insulated gate bipolar transistor and the fast recovery diode are made of lower layer silicon.
2. The intelligent power module of claim 1, further comprising resistive devices fabricated or disposed on the top layer of silicon.
3. The smart power module of claim 1 wherein the electrodes of the driver integrated circuit and the electrodes of the insulated gate bipolar transistors are connected.
4. The smart power module of claim 2 wherein a buried oxide layer is disposed between the top layer silicon and the lower layer silicon for isolation; a through hole is formed in the buried oxide layer;
and the electrode of the driving integrated circuit is connected with the electrode of the insulated gate bipolar transistor through the through hole.
5. The smart power module of claim 2 wherein a buried oxide layer is disposed between the top layer silicon and the lower layer silicon for isolation; the grid and the cathode of the insulated gate bipolar transistor are positioned below the buried oxide layer; the anode of the insulated gate bipolar transistor is positioned at the bottom of the lower silicon layer.
6. A method for manufacturing an intelligent power module, comprising:
manufacturing a driving integrated circuit of an intelligent power module on the top silicon of the target SOI wafer;
and manufacturing an insulated gate bipolar transistor and a fast recovery diode of the intelligent power module on the lower layer silicon of the target SOI wafer.
7. The method of claim 6, further comprising: and manufacturing each capacitance-resistance device of the intelligent power module on the top silicon of the target SOI wafer.
8. The method of claim 6, further comprising: a metal line is provided for connecting an electrode of the driver integrated circuit and an electrode of the insulated gate bipolar transistor.
9. The method of claim 6, further comprising: manufacturing a through hole in the buried oxide layer; and arranging metal wires for connecting the electrodes of the driving integrated circuit and the electrodes of the insulated gate bipolar transistor based on the through holes.
10. The method of claim 6, wherein fabricating an insulated gate bipolar transistor of a smart power module on underlying silicon of a target SOI wafer comprises:
arranging a grid electrode and a cathode electrode of the insulated gate bipolar transistor below an oxide buried layer of the target SOI wafer; and arranging an anode of the insulated gate bipolar transistor at the bottom of the lower-layer silicon.
11. An apparatus comprising the smart power module of any one of claims 1-5.
CN201811590330.5A 2018-12-25 2018-12-25 Intelligent power module, preparation method and device Active CN111370399B (en)

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Citations (6)

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