CN111370399B - Intelligent power module, preparation method and device - Google Patents

Intelligent power module, preparation method and device Download PDF

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Publication number
CN111370399B
CN111370399B CN201811590330.5A CN201811590330A CN111370399B CN 111370399 B CN111370399 B CN 111370399B CN 201811590330 A CN201811590330 A CN 201811590330A CN 111370399 B CN111370399 B CN 111370399B
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silicon
power module
intelligent power
bipolar transistor
insulated gate
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CN111370399A (en
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兰昊
冯宇翔
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Midea Group Co Ltd
Guangdong Midea White Goods Technology Innovation Center Co Ltd
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Midea Group Co Ltd
Guangdong Midea White Goods Technology Innovation Center Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8221Three dimensional integrated circuits stacked in different levels
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688Integrated circuits having a three-dimensional layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688Integrated circuits having a three-dimensional layout
    • H01L27/0694Integrated circuits having a three-dimensional layout comprising components formed on opposite sides of a semiconductor substrate

Abstract

The embodiment of the invention provides an intelligent power module, a preparation method and a device, wherein the intelligent power module comprises a drive IC, an insulated gate bipolar transistor IGBT and a fast recovery diode FRD; the driver IC, IGBT, FRD is fabricated on an SOI wafer; the SOI wafer comprises top layer silicon and lower layer silicon, which are isolated by an oxygen burying layer; the driving IC is manufactured on the top silicon layer; the IGBT and FRD are fabricated on the underlying silicon. The embodiment of the invention solves the technical problem of larger size of the IPM module in the prior art, and has the beneficial effect of reducing the volume of the IPM module.

Description

Intelligent power module, preparation method and device
Technical Field
The embodiment of the invention relates to the technical field of integrated circuits, in particular to an intelligent power module, a preparation method and a device.
Background
IPM (intelligent power module ) is an advanced power switching device, essentially a module integrated with a power device and its driving circuit chip; IPM plays an important role in the field of energy management, which is difficult to reach by other integrated circuits, and device performance directly affects the utilization efficiency of an energy system.
IPM modules in the prior art are typically packaged with driver ICs (driver integrated circuits), IGBTs (insulated gate bipolar transistors) and FRDs (fast recovery diodes). However, the driving ICs, IGBTs, and FRDs of the existing IPMs are typically integrated with a portion of the resistive devices on the surface of one or more insulating substrates.
However, the integrated layout of each device in the IPM module in the prior art needs a larger-sized substrate, and the IPM module is larger after being packaged by connecting the devices through metal wires.
Disclosure of Invention
The embodiment of the invention provides an intelligent power module, a preparation method and a device, which are used for solving the technical problem of larger size of an IPM module in the prior art and have the beneficial effect of reducing the volume of the IPM module.
According to a first aspect of an embodiment of the present invention, there is provided an intelligent power module including a driver integrated circuit, an insulated gate bipolar transistor, a fast recovery diode, and an SOI wafer:
the SOI wafer comprises top layer silicon and lower layer silicon;
the driving integrated circuit is made of top silicon;
the insulated gate bipolar transistor and the fast recovery diode are manufactured by using lower silicon.
Further, each resistance-capacitance device is manufactured or arranged on the top silicon layer.
Further, an electrode of the driving integrated circuit is connected to an electrode of the insulated gate bipolar transistor.
Further, a buried oxide layer is arranged between the top layer silicon and the lower layer silicon for isolation; a through hole is arranged in the buried oxide layer; the electrodes of the driving integrated circuit are connected with the electrodes of the insulated gate bipolar transistor through the through holes.
Further, a buried oxide layer is arranged between the top layer silicon and the lower layer silicon for isolation; the grid electrode and the cathode of the insulated gate bipolar transistor are positioned below the buried oxide layer; the anode of the insulated gate bipolar transistor is positioned at the bottom of the underlying silicon.
According to a second aspect of the present invention, there is provided a method for manufacturing an intelligent power module, comprising:
manufacturing a drive IC of the intelligent power module on top silicon of the target SOI wafer;
and manufacturing IGBT and FRD of the intelligent power module on the lower silicon of the target SOI wafer.
Further, the method further comprises the following steps: and manufacturing all capacitance resistance devices of the intelligent power module on the top silicon of the target SOI wafer.
Further, the method further comprises the following steps: metal lines are provided which connect electrodes of the driving integrated circuit and electrodes of the insulated gate bipolar transistor.
Further, the method further comprises the following steps: making a through hole in the buried oxide layer; metal lines for connecting electrodes of the driving integrated circuit and electrodes of the insulated gate bipolar transistor are provided based on the via holes.
Further, fabricating an insulated gate bipolar transistor of the intelligent power module on the underlying silicon of the target SOI wafer, comprising:
setting the grid electrode and the cathode of the insulated gate bipolar transistor below the buried oxide layer of the target SOI wafer; the anode of the insulated gate bipolar transistor is arranged at the bottom of the lower silicon layer.
According to a third aspect of embodiments of the present invention, there is provided an apparatus comprising an intelligent power module as described in any of the above.
The embodiment of the invention provides an intelligent power module, a preparation method and a device, wherein the intelligent power module comprises a driving integrated circuit, an insulated gate bipolar transistor, a fast recovery diode and an SOI wafer: the SOI wafer comprises top layer silicon and lower layer silicon; the driving integrated circuit is made of top silicon; the insulated gate bipolar transistor and the fast recovery diode are manufactured by using lower silicon. The embodiment of the invention solves the technical problem of larger size of the IPM module in the prior art, and has the beneficial effect of reducing the volume of the IPM module.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the prior art, a brief description of the drawings is provided below, in which the description of the embodiments or the prior art is intended, it will be apparent that the drawings in the following description are some embodiments of the present invention and that other drawings may be obtained from these drawings without inventive effort to a person of ordinary skill in the art.
FIG. 1 is a schematic cross-sectional view of a prior art smart power module;
fig. 2 is a schematic cross-sectional structure of an SOI wafer in an intelligent power module according to an embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
IPM (Intelligent Power Module), i.e. the intelligent power module, not only integrates the power switching devices and the driving circuit. And fault detection circuits such as overvoltage, overcurrent, overheat and the like are integrated inside the CPU, and detection signals can be sent to the CPU. The high-speed low-power-consumption semiconductor device is composed of a high-speed low-power-consumption die, an optimized gate electrode driving circuit and a rapid protection circuit. Even if a load accident or improper use occurs, the IPM itself can be ensured not to be damaged. IPM generally uses IGBTs as power switching elements, and integrates an integrated structure of a current sensor and a driving circuit therein. The IPM has high reliability, is convenient to use, wins an increasingly large market, is particularly suitable for a frequency converter of a driving motor and various inverter power supplies, and is an ideal power electronic device for frequency conversion speed regulation, metallurgical machinery, electric traction, servo driving and frequency conversion household appliances. For example, the power consumption of the air conditioner is about 60% of the power consumption of the household appliance, if the fixed-frequency air conditioner is replaced by the variable-frequency air conditioner, the overall efficiency is improved by 30%, and the IPM is a core device of the variable-frequency air conditioner.
A schematic cross-sectional view of a prior art smart power module is shown in fig. 1. The related art smart power module 100 has a structure including: a substrate 103; the circuit wiring 105 formed on the insulating layer 104 provided on the surface of the substrate 103; a solder resist layer 106 covering a specific position of the insulating layer 104 and the circuit wiring 105; an IGBT 109, an FRD 110, and an HVIC 108 fixed on the circuit wiring 105 by solder paste 107; a metal line 111 connecting the IGBT 109, FRD 110, HVIC 108, and the circuit wiring 105; pins 101 fixed on the circuit wiring 105 by solder paste 107; at least one surface of the aluminum substrate 103 is sealed with a sealing resin 102. The prior art solutions focus on distributing electronic components on the same side of the same substrate. The layout of the driving IC, IGBT and FRD and part of the capacitance resistance devices of the existing IPM needs a larger size, and the module size is larger after packaging due to the connection of metal wires.
In order to solve at least one of the above-mentioned technical problems, an embodiment of the present invention provides an intelligent power module, in which a driving IC is fabricated on top silicon; the IGBT and FRD are fabricated on the underlying silicon. The embodiment of the invention solves the technical problem of larger size of the IPM module in the prior art, and has the beneficial effect of reducing the volume of the IPM module.
The embodiment of the invention provides an intelligent power module, which comprises a drive IC, an insulated gate bipolar transistor IGBT, a fast recovery diode FRD and an SOI wafer; the SOI wafer comprises top layer silicon and lower layer silicon; the driving integrated circuit is made of top silicon; the insulated gate bipolar transistor and the fast recovery diode are manufactured by using lower silicon.
Among them, SOI is known as Silicon-On-Insulator, i.e., silicon On an insulating substrate, by introducing a buried oxide layer between the top Silicon layer and the bottom of the backing. Material by forming a semiconductor film on an insulator, SOI materials have advantages that are incomparable to bulk silicon: the dielectric isolation of components in the integrated circuit can be realized, and the parasitic latch-up effect in the bulk silicon circuit is thoroughly eliminated; the integrated circuit made of the material has the advantages of small parasitic capacitance, high integration density, high speed, simple process, small short channel effect, particular suitability for low-voltage and low-power consumption circuits and the like. SOI wafers are semiconductor crystalline materials that are used to effectively increase the current efficiency of the wafer.
The SOI wafer comprises a top layer of silicon and a lower layer of silicon, which are isolated by an insulating layer. According to the embodiment of the invention, the drive IC is manufactured on the top silicon and isolated from the IGBT and the FRD by the oxide layer, so that the Latch Up effect does not exist, the switching speed is high, the power consumption is low, and the temperature resistance is good.
Further, the IGBT and FRD are fabricated on the underlying silicon. In the prior art, the lower silicon layer of the SOI wafer is mainly used for physically supporting each electronic element arranged on the upper silicon layer, but the IGBT and the FRD are manufactured on the lower silicon layer, so that compared with the prior art, the volume of the intelligent power module is effectively reduced.
On the basis of any one of the above embodiments of the present invention, an intelligent power module is provided, which further includes each resistance-capacitance device, where each resistance-capacitance device is disposed or fabricated on the top silicon layer.
Wherein, each holds the resistive device and places on the top layer silicon, works with driving IC cooperation, avoids producing the interference with IGBT and FRD, has also played the effect that reduces intelligent power module volume simultaneously.
On the basis of any one of the specific embodiments of the present invention, an intelligent power module is provided, wherein electrodes of a driving integrated circuit are connected with electrodes of an insulated gate bipolar transistor.
The electrodes of the driving integrated circuit on the SOI wafer top layer silicon are connected with the insulated gate bipolar transistor arranged on the SOI wafer lower layer silicon to realize signal transmission among the electronic elements. Specific electrode connection modes the embodiment of the present invention is not particularly limited.
On the basis of any one of the specific embodiments of the present invention, an intelligent power module is provided, wherein the top silicon layer and the lower silicon layer are isolated by a buried oxide layer, and a through hole is arranged in the buried oxide layer; the electrodes of the driving integrated circuit are connected with the electrodes of the insulated gate bipolar transistor through the through holes.
SOI is the meaning of a silicon transistor structure over an insulator, the principle being that the addition of an insulator material between two silicon layers can double the parasitic capacitance between the two layers as compared to the original. The advantage is that the clock can be easily raised, and the current leakage is reduced to become a power-saving IC. Some electrons that would have passed through the exchanger would have been drilled into the silicon and wasted. SOI prevents electron loss. The embodiment of the invention adopts the buried oxide layer as an insulator substance, and has the beneficial effect of better increasing the parasitic capacitance between the two silicon layers.
Wherein the through holes are used for communicating the top layer silicon and the lower layer silicon.
Furthermore, the electrodes of the module driving IC are connected with the electrodes of the IGBT through the through holes without the need of traditional external metal wires, and the driving circuit is connected with the IGBT in the wafer through the through holes, so that the volume of the intelligent power module is further reduced.
On the basis of any one of the specific embodiments of the present invention, an intelligent power module is provided, wherein the top silicon layer and the lower silicon layer are isolated by a buried oxide layer, and the gate electrode and the cathode electrode of the IGBT are positioned below the buried oxide layer; the anode of the IGBT is located at the bottom of the underlying silicon.
SOI is the meaning of a silicon transistor structure over an insulator, the principle being that the addition of an insulator material between two silicon layers can double the parasitic capacitance between the two layers as compared to the original. The advantage is that the clock can be easily raised, and the current leakage is reduced to become a power-saving IC. Some electrons that would have passed through the exchanger would have been drilled into the silicon and wasted. SOI prevents electron loss. The embodiment of the invention adopts the buried oxide layer as an insulator substance, and has the beneficial effect of better increasing the parasitic capacitance between the two silicon layers.
On the basis of any one of the specific embodiments of the present invention, a method for manufacturing an intelligent power module is provided, including: manufacturing a drive IC of the intelligent power module on top silicon of the target SOI wafer; and manufacturing IGBT and FRD of the intelligent power module on the lower silicon of the target SOI wafer.
The two manufacturing processes are not particularly limited in sequence.
Among them, SOI is known as Silicon-On-Insulator, i.e., silicon On an insulating substrate, by introducing a buried oxide layer between the top Silicon layer and the bottom of the backing. Material by forming a semiconductor film on an insulator, SOI materials have advantages that are incomparable to bulk silicon: the dielectric isolation of components in the integrated circuit can be realized, and the parasitic latch-up effect in the bulk silicon circuit is thoroughly eliminated; the integrated circuit made of the material has the advantages of small parasitic capacitance, high integration density, high speed, simple process, small short channel effect, particular suitability for low-voltage and low-power consumption circuits and the like. SOI wafers are semiconductor crystalline materials that are used to effectively increase the current efficiency of the wafer.
The SOI wafer comprises a top layer of silicon and a lower layer of silicon, which are isolated by an insulating layer. According to the embodiment of the invention, the drive IC is manufactured on the top silicon, the IGBT and the FRD are isolated by the oxide layer, the Latch Up effect does not exist, the switching speed is high, the power consumption is low, and the temperature resistance is good.
Further, the IGBT and FRD are fabricated on the underlying silicon. In the prior art, the lower silicon layer of the SOI wafer is mainly used for physically supporting each electronic element arranged on the upper silicon layer, but the IGBT and the FRD are manufactured on the lower silicon layer, so that compared with the prior art, the volume of the intelligent power module is effectively reduced.
On the basis of any one of the above specific embodiments of the present invention, a method for manufacturing an intelligent power module is provided, further including: and manufacturing all capacitance resistance devices of the intelligent power module on the top silicon of the target SOI wafer.
Each resistance-capacitance device is manufactured on the top silicon layer and is matched with the driving IC to work, interference with IGBT and FRD is avoided, and meanwhile the effect of reducing the volume of the intelligent power module is also achieved.
On the basis of any one of the above specific embodiments of the present invention, a method for manufacturing an intelligent power module is provided, further including: metal lines are provided which connect electrodes of the driving integrated circuit and electrodes of the insulated gate bipolar transistor.
The electrode of the driving integrated circuit on the silicon of the SOI wafer top layer is connected with the insulated gate bipolar transistor arranged on the silicon of the lower layer of the SOI wafer based on the metal wire, so that signal transmission among the electronic elements is realized.
On the basis of any one of the above specific embodiments of the present invention, a method for manufacturing an intelligent power module is provided, further including: making a through hole in the buried oxide layer; metal lines for connecting electrodes of the driving integrated circuit and electrodes of the insulated gate bipolar transistor are provided based on the via holes.
Wherein, the through-hole of preparation intercommunication top layer silicon and lower floor's silicon in the buried oxide layer, the metal wire that sets up is crossed module drive IC and IGBT signal connection through the through-hole, need not traditional outside metal wire and is connected through the through-hole in the inside of wafer to intelligent power module's volume has still further been reduced.
On the basis of any one of the above embodiments of the present invention, a method for manufacturing an intelligent power module is provided, in which an IGBT of the intelligent power module is manufactured on a lower silicon layer of a target SOI wafer, including: manufacturing a grid electrode and a cathode of the IGBT below the buried oxide layer; and manufacturing an anode of the IGBT at the bottom of the lower silicon layer.
The following describes specific embodiments of the present invention with reference to the drawings.
Fig. 2 is a schematic cross-sectional structure of an SOI wafer in an intelligent power module according to an embodiment of the present invention.
Referring to fig. 2, the device of the present invention includes a driver IC, IGBT, FRD and various resistive devices, using an SOI wafer.
The driver ICs and the resistive devices are fabricated on the top silicon a201 of the SOI wafer.
The IGBT and FRD are fabricated on the underlying silicon a203.
The top layer silicon A201 and the lower layer silicon A203 are isolated by a buried oxide A202.
The connection between the electrodes of each electronic component on the top silicon a201 and the lower silicon a203 can be performed by a through hole process: the buried oxide layer a202 is provided with a through hole a205 to communicate the top layer silicon a201 and the lower layer silicon a203.
The anode of the IGBT may be fabricated on the SOI wafer substrate bottom a204.
According to the intelligent power module provided by the embodiment of the invention, the electronic elements such as the driver IC, IGBT, FRD and the capacitance resistor device are integrated on the same SOI wafer, and the electronic elements do not need to be connected by metal wires, so that the overall size of the intelligent power module is reduced, and higher integration level is realized. Suitable for further integration of more complex functions, such as integration. The drive IC in the intelligent power module of the embodiment of the invention can realize higher driving capability and high switching speed because of isolation with the IGBT and the FRD through the buried oxide layer, has low power consumption, eliminates the Latch Up effect of the drive IC in the existing intelligent power module, and has better temperature resistance.
On the basis of any one of the specific embodiments of the present invention, a method for manufacturing an intelligent power module is provided, the method comprising the following steps: the driver IC, IGBT, FRD and the resistive devices of the smart power module are fabricated on the same SOI wafer.
In this embodiment, the driving IC is fabricated on the top silicon of the SOI by using a fully depleted MOSFET process. The MOSFETs are isolated by the oxide layer, the Latch Up effect does not exist, the switching speed is high, the power consumption is low, and the temperature resistance is good. The drive signal sent from the drive IC to the IGBT may be connected to the IGBT gate of the substrate via the via hole.
The capacitance resistance device is manufactured on the top silicon of the SOI according to the requirement, and the manufacturing steps are compatible with the step process of manufacturing the drive IC.
The IGBT and FRD are fabricated on a substrate of SOI, i.e. underlying silicon. The grid electrode and the cathode of the IGBT are both positioned below the buried oxide layer and led out from the through hole, and the anode of the IGBT is positioned at the bottom of the substrate. The FRD fabrication is integrated into the IGBT, or the electrode design fabrication of the reference IGBT.
The intelligent power module of the embodiment is manufactured by adopting an SOI wafer, and all the electronic element modules are connected through holes in the wafer without the need of traditional metal wire connection. The intelligent power module has the beneficial effects of high integration level, reduced intelligent power module volume, improved driving IC driving capability, improved switching speed, reduced power consumption, elimination of Latch Up effect, better temperature resistance and the like.
On the basis of any one of the embodiments of the present invention, an apparatus is provided, including any one of the intelligent power modules described above.
As one of important high-power mainstream devices of power electronics, IPM has been widely used in fields of home appliances, transportation, power engineering, renewable energy sources, smart grids, and the like. In industrial applications, such as traffic control, power conversion, industrial motors, uninterruptible power supplies, wind and solar power plants, and frequency converters for automatic control. In consumer electronics, IPM is used for home appliances, cameras and cell phones. The type of the device according to the embodiment of the present invention is not particularly limited, and any device that is applicable to IPM is considered as the device according to the embodiment of the present invention.
The intelligent power module provided by the embodiment of the invention is characterized in that a driving IC is manufactured on top silicon; the IGBT and FRD are fabricated on the underlying silicon. The embodiment of the invention solves the technical problem of larger size of the IPM module in the prior art, and has the beneficial effect of reducing the volume of the IPM module.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims (4)

1. The intelligent power module is characterized by comprising a driving integrated circuit, an insulated gate bipolar transistor, a fast recovery diode, an SOI wafer and various capacitance-resistance devices:
the SOI wafer comprises top silicon and lower silicon, and a buried oxide layer is arranged between the top silicon and the lower silicon for isolation; a through hole is arranged in the buried oxide layer;
the driving integrated circuit is made of top silicon;
the insulated gate bipolar transistor and the fast recovery diode are manufactured by using lower silicon; electrodes of the driving integrated circuit are connected with electrodes of the insulated gate bipolar transistor through the through holes; the anode of the insulated gate bipolar transistor is manufactured by using the bottom of the SOI wafer substrate.
Each capacitance resistance device is manufactured or arranged on the top silicon and is used for being matched with the driving integrated circuit.
2. The intelligent power module according to claim 1, wherein a buried oxide layer is provided between the top silicon and the lower silicon for isolation; the grid electrode and the cathode of the insulated gate bipolar transistor are positioned below the buried oxide layer; the anode of the insulated gate bipolar transistor is positioned at the bottom of the underlying silicon.
3. The preparation method of the intelligent power module is characterized by comprising the following steps of:
manufacturing a driving integrated circuit of the intelligent power module on top silicon of the target SOI wafer;
manufacturing an insulated gate bipolar transistor and a fast recovery diode of the intelligent power module on the lower silicon of the target SOI wafer;
a buried oxide layer for isolation is manufactured between the top layer silicon and the lower layer silicon;
making a through hole in the buried oxide layer; setting a metal wire for connecting an electrode of the driving integrated circuit and an electrode of the insulated gate bipolar transistor based on the through hole;
manufacturing an anode of an insulated gate bipolar transistor at the bottom of the SOI wafer substrate;
and manufacturing all the capacitance-resistance devices of the intelligent power module on the top silicon of the target SOI wafer, wherein the capacitance-resistance devices are used for working together with the driving integrated circuit.
4. The method of manufacturing as claimed in claim 3, wherein fabricating the insulated gate bipolar transistor of the intelligent power module on the underlying silicon of the target SOI wafer comprises:
setting the grid electrode and the cathode of the insulated gate bipolar transistor below the buried oxide layer of the target SOI wafer; the anode of the insulated gate bipolar transistor is arranged at the bottom of the lower silicon layer.
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