CN111354679A - 半导体元器件及其制备方法、电子装置 - Google Patents

半导体元器件及其制备方法、电子装置 Download PDF

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CN111354679A
CN111354679A CN201911311098.1A CN201911311098A CN111354679A CN 111354679 A CN111354679 A CN 111354679A CN 201911311098 A CN201911311098 A CN 201911311098A CN 111354679 A CN111354679 A CN 111354679A
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semiconductor component
hydrogen
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plasma treatment
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崔基雄
李河圣
金成基
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Xia Tai Xin Semiconductor Qing Dao Ltd
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Abstract

一种半导体元器件的制造方法，其包括以下步骤：在半导体基体上沉积多晶硅以形成沉积层；对所述沉积层进行化学机械抛光处理或回蚀处理；对上述处理后的沉积层进行氢注入或/及氢气等离子体处理；以及在600℃～900℃下对上述沉积层进行退火处理，从而形成多晶硅接触层。所述半导体元器件的制备方法有利于提高使用寿命。本申请还提供一种半导体元器件及应用所述半导体元器件的电子装置。

Description

半导体元器件及其制备方法、电子装置
技术领域
本发明涉及半导体领域，尤其涉及一种半导体元器件及其制备方法，以及应用所述半导体元器件的电子装置。
背景技术
半导体存储设备用于为存储数据或程序命令。常见的存储设备包括动态随机存取存储器(DRAM)，它广泛用于数字电子产品中。随着对高度集成的半导体存储器件的需求增加，半导体器件的尺寸减小，进而使得半导体器件中的多晶硅接触层也减小。而在形成多晶硅接触层时，由于体积的小型化，使得化学机械抛光时或者回蚀处理时容易形成孔隙，导致产品不良或使用寿命缩短。
发明内容
有鉴于此，本发明提供一种提高良率以及产品使用寿命的半导体元器件的制备方法。
另，还有必要提供一种半导体元器件及应用所述半导体元器件的电子装置。
一种半导体元器件的制造方法，其包括以下步骤：
在半导体基体上沉积多晶硅以形成沉积层；
对所述沉积层进行化学机械抛光处理或回蚀处理；
对上述处理后的沉积层进行氢注入或/及氢气等离子体处理；以及
在600℃～900℃下对上述沉积层进行退火处理，从而形成多晶硅接触层。
一种半导体元器件，其通过上所述的半导体元器件的制造方法制得。
一种电子装置，所述电子装置包括如上所述的半导体元器件。
相较于现有技术，本申请的半导体元器件的制备方法工艺简单，容易操作。而上述制备方法中在退火前先对沉积的多晶硅进行氢注入处理和/或经过氢气等离子体处理，消除所述沉积层表面形成的悬空键，从而有利于降低退火所需的温度，避免现有技术中高于1000℃的退火处理温度对半导体元器件造成损伤，并且结合上述退火处理，有利于消除多晶硅接触层中的孔隙/缝隙，从而提高产品良率及使用寿命。
附图说明
图1为本发明第一实施例的半导体元器件的制备方法的流程图。
图2为本发明一实施例的半导体基体的剖面示意图。
图3为在图2所示的半导体基体上形成沉积层的剖面示意图。
图4本发明第二实施例的半导体元器件的制备方法的流程图。
图5本发明第三实施例的半导体元器件的制备方法的流程图。
图6本发明第四实施例的半导体元器件的制备方法的流程图。
主要元件符号说明
半导体基体 10
表面 101
沉积层 30
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
除非另有定义，本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本发明。
下面结合附图，对本发明的一些实施方式作详细说明。在不冲突的情况下，下述的实施例及实施例中的特征可以相互组合。
请参阅图1至图3，本发明第一实施例提供一种半导体元器件的制备方法，其包括以下步骤：
步骤S11，请参阅图2，提供一半导体基体10。
步骤S12，请参阅图3，在所述半导体基体10的表面101上沉积多晶硅以形成沉积层30。
在本实施例中，所述沉积层30通过化学气相沉积的方式形成。特别的，所述沉积层30通过低压力化学气相沉积法(LPCVD)形成。所述低压力化学气相沉积法形成所述沉积层30时的温度为575℃～650℃。在一些实施例中，具体的，在575℃～650℃下往沉积腔室内通入SiH4进行低压力化学气相沉积，SiH4分解得到硅沉积至所述半导体基体10的表面101上形成多晶硅，进而得到所述沉积层30。所述气相低压力化学气相沉积时的压力为10mTorr～350mTorr，沉积速率为15埃/分钟～300埃/分钟。
所述沉积层30的厚度可以根据具体的需要进行设计。
步骤S13，对所述沉积层30进行化学机械抛光处理或者回蚀处理。
步骤S14，对上述经过化学机械抛光处理或者回蚀处理的沉积层30进行氢注入处理。
在本实施例中，所述氢注入处理时的氢原子注入量为1×1013/cm2及其以上，加速能量为3MeV及其以下。
步骤S15，对上述经过氢注入处理的沉积层30进行氢气等离子体处理。
在本实施例中，所述氢气等离子体处理的流速为1000sccm至2000sccm，压力为10mTorr至100mTorr。
在本实施例中，所述氢气等离子体处理的时间为2分钟至4.5分钟。
步骤S16，在600℃～900℃下对上述氢气等离子体处理后的沉积层30进行退火处理，从而形成多晶硅接触层。
在本实施例中，所述退火处理的时间大于或等于30分钟。所述退火处理可在真空条件下或者在氢气气氛下进行。
请参阅图4，本发明第二实施例提供一种半导体元器件的制备方法，其包括以下步骤：
步骤S21，请参阅图2，提供一半导体基体10。
步骤S22，请参阅图3，在所述半导体基体10的表面101上沉积多晶硅以形成沉积层30。
在本实施例中，所述沉积层30通过化学气相沉积的方式形成。特别的，所述沉积层30通过低压力化学气相沉积法(LPCVD)形成。所述低压力化学气相沉积法形成所述沉积层30时的温度为575℃～650℃。在一些实施例中，具体的，在575℃～650℃下往沉积腔室内通入SiH4进行低压力化学气相沉积，SiH4分解得到硅沉积至所述半导体基体10的表面101上形成多晶硅，进而得到所述沉积层30。所述气相低压力化学气相沉积时的压力为10mTorr～350mTorr，沉积速率为15埃/分钟～300埃/分钟。
所述沉积层30的厚度可以根据具体的需要进行设计。
步骤S23，对所述沉积层30进行化学机械抛光处理或者回蚀处理。
步骤S24，对上述经过化学机械抛光处理或者回蚀处理的沉积层30进行氢气等离子体处理。
在本实施例中，所述氢气等离子体处理的流速为1000sccm至2000sccm，压力为10mTorr至100mTorr。
在本实施例中，所述氢气等离子体处理的时间为2分钟至4.5分钟。
步骤S25，对上述经过氢气等离子体处理的沉积层30进行氢注入处理。
在本实施例中，所述氢注入处理时的氢原子注入量为1×1013/cm2及其以上，加速能量为3MeV及其以下。
步骤S26，在600℃～900℃下对上述氢注入处理后的沉积层30进行退火处理，从而形成多晶硅接触层。
在本实施例中，所述退火处理的时间大于或等于30分钟。所述退火处理可在真空条件下或者在氢气气氛下进行。
请参阅图5，本发明第三实施例提供一种半导体元器件的制备方法，其与第一实施例的区别在于省略了步骤S15，而直接对上述经过氢注入处理的沉积层30进行退火处理。
请参阅图6，本发明第四实施例提供一种半导体元器件的制备方法，其与第二实施例的区别在于省略了步骤S25，而直接对上述经过氢气等离子体处理的沉积层30进行退火处理。
上述各实施例的制备方法制备的半导体元器件可应用于电子装置(图未示)中。
相较于现有技术，本申请的半导体元器件的制备方法工艺简单，容易操作。而上述制备方法中在退火前先对沉积的多晶硅进行氢注入处理和/或经过氢气等离子体处理，消除所述沉积层表面形成的悬空键，从而有利于降低退火所需的温度，避免现有技术中高于1000℃的退火处理温度对半导体元器件造成损伤，并且结合上述退火处理，有利于消除多晶硅接触层中的孔隙/缝隙，从而提高产品良率及使用寿命。
可以理解的是，以上实施例仅用来说明本发明，并非用作对本发明的限定。对于本领域的普通技术人员来说，根据本发明的技术构思做出的其它各种相应的改变与变形，都落在本发明权利要求的保护范围之内。

Claims (10)

1.一种半导体元器件的制造方法，其包括以下步骤：
在半导体基体上沉积多晶硅以形成沉积层；
对所述沉积层进行化学机械抛光处理或回蚀处理；
对上述处理后的沉积层进行氢注入或/及氢气等离子体处理；以及
在600℃～900℃下对上述沉积层进行退火处理，从而形成多晶硅接触层。
2.如权利要求1所述的半导体元器件的制造方法，其特征在于，所述退火处理的时间大于或等于30分钟。
3.如权利要求1所述的半导体元器件的制造方法，其特征在于，当对上述处理后的沉积层进行氢注入或/及氢气等离子体处理时，具体为：
对上述处理后的沉积层进行氢注入处理；以及
对上述氢注入处理后的沉积层进行氢气等离子体处理。
4.如权利要求1所述的半导体元器件的制造方法，其特征在于，当对上述处理后的沉积层进行氢注入或/及氢气等离子体处理时，具体为：
对上述处理后的沉积层进行氢气等离子体处理；以及
对上述氢气等离子体处理后的沉积层进行氢注入处理。
5.如权利要求1所述的半导体元器件的制造方法，其特征在于，所述退火处理在真空条件下进行。
6.如权利要求1所述的半导体元器件的制造方法，其特征在于，所述退火处理在氢气气氛下进行。
7.如权利要求1所述的半导体元器件的制造方法，其特征在于，所述氢气等离子体处理的流速为1000sccm至2000sccm，压力为10mTorr至100mTorr；以及/或所述氢注入处理时的氢原子注入量为1×1013/cm2及其以上，加速能量为3MeV及其以下。
8.如权利要求1所述的半导体元器件的制造方法，其特征在于，当所述半导体元器件的制造方法包含氢气等离子体处理时，所述氢气等离子体处理的时间为2分钟至4.5分钟。
9.一种半导体元器件，其特征在于，所述半导体元器件通过权利要求1-8任意一项所述的半导体元器件的制造方法制得。
10.一种电子装置，其特征在于，所述电子装置包括如权利要求9所述的半导体元器件。
CN201911311098.1A 2018-12-20 2019-12-18 半导体元器件及其制备方法、电子装置 Pending CN111354679A (zh)

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Publication number Priority date Publication date Assignee Title
CN1461042A (zh) * 2002-05-23 2003-12-10 夏普株式会社 半导体衬底的生产方法
US20100117090A1 (en) * 2008-11-07 2010-05-13 Hyung-Gu Roh Array substrate including thin film transistor and method of fabricating the same
CN103050389A (zh) * 2012-12-14 2013-04-17 上海华虹Nec电子有限公司 低应力igbt沟槽型栅极的成长方法
CN106571306A (zh) * 2016-10-27 2017-04-19 武汉华星光电技术有限公司 薄膜晶体管及其制造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1461042A (zh) * 2002-05-23 2003-12-10 夏普株式会社 半导体衬底的生产方法
US20100117090A1 (en) * 2008-11-07 2010-05-13 Hyung-Gu Roh Array substrate including thin film transistor and method of fabricating the same
CN103050389A (zh) * 2012-12-14 2013-04-17 上海华虹Nec电子有限公司 低应力igbt沟槽型栅极的成长方法
CN106571306A (zh) * 2016-10-27 2017-04-19 武汉华星光电技术有限公司 薄膜晶体管及其制造方法

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